xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/stacksave-stackrestore.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -global-isel=1 -mtriple=riscv32 -o - %s | FileCheck %s --check-prefix=RV32
3; RUN: llc -global-isel=1 -mtriple=riscv64 -o - %s | FileCheck %s --check-prefix=RV64
4
5declare void @use_addr(ptr)
6
7define void @test_scoped_alloca(i64 %n) {
8; RV32-LABEL: test_scoped_alloca:
9; RV32:       # %bb.0:
10; RV32-NEXT:    addi sp, sp, -16
11; RV32-NEXT:    .cfi_def_cfa_offset 16
12; RV32-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
13; RV32-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
14; RV32-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
15; RV32-NEXT:    .cfi_offset ra, -4
16; RV32-NEXT:    .cfi_offset s0, -8
17; RV32-NEXT:    .cfi_offset s1, -12
18; RV32-NEXT:    addi s0, sp, 16
19; RV32-NEXT:    .cfi_def_cfa s0, 0
20; RV32-NEXT:    addi a0, a0, 15
21; RV32-NEXT:    andi a0, a0, -16
22; RV32-NEXT:    sub a0, sp, a0
23; RV32-NEXT:    mv s1, sp
24; RV32-NEXT:    mv sp, a0
25; RV32-NEXT:    call use_addr
26; RV32-NEXT:    mv sp, s1
27; RV32-NEXT:    addi sp, s0, -16
28; RV32-NEXT:    .cfi_def_cfa sp, 16
29; RV32-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
30; RV32-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
31; RV32-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
32; RV32-NEXT:    .cfi_restore ra
33; RV32-NEXT:    .cfi_restore s0
34; RV32-NEXT:    .cfi_restore s1
35; RV32-NEXT:    addi sp, sp, 16
36; RV32-NEXT:    .cfi_def_cfa_offset 0
37; RV32-NEXT:    ret
38;
39; RV64-LABEL: test_scoped_alloca:
40; RV64:       # %bb.0:
41; RV64-NEXT:    addi sp, sp, -32
42; RV64-NEXT:    .cfi_def_cfa_offset 32
43; RV64-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
44; RV64-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
45; RV64-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
46; RV64-NEXT:    .cfi_offset ra, -8
47; RV64-NEXT:    .cfi_offset s0, -16
48; RV64-NEXT:    .cfi_offset s1, -24
49; RV64-NEXT:    addi s0, sp, 32
50; RV64-NEXT:    .cfi_def_cfa s0, 0
51; RV64-NEXT:    addi a0, a0, 15
52; RV64-NEXT:    andi a0, a0, -16
53; RV64-NEXT:    sub a0, sp, a0
54; RV64-NEXT:    mv s1, sp
55; RV64-NEXT:    mv sp, a0
56; RV64-NEXT:    call use_addr
57; RV64-NEXT:    mv sp, s1
58; RV64-NEXT:    addi sp, s0, -32
59; RV64-NEXT:    .cfi_def_cfa sp, 32
60; RV64-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
61; RV64-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
62; RV64-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
63; RV64-NEXT:    .cfi_restore ra
64; RV64-NEXT:    .cfi_restore s0
65; RV64-NEXT:    .cfi_restore s1
66; RV64-NEXT:    addi sp, sp, 32
67; RV64-NEXT:    .cfi_def_cfa_offset 0
68; RV64-NEXT:    ret
69  %sp = call ptr @llvm.stacksave.p0()
70  %addr = alloca i8, i64 %n
71  call void @use_addr(ptr %addr)
72  call void @llvm.stackrestore.p0(ptr %sp)
73  ret void
74}
75