xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/icmp.mir (revision 05f673bcefb0912a38a67b0026cad3768b2f85d2) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+m,+v -run-pass=regbankselect \
3# RUN:   -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
4# RUN:   -o - | FileCheck -check-prefix=RV32I %s
5# RUN: llc -mtriple=riscv64 -mattr=+m,+v -run-pass=regbankselect \
6# RUN:   -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
7# RUN:   -o - | FileCheck -check-prefix=RV64I %s
8
9---
10name:            icmp_nxv1i1
11legalized:       true
12tracksRegLiveness: true
13body:             |
14  bb.0.entry:
15    ; RV32I-LABEL: name: icmp_nxv1i1
16    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF
17    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s1>), [[DEF]]
18    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
19    ; RV32I-NEXT: PseudoRET implicit $v8
20    ;
21    ; RV64I-LABEL: name: icmp_nxv1i1
22    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF
23    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s1>), [[DEF]]
24    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
25    ; RV64I-NEXT: PseudoRET implicit $v8
26    %0:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
27    %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 1 x s1>), %0
28    $v8 = COPY %1(<vscale x 1 x s1>)
29    PseudoRET implicit $v8
30
31...
32---
33name:            icmp_nxv2i1
34legalized:       true
35tracksRegLiveness: true
36body:             |
37  bb.0.entry:
38    ; RV32I-LABEL: name: icmp_nxv2i1
39    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF
40    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s1>), [[DEF]]
41    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
42    ; RV32I-NEXT: PseudoRET implicit $v8
43    ;
44    ; RV64I-LABEL: name: icmp_nxv2i1
45    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF
46    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s1>), [[DEF]]
47    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
48    ; RV64I-NEXT: PseudoRET implicit $v8
49    %0:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
50    %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 2 x s1>), %0
51    $v8 = COPY %1(<vscale x 2 x s1>)
52    PseudoRET implicit $v8
53
54...
55---
56name:            icmp_nxv4i1
57legalized:       true
58tracksRegLiveness: true
59body:             |
60  bb.0.entry:
61    ; RV32I-LABEL: name: icmp_nxv4i1
62    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF
63    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s1>), [[DEF]]
64    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
65    ; RV32I-NEXT: PseudoRET implicit $v8
66    ;
67    ; RV64I-LABEL: name: icmp_nxv4i1
68    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF
69    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s1>), [[DEF]]
70    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
71    ; RV64I-NEXT: PseudoRET implicit $v8
72    %0:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
73    %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 4 x s1>), %0
74    $v8 = COPY %1(<vscale x 4 x s1>)
75    PseudoRET implicit $v8
76
77...
78---
79name:            icmp_nxv8i1
80legalized:       true
81tracksRegLiveness: true
82body:             |
83  bb.0.entry:
84    ; RV32I-LABEL: name: icmp_nxv8i1
85    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF
86    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s1>), [[DEF]]
87    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
88    ; RV32I-NEXT: PseudoRET implicit $v8
89    ;
90    ; RV64I-LABEL: name: icmp_nxv8i1
91    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF
92    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s1>), [[DEF]]
93    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
94    ; RV64I-NEXT: PseudoRET implicit $v8
95    %0:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
96    %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 8 x s1>), %0
97    $v8 = COPY %1(<vscale x 8 x s1>)
98    PseudoRET implicit $v8
99
100...
101---
102name:            icmp_nxv16i1
103legalized:       true
104tracksRegLiveness: true
105body:             |
106  bb.0.entry:
107    ; RV32I-LABEL: name: icmp_nxv16i1
108    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF
109    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s1>), [[DEF]]
110    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
111    ; RV32I-NEXT: PseudoRET implicit $v8
112    ;
113    ; RV64I-LABEL: name: icmp_nxv16i1
114    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF
115    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s1>), [[DEF]]
116    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
117    ; RV64I-NEXT: PseudoRET implicit $v8
118    %0:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
119    %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 16 x s1>), %0
120    $v8 = COPY %1(<vscale x 16 x s1>)
121    PseudoRET implicit $v8
122
123...
124---
125name:            icmp_nxv32i1
126legalized:       true
127tracksRegLiveness: true
128body:             |
129  bb.0.entry:
130    ; RV32I-LABEL: name: icmp_nxv32i1
131    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF
132    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s1>), [[DEF]]
133    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
134    ; RV32I-NEXT: PseudoRET implicit $v8
135    ;
136    ; RV64I-LABEL: name: icmp_nxv32i1
137    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF
138    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s1>), [[DEF]]
139    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
140    ; RV64I-NEXT: PseudoRET implicit $v8
141    %0:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF
142    %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 32 x s1>), %0
143    $v8 = COPY %1(<vscale x 32 x s1>)
144    PseudoRET implicit $v8
145
146...
147---
148name:            icmp_nxv64i1
149legalized:       true
150tracksRegLiveness: true
151body:             |
152  bb.0.entry:
153    ; RV32I-LABEL: name: icmp_nxv64i1
154    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_IMPLICIT_DEF
155    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s1>), [[DEF]]
156    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)
157    ; RV32I-NEXT: PseudoRET implicit $v8
158    ;
159    ; RV64I-LABEL: name: icmp_nxv64i1
160    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_IMPLICIT_DEF
161    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s1>), [[DEF]]
162    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)
163    ; RV64I-NEXT: PseudoRET implicit $v8
164    %0:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF
165    %1:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 64 x s1>), %0
166    $v8 = COPY %1(<vscale x 64 x s1>)
167    PseudoRET implicit $v8
168
169...
170---
171name:            icmp_nxv1i8
172legalized:       true
173tracksRegLiveness: true
174body:             |
175  bb.0.entry:
176    ; RV32I-LABEL: name: icmp_nxv1i8
177    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF
178    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s8>), [[DEF]]
179    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
180    ; RV32I-NEXT: PseudoRET implicit $v8
181    ;
182    ; RV64I-LABEL: name: icmp_nxv1i8
183    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF
184    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s8>), [[DEF]]
185    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
186    ; RV64I-NEXT: PseudoRET implicit $v8
187    %0:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF
188    %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 1 x s8>), %0
189    $v8 = COPY %1(<vscale x 1 x s1>)
190    PseudoRET implicit $v8
191
192...
193---
194name:            icmp_nxv2i8
195legalized:       true
196tracksRegLiveness: true
197body:             |
198  bb.0.entry:
199    ; RV32I-LABEL: name: icmp_nxv2i8
200    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF
201    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s8>), [[DEF]]
202    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
203    ; RV32I-NEXT: PseudoRET implicit $v8
204    ;
205    ; RV64I-LABEL: name: icmp_nxv2i8
206    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF
207    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s8>), [[DEF]]
208    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
209    ; RV64I-NEXT: PseudoRET implicit $v8
210    %0:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF
211    %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 2 x s8>), %0
212    $v8 = COPY %1(<vscale x 2 x s1>)
213    PseudoRET implicit $v8
214
215...
216---
217name:            icmp_nxv4i8
218legalized:       true
219tracksRegLiveness: true
220body:             |
221  bb.0.entry:
222    ; RV32I-LABEL: name: icmp_nxv4i8
223    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF
224    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s8>), [[DEF]]
225    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
226    ; RV32I-NEXT: PseudoRET implicit $v8
227    ;
228    ; RV64I-LABEL: name: icmp_nxv4i8
229    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF
230    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s8>), [[DEF]]
231    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
232    ; RV64I-NEXT: PseudoRET implicit $v8
233    %0:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF
234    %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 4 x s8>), %0
235    $v8 = COPY %1(<vscale x 4 x s1>)
236    PseudoRET implicit $v8
237
238...
239---
240name:            icmp_nxv8i8
241legalized:       true
242tracksRegLiveness: true
243body:             |
244  bb.0.entry:
245    ; RV32I-LABEL: name: icmp_nxv8i8
246    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF
247    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s8>), [[DEF]]
248    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
249    ; RV32I-NEXT: PseudoRET implicit $v8
250    ;
251    ; RV64I-LABEL: name: icmp_nxv8i8
252    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF
253    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s8>), [[DEF]]
254    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
255    ; RV64I-NEXT: PseudoRET implicit $v8
256    %0:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF
257    %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 8 x s8>), %0
258    $v8 = COPY %1(<vscale x 8 x s1>)
259    PseudoRET implicit $v8
260
261...
262---
263name:            icmp_nxv16i8
264legalized:       true
265tracksRegLiveness: true
266body:             |
267  bb.0.entry:
268    ; RV32I-LABEL: name: icmp_nxv16i8
269    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF
270    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s8>), [[DEF]]
271    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
272    ; RV32I-NEXT: PseudoRET implicit $v8
273    ;
274    ; RV64I-LABEL: name: icmp_nxv16i8
275    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF
276    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s8>), [[DEF]]
277    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
278    ; RV64I-NEXT: PseudoRET implicit $v8
279    %0:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF
280    %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 16 x s8>), %0
281    $v8 = COPY %1(<vscale x 16 x s1>)
282    PseudoRET implicit $v8
283
284...
285---
286name:            icmp_nxv32i8
287legalized:       true
288tracksRegLiveness: true
289body:             |
290  bb.0.entry:
291    ; RV32I-LABEL: name: icmp_nxv32i8
292    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF
293    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s8>), [[DEF]]
294    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
295    ; RV32I-NEXT: PseudoRET implicit $v8
296    ;
297    ; RV64I-LABEL: name: icmp_nxv32i8
298    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF
299    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s8>), [[DEF]]
300    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
301    ; RV64I-NEXT: PseudoRET implicit $v8
302    %0:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF
303    %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 32 x s8>), %0
304    $v8 = COPY %1(<vscale x 32 x s1>)
305    PseudoRET implicit $v8
306
307...
308---
309name:            icmp_nxv64i8
310legalized:       true
311tracksRegLiveness: true
312body:             |
313  bb.0.entry:
314    ; RV32I-LABEL: name: icmp_nxv64i8
315    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF
316    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s8>), [[DEF]]
317    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)
318    ; RV32I-NEXT: PseudoRET implicit $v8
319    ;
320    ; RV64I-LABEL: name: icmp_nxv64i8
321    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF
322    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s8>), [[DEF]]
323    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)
324    ; RV64I-NEXT: PseudoRET implicit $v8
325    %0:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF
326    %1:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 64 x s8>), %0
327    $v8 = COPY %1(<vscale x 64 x s1>)
328    PseudoRET implicit $v8
329
330...
331---
332name:            icmp_nxv1i16
333legalized:       true
334tracksRegLiveness: true
335body:             |
336  bb.0.entry:
337    ; RV32I-LABEL: name: icmp_nxv1i16
338    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF
339    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s16>), [[DEF]]
340    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
341    ; RV32I-NEXT: PseudoRET implicit $v8
342    ;
343    ; RV64I-LABEL: name: icmp_nxv1i16
344    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF
345    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s16>), [[DEF]]
346    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
347    ; RV64I-NEXT: PseudoRET implicit $v8
348    %0:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF
349    %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 1 x s16>), %0
350    $v8 = COPY %1(<vscale x 1 x s1>)
351    PseudoRET implicit $v8
352
353...
354---
355name:            icmp_nxv2i16
356legalized:       true
357tracksRegLiveness: true
358body:             |
359  bb.0.entry:
360    ; RV32I-LABEL: name: icmp_nxv2i16
361    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF
362    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s16>), [[DEF]]
363    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
364    ; RV32I-NEXT: PseudoRET implicit $v8
365    ;
366    ; RV64I-LABEL: name: icmp_nxv2i16
367    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF
368    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s16>), [[DEF]]
369    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
370    ; RV64I-NEXT: PseudoRET implicit $v8
371    %0:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF
372    %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 2 x s16>), %0
373    $v8 = COPY %1(<vscale x 2 x s1>)
374    PseudoRET implicit $v8
375
376...
377---
378name:            icmp_nxv4i16
379legalized:       true
380tracksRegLiveness: true
381body:             |
382  bb.0.entry:
383    ; RV32I-LABEL: name: icmp_nxv4i16
384    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF
385    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s16>), [[DEF]]
386    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
387    ; RV32I-NEXT: PseudoRET implicit $v8
388    ;
389    ; RV64I-LABEL: name: icmp_nxv4i16
390    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF
391    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s16>), [[DEF]]
392    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
393    ; RV64I-NEXT: PseudoRET implicit $v8
394    %0:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF
395    %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 4 x s16>), %0
396    $v8 = COPY %1(<vscale x 4 x s1>)
397    PseudoRET implicit $v8
398
399...
400---
401name:            icmp_nxv8i16
402legalized:       true
403tracksRegLiveness: true
404body:             |
405  bb.0.entry:
406    ; RV32I-LABEL: name: icmp_nxv8i16
407    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF
408    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s16>), [[DEF]]
409    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
410    ; RV32I-NEXT: PseudoRET implicit $v8
411    ;
412    ; RV64I-LABEL: name: icmp_nxv8i16
413    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF
414    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s16>), [[DEF]]
415    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
416    ; RV64I-NEXT: PseudoRET implicit $v8
417    %0:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF
418    %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 8 x s16>), %0
419    $v8 = COPY %1(<vscale x 8 x s1>)
420    PseudoRET implicit $v8
421
422...
423---
424name:            icmp_nxv16i16
425legalized:       true
426tracksRegLiveness: true
427body:             |
428  bb.0.entry:
429    ; RV32I-LABEL: name: icmp_nxv16i16
430    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF
431    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s16>), [[DEF]]
432    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
433    ; RV32I-NEXT: PseudoRET implicit $v8
434    ;
435    ; RV64I-LABEL: name: icmp_nxv16i16
436    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF
437    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s16>), [[DEF]]
438    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
439    ; RV64I-NEXT: PseudoRET implicit $v8
440    %0:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF
441    %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 16 x s16>), %0
442    $v8 = COPY %1(<vscale x 16 x s1>)
443    PseudoRET implicit $v8
444
445...
446---
447name:            icmp_nxv32i16
448legalized:       true
449tracksRegLiveness: true
450body:             |
451  bb.0.entry:
452    ; RV32I-LABEL: name: icmp_nxv32i16
453    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF
454    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s16>), [[DEF]]
455    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
456    ; RV32I-NEXT: PseudoRET implicit $v8
457    ;
458    ; RV64I-LABEL: name: icmp_nxv32i16
459    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF
460    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s16>), [[DEF]]
461    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)
462    ; RV64I-NEXT: PseudoRET implicit $v8
463    %0:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF
464    %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 32 x s16>), %0
465    $v8 = COPY %1(<vscale x 32 x s1>)
466    PseudoRET implicit $v8
467
468...
469---
470name:            icmp_nxv1i32
471legalized:       true
472tracksRegLiveness: true
473body:             |
474  bb.0.entry:
475    ; RV32I-LABEL: name: icmp_nxv1i32
476    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF
477    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s32>), [[DEF]]
478    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
479    ; RV32I-NEXT: PseudoRET implicit $v8
480    ;
481    ; RV64I-LABEL: name: icmp_nxv1i32
482    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF
483    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s32>), [[DEF]]
484    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
485    ; RV64I-NEXT: PseudoRET implicit $v8
486    %0:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF
487    %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 1 x s32>), %0
488    $v8 = COPY %1(<vscale x 1 x s1>)
489    PseudoRET implicit $v8
490
491...
492---
493name:            icmp_nxv2i32
494legalized:       true
495tracksRegLiveness: true
496body:             |
497  bb.0.entry:
498    ; RV32I-LABEL: name: icmp_nxv2i32
499    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF
500    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s32>), [[DEF]]
501    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
502    ; RV32I-NEXT: PseudoRET implicit $v8
503    ;
504    ; RV64I-LABEL: name: icmp_nxv2i32
505    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF
506    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s32>), [[DEF]]
507    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
508    ; RV64I-NEXT: PseudoRET implicit $v8
509    %0:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF
510    %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 2 x s32>), %0
511    $v8 = COPY %1(<vscale x 2 x s1>)
512    PseudoRET implicit $v8
513
514...
515---
516name:            icmp_nxv4i32
517legalized:       true
518tracksRegLiveness: true
519body:             |
520  bb.0.entry:
521    ; RV32I-LABEL: name: icmp_nxv4i32
522    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF
523    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s32>), [[DEF]]
524    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
525    ; RV32I-NEXT: PseudoRET implicit $v8
526    ;
527    ; RV64I-LABEL: name: icmp_nxv4i32
528    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF
529    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s32>), [[DEF]]
530    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
531    ; RV64I-NEXT: PseudoRET implicit $v8
532    %0:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF
533    %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 4 x s32>), %0
534    $v8 = COPY %1(<vscale x 4 x s1>)
535    PseudoRET implicit $v8
536
537...
538---
539name:            icmp_nxv8i32
540legalized:       true
541tracksRegLiveness: true
542body:             |
543  bb.0.entry:
544    ; RV32I-LABEL: name: icmp_nxv8i32
545    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF
546    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s32>), [[DEF]]
547    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
548    ; RV32I-NEXT: PseudoRET implicit $v8
549    ;
550    ; RV64I-LABEL: name: icmp_nxv8i32
551    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF
552    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s32>), [[DEF]]
553    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
554    ; RV64I-NEXT: PseudoRET implicit $v8
555    %0:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF
556    %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 8 x s32>), %0
557    $v8 = COPY %1(<vscale x 8 x s1>)
558    PseudoRET implicit $v8
559
560...
561---
562name:            icmp_nxv16i32
563legalized:       true
564tracksRegLiveness: true
565body:             |
566  bb.0.entry:
567    ; RV32I-LABEL: name: icmp_nxv16i32
568    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF
569    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s32>), [[DEF]]
570    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
571    ; RV32I-NEXT: PseudoRET implicit $v8
572    ;
573    ; RV64I-LABEL: name: icmp_nxv16i32
574    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF
575    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s32>), [[DEF]]
576    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)
577    ; RV64I-NEXT: PseudoRET implicit $v8
578    %0:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF
579    %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 16 x s32>), %0
580    $v8 = COPY %1(<vscale x 16 x s1>)
581    PseudoRET implicit $v8
582
583...
584---
585name:            icmp_nxv1i64
586legalized:       true
587tracksRegLiveness: true
588body:             |
589  bb.0.entry:
590    ; RV32I-LABEL: name: icmp_nxv1i64
591    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF
592    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s64>), [[DEF]]
593    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
594    ; RV32I-NEXT: PseudoRET implicit $v8
595    ;
596    ; RV64I-LABEL: name: icmp_nxv1i64
597    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF
598    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s64>), [[DEF]]
599    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)
600    ; RV64I-NEXT: PseudoRET implicit $v8
601    %0:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF
602    %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 1 x s64>), %0
603    $v8 = COPY %1(<vscale x 1 x s1>)
604    PseudoRET implicit $v8
605
606...
607---
608name:            icmp_nxv2i64
609legalized:       true
610tracksRegLiveness: true
611body:             |
612  bb.0.entry:
613    ; RV32I-LABEL: name: icmp_nxv2i64
614    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF
615    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s64>), [[DEF]]
616    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
617    ; RV32I-NEXT: PseudoRET implicit $v8
618    ;
619    ; RV64I-LABEL: name: icmp_nxv2i64
620    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF
621    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s64>), [[DEF]]
622    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)
623    ; RV64I-NEXT: PseudoRET implicit $v8
624    %0:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF
625    %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 2 x s64>), %0
626    $v8 = COPY %1(<vscale x 2 x s1>)
627    PseudoRET implicit $v8
628
629...
630---
631name:            icmp_nxv4i64
632legalized:       true
633tracksRegLiveness: true
634body:             |
635  bb.0.entry:
636    ; RV32I-LABEL: name: icmp_nxv4i64
637    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF
638    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s64>), [[DEF]]
639    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
640    ; RV32I-NEXT: PseudoRET implicit $v8
641    ;
642    ; RV64I-LABEL: name: icmp_nxv4i64
643    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF
644    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s64>), [[DEF]]
645    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)
646    ; RV64I-NEXT: PseudoRET implicit $v8
647    %0:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF
648    %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 4 x s64>), %0
649    $v8 = COPY %1(<vscale x 4 x s1>)
650    PseudoRET implicit $v8
651
652...
653---
654name:            icmp_nxv8i64
655legalized:       true
656tracksRegLiveness: true
657body:             |
658  bb.0.entry:
659    ; RV32I-LABEL: name: icmp_nxv8i64
660    ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF
661    ; RV32I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s64>), [[DEF]]
662    ; RV32I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
663    ; RV32I-NEXT: PseudoRET implicit $v8
664    ;
665    ; RV64I-LABEL: name: icmp_nxv8i64
666    ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF
667    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s64>), [[DEF]]
668    ; RV64I-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)
669    ; RV64I-NEXT: PseudoRET implicit $v8
670    %0:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF
671    %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0(<vscale x 8 x s64>), %0
672    $v8 = COPY %1(<vscale x 8 x s1>)
673    PseudoRET implicit $v8
674
675...
676