xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/ret.ll (revision 991ecfb83daf6fa303385c708874d60f7ded92ab)
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple=riscv32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64I %s
6
7define void @test_ret_void() {
8  ; RV32I-LABEL: name: test_ret_void
9  ; RV32I: bb.1.entry:
10  ; RV32I-NEXT:   PseudoRET
11  ; RV64I-LABEL: name: test_ret_void
12  ; RV64I: bb.1.entry:
13  ; RV64I-NEXT:   PseudoRET
14entry:
15  ret void
16}
17
18define i8 @test_ret_i8() {
19  ; RV32I-LABEL: name: test_ret_i8
20  ; RV32I: bb.1.entry:
21  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
22  ; RV32I-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)
23  ; RV32I-NEXT:   $x10 = COPY [[ANYEXT]](s32)
24  ; RV32I-NEXT:   PseudoRET implicit $x10
25  ; RV64I-LABEL: name: test_ret_i8
26  ; RV64I: bb.1.entry:
27  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
28  ; RV64I-NEXT:   [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s8)
29  ; RV64I-NEXT:   $x10 = COPY [[ANYEXT]](s64)
30  ; RV64I-NEXT:   PseudoRET implicit $x10
31entry:
32  ret i8 1
33}
34
35define zeroext i8 @test_ret_i8_zext() {
36  ; RV32I-LABEL: name: test_ret_i8_zext
37  ; RV32I: bb.1.entry:
38  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
39  ; RV32I-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s8)
40  ; RV32I-NEXT:   $x10 = COPY [[ZEXT]](s32)
41  ; RV32I-NEXT:   PseudoRET implicit $x10
42  ; RV64I-LABEL: name: test_ret_i8_zext
43  ; RV64I: bb.1.entry:
44  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
45  ; RV64I-NEXT:   [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s8)
46  ; RV64I-NEXT:   $x10 = COPY [[ZEXT]](s64)
47  ; RV64I-NEXT:   PseudoRET implicit $x10
48entry:
49  ret i8 1
50}
51
52define signext i16 @test_ret_i16_sext() {
53  ; RV32I-LABEL: name: test_ret_i16_sext
54  ; RV32I: bb.1.entry:
55  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
56  ; RV32I-NEXT:   [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C]](s16)
57  ; RV32I-NEXT:   $x10 = COPY [[SEXT]](s32)
58  ; RV32I-NEXT:   PseudoRET implicit $x10
59  ; RV64I-LABEL: name: test_ret_i16_sext
60  ; RV64I: bb.1.entry:
61  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
62  ; RV64I-NEXT:   [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[C]](s16)
63  ; RV64I-NEXT:   $x10 = COPY [[SEXT]](s64)
64  ; RV64I-NEXT:   PseudoRET implicit $x10
65entry:
66  ret i16 1
67}
68
69define i32 @test_ret_i32() {
70  ; RV32I-LABEL: name: test_ret_i32
71  ; RV32I: bb.1.entry:
72  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
73  ; RV32I-NEXT:   $x10 = COPY [[C]](s32)
74  ; RV32I-NEXT:   PseudoRET implicit $x10
75  ; RV64I-LABEL: name: test_ret_i32
76  ; RV64I: bb.1.entry:
77  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
78  ; RV64I-NEXT:   [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32)
79  ; RV64I-NEXT:   $x10 = COPY [[ANYEXT]](s64)
80  ; RV64I-NEXT:   PseudoRET implicit $x10
81entry:
82  ret i32 1
83}
84
85define i64 @test_ret_i64() {
86  ; RV32I-LABEL: name: test_ret_i64
87  ; RV32I: bb.1.entry:
88  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967296
89  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
90  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)
91  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)
92  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11
93  ; RV64I-LABEL: name: test_ret_i64
94  ; RV64I: bb.1.entry:
95  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967296
96  ; RV64I-NEXT:   $x10 = COPY [[C]](s64)
97  ; RV64I-NEXT:   PseudoRET implicit $x10
98entry:
99  ret i64 4294967296
100}
101
102define ptr @test_ret_ptr() {
103  ; RV32I-LABEL: name: test_ret_ptr
104  ; RV32I: bb.1.entry:
105  ; RV32I-NEXT:   [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
106  ; RV32I-NEXT:   $x10 = COPY [[DEF]](p0)
107  ; RV32I-NEXT:   PseudoRET implicit $x10
108  ; RV64I-LABEL: name: test_ret_ptr
109  ; RV64I: bb.1.entry:
110  ; RV64I-NEXT:   [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
111  ; RV64I-NEXT:   $x10 = COPY [[DEF]](p0)
112  ; RV64I-NEXT:   PseudoRET implicit $x10
113entry:
114  ret ptr undef
115}
116
117define [2 x i32] @test_ret_2xi32() {
118  ; RV32I-LABEL: name: test_ret_2xi32
119  ; RV32I: bb.1.entry:
120  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
121  ; RV32I-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
122  ; RV32I-NEXT:   $x10 = COPY [[C]](s32)
123  ; RV32I-NEXT:   $x11 = COPY [[C1]](s32)
124  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11
125  ; RV64I-LABEL: name: test_ret_2xi32
126  ; RV64I: bb.1.entry:
127  ; RV64I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
128  ; RV64I-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
129  ; RV64I-NEXT:   [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32)
130  ; RV64I-NEXT:   [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)
131  ; RV64I-NEXT:   $x10 = COPY [[ANYEXT]](s64)
132  ; RV64I-NEXT:   $x11 = COPY [[ANYEXT1]](s64)
133  ; RV64I-NEXT:   PseudoRET implicit $x10, implicit $x11
134entry:
135  ret [2 x i32] [i32 1, i32 2]
136}
137