1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 2; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator \ 3; RUN: -verify-machineinstrs < %s \ 4; RUN: | FileCheck -check-prefixes=RV64,RV64I %s 5; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 \ 6; RUN: -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \ 7; RUN: | FileCheck -check-prefixes=RV64,RV64F %s 8 9; Any tests that would have identical output for some combination of the lp64* 10; ABIs belong in calling-conv-*-common.ll. This file contains tests that will 11; have different output across those ABIs. i.e. where some arguments would be 12; passed according to the floating point ABI. 13 14define i64 @callee_float_in_regs(i64 %a, float %b) nounwind { 15 ; RV64-LABEL: name: callee_float_in_regs 16 ; RV64: bb.1 (%ir-block.0): 17 ; RV64-NEXT: liveins: $x10, $x11 18 ; RV64-NEXT: {{ $}} 19 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 20 ; RV64-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 21 ; RV64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) 22 ; RV64-NEXT: [[FPTOSI:%[0-9]+]]:_(s64) = G_FPTOSI [[TRUNC]](s32) 23 ; RV64-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[FPTOSI]] 24 ; RV64-NEXT: $x10 = COPY [[ADD]](s64) 25 ; RV64-NEXT: PseudoRET implicit $x10 26 %b_fptosi = fptosi float %b to i64 27 %1 = add i64 %a, %b_fptosi 28 ret i64 %1 29} 30 31define i64 @caller_float_in_regs() nounwind { 32 ; RV64I-LABEL: name: caller_float_in_regs 33 ; RV64I: bb.1 (%ir-block.0): 34 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 35 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 36 ; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 37 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32) 38 ; RV64I-NEXT: $x10 = COPY [[C]](s64) 39 ; RV64I-NEXT: $x11 = COPY [[ANYEXT]](s64) 40 ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 41 ; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 42 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 43 ; RV64I-NEXT: $x10 = COPY [[COPY]](s64) 44 ; RV64I-NEXT: PseudoRET implicit $x10 45 ; 46 ; RV64F-LABEL: name: caller_float_in_regs 47 ; RV64F: bb.1 (%ir-block.0): 48 ; RV64F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 49 ; RV64F-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 50 ; RV64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 51 ; RV64F-NEXT: $x10 = COPY [[C]](s64) 52 ; RV64F-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32) 53 ; RV64F-NEXT: $x11 = COPY [[ANYEXT]](s64) 54 ; RV64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 55 ; RV64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 56 ; RV64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 57 ; RV64F-NEXT: $x10 = COPY [[COPY]](s64) 58 ; RV64F-NEXT: PseudoRET implicit $x10 59 %1 = call i64 @callee_float_in_regs(i64 1, float 2.0) 60 ret i64 %1 61} 62 63define float @callee_tiny_scalar_ret() nounwind { 64 ; RV64-LABEL: name: callee_tiny_scalar_ret 65 ; RV64: bb.1 (%ir-block.0): 66 ; RV64-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 67 ; RV64-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32) 68 ; RV64-NEXT: $x10 = COPY [[ANYEXT]](s64) 69 ; RV64-NEXT: PseudoRET implicit $x10 70 ret float 1.0 71} 72 73define i64 @caller_tiny_scalar_ret() nounwind { 74 ; RV64-LABEL: name: caller_tiny_scalar_ret 75 ; RV64: bb.1 (%ir-block.0): 76 ; RV64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 77 ; RV64-NEXT: PseudoCALL target-flags(riscv-call) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10 78 ; RV64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 79 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 80 ; RV64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) 81 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32) 82 ; RV64-NEXT: $x10 = COPY [[SEXT]](s64) 83 ; RV64-NEXT: PseudoRET implicit $x10 84 %1 = call float @callee_tiny_scalar_ret() 85 %2 = bitcast float %1 to i32 86 %3 = sext i32 %2 to i64 87 ret i64 %3 88} 89