xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv32.mir (revision 5f5faf407b42342708ce31a1ca3095ddff10dad8) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2# RUN: llc -mtriple=riscv32 -mattr='+zba' -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - \
3# RUN: | FileCheck %s
4
5---
6name:            sh1add
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.0.entry:
12    liveins: $x10, $x11
13
14    ; CHECK-LABEL: name: sh1add
15    ; CHECK: liveins: $x10, $x11
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
18    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
19    ; CHECK-NEXT: [[SH1ADD:%[0-9]+]]:gpr = SH1ADD [[COPY]], [[COPY1]]
20    ; CHECK-NEXT: $x10 = COPY [[SH1ADD]]
21    %0:gprb(s32) = COPY $x10
22    %1:gprb(s32) = COPY $x11
23    %2:gprb(s32) = G_CONSTANT i32 1
24    %3:gprb(s32) = G_SHL %0, %2
25    %4:gprb(s32) = G_ADD %3, %1
26    $x10 = COPY %4(s32)
27...
28---
29name:            sh2add
30legalized:       true
31regBankSelected: true
32tracksRegLiveness: true
33body:             |
34  bb.0.entry:
35    liveins: $x10, $x11
36
37    ; CHECK-LABEL: name: sh2add
38    ; CHECK: liveins: $x10, $x11
39    ; CHECK-NEXT: {{  $}}
40    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
41    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
42    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[COPY]], [[COPY1]]
43    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
44    %0:gprb(s32) = COPY $x10
45    %1:gprb(s32) = COPY $x11
46    %2:gprb(s32) = G_CONSTANT i32 2
47    %3:gprb(s32) = G_SHL %0, %2
48    %4:gprb(s32) = G_ADD %3, %1
49    $x10 = COPY %4(s32)
50...
51---
52name:            sh3add
53legalized:       true
54regBankSelected: true
55tracksRegLiveness: true
56body:             |
57  bb.0.entry:
58    liveins: $x10, $x11
59
60    ; CHECK-LABEL: name: sh3add
61    ; CHECK: liveins: $x10, $x11
62    ; CHECK-NEXT: {{  $}}
63    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
64    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
65    ; CHECK-NEXT: [[SH3ADD:%[0-9]+]]:gpr = SH3ADD [[COPY]], [[COPY1]]
66    ; CHECK-NEXT: $x10 = COPY [[SH3ADD]]
67    %0:gprb(s32) = COPY $x10
68    %1:gprb(s32) = COPY $x11
69    %2:gprb(s32) = G_CONSTANT i32 3
70    %3:gprb(s32) = G_SHL %0, %2
71    %4:gprb(s32) = G_ADD %3, %1
72    $x10 = COPY %4(s32)
73...
74---
75name:            no_sh1add
76legalized:       true
77regBankSelected: true
78tracksRegLiveness: true
79body:             |
80  bb.0.entry:
81    liveins: $x10, $x11
82
83    ; CHECK-LABEL: name: no_sh1add
84    ; CHECK: liveins: $x10, $x11
85    ; CHECK-NEXT: {{  $}}
86    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
87    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 1
88    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[SLLI]], 37
89    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
90    %0:gprb(s32) = COPY $x10
91    %1:gprb(s32) = G_CONSTANT i32 37
92    %2:gprb(s32) = G_CONSTANT i32 1
93    %3:gprb(s32) = G_SHL %0, %2
94    %4:gprb(s32) = G_ADD %3, %1
95    $x10 = COPY %4(s32)
96...
97---
98name:            shXadd_complex_shl_and
99legalized:       true
100regBankSelected: true
101tracksRegLiveness: true
102body:             |
103  bb.0.entry:
104    liveins: $x10, $x11
105
106    ; CHECK-LABEL: name: shXadd_complex_shl_and
107    ; CHECK: liveins: $x10, $x11
108    ; CHECK-NEXT: {{  $}}
109    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
110    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
111    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[COPY]], 1
112    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[SRLI]], [[COPY1]]
113    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
114    %0:gprb(s32) = COPY $x10
115    %1:gprb(s32) = COPY $x11
116
117    %2:gprb(s32) = G_CONSTANT i32 1
118    %3:gprb(s32) = G_SHL %0, %2
119    %4:gprb(s32) = G_CONSTANT i32 4294967292
120    %5:gprb(s32) = G_AND %3, %4
121
122    %6:gprb(s32) = G_ADD %5, %1
123    $x10 = COPY %6(s32)
124...
125---
126name:            shXadd_complex_lshr_and
127legalized:       true
128regBankSelected: true
129tracksRegLiveness: true
130body:             |
131  bb.0.entry:
132    liveins: $x10, $x11
133
134    ; CHECK-LABEL: name: shXadd_complex_lshr_and
135    ; CHECK: liveins: $x10, $x11
136    ; CHECK-NEXT: {{  $}}
137    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
138    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
139    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[COPY]], 29
140    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[SRLI]], [[COPY1]]
141    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
142    %0:gprb(s32) = COPY $x10
143    %1:gprb(s32) = COPY $x11
144
145    %2:gprb(s32) = G_CONSTANT i32 27
146    %3:gprb(s32) = G_LSHR %0, %2
147    %4:gprb(s32) = G_CONSTANT i32 60
148    %5:gprb(s32) = G_AND %3, %4
149
150    %6:gprb(s32) = G_ADD %5, %1
151    $x10 = COPY %6(s32)
152...
153