1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 2# RUN: llc -mtriple=riscv64 -run-pass=instruction-select \ 3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s 4 5--- 6name: shl 7legalized: true 8regBankSelected: true 9tracksRegLiveness: true 10body: | 11 bb.0: 12 liveins: $x10, $x11 13 14 ; CHECK-LABEL: name: shl 15 ; CHECK: liveins: $x10, $x11 16 ; CHECK-NEXT: {{ $}} 17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 18 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 19 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]] 20 ; CHECK-NEXT: $x10 = COPY [[SLL]] 21 ; CHECK-NEXT: PseudoRET implicit $x10 22 %0:gprb(s64) = COPY $x10 23 %1:gprb(s64) = COPY $x11 24 %3:gprb(s64) = G_SHL %0, %1 25 $x10 = COPY %3(s64) 26 PseudoRET implicit $x10 27... 28 29--- 30name: shl_and 31legalized: true 32regBankSelected: true 33tracksRegLiveness: true 34body: | 35 bb.0: 36 liveins: $x10, $x11 37 38 ; CHECK-LABEL: name: shl_and 39 ; CHECK: liveins: $x10, $x11 40 ; CHECK-NEXT: {{ $}} 41 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 42 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 43 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]] 44 ; CHECK-NEXT: $x10 = COPY [[SLL]] 45 ; CHECK-NEXT: PseudoRET implicit $x10 46 %0:gprb(s64) = COPY $x10 47 %1:gprb(s64) = COPY $x11 48 %2:gprb(s64) = G_CONSTANT i64 63 49 %3:gprb(s64) = G_AND %1, %2 50 %4:gprb(s64) = G_SHL %0, %3(s64) 51 $x10 = COPY %4(s64) 52 PseudoRET implicit $x10 53... 54 55--- 56name: shl_and_with_simplified_mask 57legalized: true 58regBankSelected: true 59tracksRegLiveness: true 60body: | 61 bb.0: 62 liveins: $x10, $x11 63 64 ; CHECK-LABEL: name: shl_and_with_simplified_mask 65 ; CHECK: liveins: $x10, $x11 66 ; CHECK-NEXT: {{ $}} 67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 68 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 69 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY1]], 62 70 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[ANDI]] 71 ; CHECK-NEXT: $x10 = COPY [[SLL]] 72 ; CHECK-NEXT: PseudoRET implicit $x10 73 %0:gprb(s64) = COPY $x10 74 %1:gprb(s64) = COPY $x11 75 %2:gprb(s64) = G_CONSTANT i64 62 76 %3:gprb(s64) = G_AND %1, %2 77 %4:gprb(s64) = G_CONSTANT i64 62 78 %5:gprb(s64) = G_AND %3, %4 79 %6:gprb(s64) = G_SHL %0, %5(s64) 80 $x10 = COPY %6(s64) 81 PseudoRET implicit $x10 82... 83 84--- 85name: shl_add 86legalized: true 87regBankSelected: true 88tracksRegLiveness: true 89body: | 90 bb.0: 91 liveins: $x10, $x11 92 93 ; CHECK-LABEL: name: shl_add 94 ; CHECK: liveins: $x10, $x11 95 ; CHECK-NEXT: {{ $}} 96 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 97 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 98 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]] 99 ; CHECK-NEXT: $x10 = COPY [[SLL]] 100 ; CHECK-NEXT: PseudoRET implicit $x10 101 %0:gprb(s64) = COPY $x10 102 %1:gprb(s64) = COPY $x11 103 %2:gprb(s64) = G_CONSTANT i64 64 104 %3:gprb(s64) = G_ADD %1, %2 105 %4:gprb(s64) = G_SHL %0, %3(s64) 106 $x10 = COPY %4(s64) 107 PseudoRET implicit $x10 108... 109 110--- 111name: shl_sub 112legalized: true 113regBankSelected: true 114tracksRegLiveness: true 115body: | 116 bb.0: 117 liveins: $x10, $x11 118 119 ; CHECK-LABEL: name: shl_sub 120 ; CHECK: liveins: $x10, $x11 121 ; CHECK-NEXT: {{ $}} 122 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 123 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 124 ; CHECK-NEXT: [[SUBW:%[0-9]+]]:gpr = SUBW $x0, [[COPY1]] 125 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[SUBW]] 126 ; CHECK-NEXT: $x10 = COPY [[SLL]] 127 ; CHECK-NEXT: PseudoRET implicit $x10 128 %0:gprb(s64) = COPY $x10 129 %1:gprb(s64) = COPY $x11 130 %2:gprb(s64) = G_CONSTANT i64 64 131 %3:gprb(s64) = G_SUB %2, %1 132 %4:gprb(s64) = G_SHL %0, %3(s64) 133 $x10 = COPY %4(s64) 134 PseudoRET implicit $x10 135... 136 137--- 138name: shl_bitwise_not 139legalized: true 140regBankSelected: true 141tracksRegLiveness: true 142body: | 143 bb.0: 144 liveins: $x10, $x11 145 146 ; CHECK-LABEL: name: shl_bitwise_not 147 ; CHECK: liveins: $x10, $x11 148 ; CHECK-NEXT: {{ $}} 149 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 150 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 151 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1 152 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]] 153 ; CHECK-NEXT: $x10 = COPY [[SLL]] 154 ; CHECK-NEXT: PseudoRET implicit $x10 155 %0:gprb(s64) = COPY $x10 156 %1:gprb(s64) = COPY $x11 157 %2:gprb(s64) = G_CONSTANT i64 -1 158 %3:gprb(s64) = G_SUB %2, %1 159 %4:gprb(s64) = G_SHL %0, %3(s64) 160 $x10 = COPY %4(s64) 161 PseudoRET implicit $x10 162... 163 164--- 165name: shl_bitwise_not_2 166legalized: true 167regBankSelected: true 168tracksRegLiveness: true 169body: | 170 bb.0: 171 liveins: $x10, $x11 172 173 ; CHECK-LABEL: name: shl_bitwise_not_2 174 ; CHECK: liveins: $x10, $x11 175 ; CHECK-NEXT: {{ $}} 176 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 177 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 178 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1 179 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]] 180 ; CHECK-NEXT: $x10 = COPY [[SLL]] 181 ; CHECK-NEXT: PseudoRET implicit $x10 182 %0:gprb(s64) = COPY $x10 183 %1:gprb(s64) = COPY $x11 184 %2:gprb(s64) = G_CONSTANT i64 63 185 %3:gprb(s64) = G_SUB %2, %1 186 %4:gprb(s64) = G_SHL %0, %3(s64) 187 $x10 = COPY %4(s64) 188 PseudoRET implicit $x10 189... 190 191--- 192name: shl_and_zext 193legalized: true 194regBankSelected: true 195tracksRegLiveness: true 196body: | 197 bb.0: 198 liveins: $x10, $x11 199 200 ; CHECK-LABEL: name: shl_and_zext 201 ; CHECK: liveins: $x10, $x11 202 ; CHECK-NEXT: {{ $}} 203 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 204 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 205 ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY1]], 0 :: (load (s32)) 206 ; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[LW]] 207 ; CHECK-NEXT: $x10 = COPY [[SLL]] 208 ; CHECK-NEXT: PseudoRET implicit $x10 209 %0:gprb(s64) = COPY $x10 210 %1:gprb(p0) = COPY $x11 211 %2:gprb(s64) = G_LOAD %1(p0) :: (load (s32)) 212 %3:gprb(s64) = G_CONSTANT i64 63 213 %4:gprb(s64) = G_AND %2, %3 214 %5:gprb(s64) = G_SHL %0, %4(s64) 215 $x10 = COPY %5(s64) 216 PseudoRET implicit $x10 217... 218 219--- 220name: srl_and_needed 221legalized: true 222regBankSelected: true 223tracksRegLiveness: true 224body: | 225 bb.1.entry: 226 liveins: $x10, $x11 227 228 ; CHECK-LABEL: name: srl_and_needed 229 ; CHECK: liveins: $x10, $x11 230 ; CHECK-NEXT: {{ $}} 231 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 232 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 233 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 15 234 ; CHECK-NEXT: [[SRL:%[0-9]+]]:gpr = SRL [[COPY1]], [[ANDI]] 235 ; CHECK-NEXT: $x10 = COPY [[SRL]] 236 ; CHECK-NEXT: PseudoRET implicit $x10 237 %0:gprb(s64) = COPY $x10 238 %1:gprb(s64) = COPY $x11 239 %2:gprb(s64) = G_CONSTANT i64 15 240 %3:gprb(s64) = G_AND %0, %2 241 %4:gprb(s64) = G_LSHR %1, %3(s64) 242 $x10 = COPY %4(s64) 243 PseudoRET implicit $x10 244... 245 246--- 247name: srl_and_eliminated 248legalized: true 249regBankSelected: true 250tracksRegLiveness: true 251body: | 252 bb.1.entry: 253 liveins: $x10, $x11 254 255 ; CHECK-LABEL: name: srl_and_eliminated 256 ; CHECK: liveins: $x10, $x11 257 ; CHECK-NEXT: {{ $}} 258 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 259 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 260 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 79 261 ; CHECK-NEXT: [[SRL:%[0-9]+]]:gpr = SRL [[COPY1]], [[ANDI]] 262 ; CHECK-NEXT: $x10 = COPY [[SRL]] 263 ; CHECK-NEXT: PseudoRET implicit $x10 264 %0:gprb(s64) = COPY $x10 265 %1:gprb(s64) = COPY $x11 266 %2:gprb(s64) = G_CONSTANT i64 15 267 %6:gprb(s64) = G_CONSTANT i64 79 268 %7:gprb(s64) = G_AND %0, %6 269 %3:gprb(s64) = G_AND %7, %2 270 %5:gprb(s64) = G_LSHR %1, %3(s64) 271 $x10 = COPY %5(s64) 272 PseudoRET implicit $x10 273... 274