xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/ptrmask-rv32.mir (revision a6f72785951b36c0c02227bf4eac4ea733fa6694) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            ptrmask_p0_s32
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9body:             |
10  bb.0:
11    liveins: $x10, $x11
12    ; CHECK-LABEL: name: ptrmask_p0_s32
13    ; CHECK: liveins: $x10, $x11
14    ; CHECK-NEXT: {{  $}}
15    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
16    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
17    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[COPY]], [[COPY1]]
18    ; CHECK-NEXT: $x10 = COPY [[AND]]
19    ; CHECK-NEXT: PseudoRET implicit $x10
20    %0:gprb(p0) = COPY $x10
21    %1:gprb(s32) = COPY $x11
22    %2:gprb(p0) = G_PTRMASK %0(p0), %1(s32)
23    $x10 = COPY %2(p0)
24    PseudoRET implicit $x10
25...
26
27---
28name:            ptrmask_p0_const_s32
29legalized:       true
30regBankSelected: true
31tracksRegLiveness: true
32body:             |
33  bb.0:
34    liveins: $x10
35    ; CHECK-LABEL: name: ptrmask_p0_const_s32
36    ; CHECK: liveins: $x10
37    ; CHECK-NEXT: {{  $}}
38    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
39    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 10
40    ; CHECK-NEXT: $x10 = COPY [[ANDI]]
41    ; CHECK-NEXT: PseudoRET implicit $x10
42    %0:gprb(p0) = COPY $x10
43    %1:gprb(s32) = G_CONSTANT i32 10
44    %2:gprb(p0) = G_PTRMASK %0(p0), %1(s32)
45    $x10 = COPY %2(p0)
46    PseudoRET implicit $x10
47...
48