xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/merge-unmerge-rv32.mir (revision dbb9043dea238fa4e5b6a9a7fef99623b543493e)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4
5---
6name:            merge_i64
7legalized: true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.0.entry:
12    liveins: $x10
13    ; CHECK-LABEL: name: merge_i64
14    ; CHECK: liveins: $x10
15    ; CHECK-NEXT: {{  $}}
16    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
17    ; CHECK-NEXT: [[BuildPairF64Pseudo:%[0-9]+]]:fpr64 = BuildPairF64Pseudo [[COPY]], [[COPY]]
18    ; CHECK-NEXT: $f10_d = COPY [[BuildPairF64Pseudo]]
19    ; CHECK-NEXT: PseudoRET implicit $f10_d
20    %0:gprb(s32) = COPY $x10
21    %1:fprb(s64) = G_MERGE_VALUES %0(s32), %0(s32)
22    $f10_d = COPY %1(s64)
23    PseudoRET implicit $f10_d
24...
25---
26name:            unmerge_i32
27legalized: true
28regBankSelected: true
29tracksRegLiveness: true
30body:             |
31  bb.0.entry:
32    liveins: $f10_d
33    ; CHECK-LABEL: name: unmerge_i32
34    ; CHECK: liveins: $f10_d
35    ; CHECK-NEXT: {{  $}}
36    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
37    ; CHECK-NEXT: [[SplitF64Pseudo:%[0-9]+]]:gpr, [[SplitF64Pseudo1:%[0-9]+]]:gpr = SplitF64Pseudo [[COPY]]
38    ; CHECK-NEXT: $x10 = COPY [[SplitF64Pseudo]]
39    ; CHECK-NEXT: PseudoRET implicit $x10
40    %0:fprb(s64) = COPY $f10_d
41    %1:gprb(s32), %2:gprb(s32) = G_UNMERGE_VALUES %0(s64)
42    $x10 = COPY %1(s32)
43    PseudoRET implicit $x10
44...
45