xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir (revision a6c80c4f70c35da2227cd01cf6558d62ee8ed45c) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
3# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4
5---
6name:            sitofp_s32_s32
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.0:
12    liveins: $x10
13
14    ; CHECK-LABEL: name: sitofp_s32_s32
15    ; CHECK: liveins: $x10
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
18    ; CHECK-NEXT: [[FCVT_S_W:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[COPY]], 7
19    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_W]]
20    ; CHECK-NEXT: PseudoRET implicit $f10_f
21    %0:gprb(s32) = COPY $x10
22    %1:fprb(s32) = G_SITOFP %0(s32)
23    $f10_f = COPY %1(s32)
24    PseudoRET implicit $f10_f
25
26...
27---
28name:            uitofp_s32_s32
29legalized:       true
30regBankSelected: true
31tracksRegLiveness: true
32body:             |
33  bb.0:
34    liveins: $x10
35
36    ; CHECK-LABEL: name: uitofp_s32_s32
37    ; CHECK: liveins: $x10
38    ; CHECK-NEXT: {{  $}}
39    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
40    ; CHECK-NEXT: [[FCVT_S_WU:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_WU [[COPY]], 7
41    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_WU]]
42    ; CHECK-NEXT: PseudoRET implicit $f10_f
43    %0:gprb(s32) = COPY $x10
44    %1:fprb(s32) = G_UITOFP %0(s32)
45    $f10_f = COPY %1(s32)
46    PseudoRET implicit $f10_f
47
48...
49---
50name:            sitofp_s64_s32
51legalized:       true
52regBankSelected: true
53tracksRegLiveness: true
54body:             |
55  bb.0:
56    liveins: $x10
57
58    ; CHECK-LABEL: name: sitofp_s64_s32
59    ; CHECK: liveins: $x10
60    ; CHECK-NEXT: {{  $}}
61    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
62    ; CHECK-NEXT: [[FCVT_D_W:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_W [[COPY]], 0
63    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_W]]
64    ; CHECK-NEXT: PseudoRET implicit $f10_d
65    %0:gprb(s32) = COPY $x10
66    %1:fprb(s64) = G_SITOFP %0(s32)
67    $f10_d = COPY %1(s64)
68    PseudoRET implicit $f10_d
69
70...
71---
72name:            uitofp_s64_s32
73legalized:       true
74regBankSelected: true
75tracksRegLiveness: true
76body:             |
77  bb.0:
78    liveins: $x10
79
80    ; CHECK-LABEL: name: uitofp_s64_s32
81    ; CHECK: liveins: $x10
82    ; CHECK-NEXT: {{  $}}
83    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
84    ; CHECK-NEXT: [[FCVT_D_WU:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_WU [[COPY]], 0
85    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_WU]]
86    ; CHECK-NEXT: PseudoRET implicit $f10_d
87    %0:gprb(s32) = COPY $x10
88    %1:fprb(s64) = G_UITOFP %0(s32)
89    $f10_d = COPY %1(s64)
90    PseudoRET implicit $f10_d
91
92...
93