xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/is-fpclass-rv64.mir (revision 19183691f32c8cc6967322523f6fa338617929bd)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select -verify-machineinstrs %s -o - | \
3# RUN: FileCheck %s
4
5---
6name:            is_fpclass_f32
7legalized:       true
8regBankSelected: true
9body:             |
10  bb.0:
11    liveins: $f10_f
12
13    ; CHECK-LABEL: name: is_fpclass_f32
14    ; CHECK: liveins: $f10_f
15    ; CHECK-NEXT: {{  $}}
16    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
17    ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]
18    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 152
19    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
20    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
21    ; CHECK-NEXT: PseudoRET implicit $x10
22    %0:fprb(s32) = COPY $f10_f
23    %3:gprb(s64) = G_CONSTANT i64 152
24    %4:gprb(s64) = G_CONSTANT i64 0
25    %5:gprb(s64) = G_FCLASS %0(s32)
26    %6:gprb(s64) = G_AND %5, %3
27    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
28    $x10 = COPY %7(s64)
29    PseudoRET implicit $x10
30...
31---
32name:            is_fpclass_f32_onehot
33legalized:       true
34regBankSelected: true
35body:             |
36  bb.0:
37    liveins: $f10_f
38
39    ; CHECK-LABEL: name: is_fpclass_f32_onehot
40    ; CHECK: liveins: $f10_f
41    ; CHECK-NEXT: {{  $}}
42    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
43    ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]
44    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 256
45    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
46    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
47    ; CHECK-NEXT: PseudoRET implicit $x10
48    %0:fprb(s32) = COPY $f10_f
49    %3:gprb(s64) = G_CONSTANT i64 256
50    %4:gprb(s64) = G_CONSTANT i64 0
51    %5:gprb(s64) = G_FCLASS %0(s32)
52    %6:gprb(s64) = G_AND %5, %3
53    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
54    $x10 = COPY %7(s64)
55    PseudoRET implicit $x10
56...
57---
58name:            is_fpclass_f32_one
59legalized:       true
60regBankSelected: true
61body:             |
62  bb.0:
63    liveins: $f10_f
64
65    ; CHECK-LABEL: name: is_fpclass_f32_one
66    ; CHECK: liveins: $f10_f
67    ; CHECK-NEXT: {{  $}}
68    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
69    ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]
70    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 1
71    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
72    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
73    ; CHECK-NEXT: PseudoRET implicit $x10
74    %0:fprb(s32) = COPY $f10_f
75    %3:gprb(s64) = G_CONSTANT i64 1
76    %4:gprb(s64) = G_CONSTANT i64 0
77    %5:gprb(s64) = G_FCLASS %0(s32)
78    %6:gprb(s64) = G_AND %5, %3
79    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
80    $x10 = COPY %7(s64)
81    PseudoRET implicit $x10
82...
83---
84name:            is_fpclass_f64
85legalized:       true
86regBankSelected: true
87body:             |
88  bb.0:
89    liveins: $f10_d
90
91    ; CHECK-LABEL: name: is_fpclass_f64
92    ; CHECK: liveins: $f10_d
93    ; CHECK-NEXT: {{  $}}
94    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
95    ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]
96    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 152
97    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
98    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
99    ; CHECK-NEXT: PseudoRET implicit $x10
100    %0:fprb(s64) = COPY $f10_d
101    %3:gprb(s64) = G_CONSTANT i64 152
102    %4:gprb(s64) = G_CONSTANT i64 0
103    %5:gprb(s64) = G_FCLASS %0(s64)
104    %6:gprb(s64) = G_AND %5, %3
105    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
106    $x10 = COPY %7(s64)
107    PseudoRET implicit $x10
108...
109---
110name:            is_fpclass_f64_onehot
111legalized:       true
112regBankSelected: true
113body:             |
114  bb.0:
115    liveins: $f10_d
116
117    ; CHECK-LABEL: name: is_fpclass_f64_onehot
118    ; CHECK: liveins: $f10_d
119    ; CHECK-NEXT: {{  $}}
120    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
121    ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]
122    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 256
123    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
124    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
125    ; CHECK-NEXT: PseudoRET implicit $x10
126    %0:fprb(s64) = COPY $f10_d
127    %3:gprb(s64) = G_CONSTANT i64 256
128    %4:gprb(s64) = G_CONSTANT i64 0
129    %5:gprb(s64) = G_FCLASS %0(s64)
130    %6:gprb(s64) = G_AND %5, %3
131    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
132    $x10 = COPY %7(s64)
133    PseudoRET implicit $x10
134...
135---
136name:            is_fpclass_f64_one
137legalized:       true
138regBankSelected: true
139body:             |
140  bb.0:
141    liveins: $f10_d
142
143    ; CHECK-LABEL: name: is_fpclass_f64_one
144    ; CHECK: liveins: $f10_d
145    ; CHECK-NEXT: {{  $}}
146    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
147    ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]
148    ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 1
149    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]
150    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
151    ; CHECK-NEXT: PseudoRET implicit $x10
152    %0:fprb(s64) = COPY $f10_d
153    %3:gprb(s64) = G_CONSTANT i64 1
154    %4:gprb(s64) = G_CONSTANT i64 0
155    %5:gprb(s64) = G_FCLASS %0(s64)
156    %6:gprb(s64) = G_AND %5, %3
157    %7:gprb(s64) = G_ICMP intpred(ne), %6(s64), %4
158    $x10 = COPY %7(s64)
159    PseudoRET implicit $x10
160...
161