1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 2# RUN: llc -mtriple=riscv32 -mattr=+zfh -run-pass=instruction-select -verify-machineinstrs %s -o - | \ 3# RUN: FileCheck %s 4 5--- 6name: is_fpclass_f16 7legalized: true 8regBankSelected: true 9body: | 10 bb.0: 11 liveins: $f10_h 12 13 ; CHECK-LABEL: name: is_fpclass_f16 14 ; CHECK: liveins: $f10_h 15 ; CHECK-NEXT: {{ $}} 16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h 17 ; CHECK-NEXT: [[FCLASS_H:%[0-9]+]]:gpr = FCLASS_H [[COPY]] 18 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_H]], 152 19 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]] 20 ; CHECK-NEXT: $x10 = COPY [[SLTU]] 21 ; CHECK-NEXT: PseudoRET implicit $x10 22 %0:fprb(s16) = COPY $f10_h 23 %3:gprb(s32) = G_CONSTANT i32 152 24 %4:gprb(s32) = G_CONSTANT i32 0 25 %5:gprb(s32) = G_FCLASS %0(s16) 26 %6:gprb(s32) = G_AND %5, %3 27 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4 28 $x10 = COPY %7(s32) 29 PseudoRET implicit $x10 30... 31--- 32name: is_fpclass_f16_onehot 33legalized: true 34regBankSelected: true 35body: | 36 bb.0: 37 liveins: $f10_h 38 39 ; CHECK-LABEL: name: is_fpclass_f16_onehot 40 ; CHECK: liveins: $f10_h 41 ; CHECK-NEXT: {{ $}} 42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h 43 ; CHECK-NEXT: [[FCLASS_H:%[0-9]+]]:gpr = FCLASS_H [[COPY]] 44 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_H]], 256 45 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]] 46 ; CHECK-NEXT: $x10 = COPY [[SLTU]] 47 ; CHECK-NEXT: PseudoRET implicit $x10 48 %0:fprb(s16) = COPY $f10_h 49 %3:gprb(s32) = G_CONSTANT i32 256 50 %4:gprb(s32) = G_CONSTANT i32 0 51 %5:gprb(s32) = G_FCLASS %0(s16) 52 %6:gprb(s32) = G_AND %5, %3 53 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4 54 $x10 = COPY %7(s32) 55 PseudoRET implicit $x10 56... 57--- 58name: is_fpclass_f16_one 59legalized: true 60regBankSelected: true 61body: | 62 bb.0: 63 liveins: $f10_h 64 65 ; CHECK-LABEL: name: is_fpclass_f16_one 66 ; CHECK: liveins: $f10_h 67 ; CHECK-NEXT: {{ $}} 68 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h 69 ; CHECK-NEXT: [[FCLASS_H:%[0-9]+]]:gpr = FCLASS_H [[COPY]] 70 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_H]], 1 71 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]] 72 ; CHECK-NEXT: $x10 = COPY [[SLTU]] 73 ; CHECK-NEXT: PseudoRET implicit $x10 74 %0:fprb(s16) = COPY $f10_h 75 %3:gprb(s32) = G_CONSTANT i32 1 76 %4:gprb(s32) = G_CONSTANT i32 0 77 %5:gprb(s32) = G_FCLASS %0(s16) 78 %6:gprb(s32) = G_AND %5, %3 79 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4 80 $x10 = COPY %7(s32) 81 PseudoRET implicit $x10 82... 83