xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/icmp-rv32.mir (revision 65f946cba4085d3d3054a0db3ed0e4006b6cf783) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -simplify-mir \
3# RUN: -verify-machineinstrs %s -o - | FileCheck %s
4---
5name:            cmp_ult_i32
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9body:             |
10  bb.0.entry:
11    liveins: $x10, $x11
12
13    ; CHECK-LABEL: name: cmp_ult_i32
14    ; CHECK: liveins: $x10, $x11
15    ; CHECK-NEXT: {{  $}}
16    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
17    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
18    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
19    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
20    ; CHECK-NEXT: PseudoRET implicit $x10
21    %0:gprb(s32) = COPY $x10
22    %1:gprb(s32) = COPY $x11
23    %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
24    $x10 = COPY %2(s32)
25    PseudoRET implicit $x10
26
27...
28---
29name:            cmp_slt_i32
30legalized:       true
31regBankSelected: true
32tracksRegLiveness: true
33body:             |
34  bb.0.entry:
35    liveins: $x10, $x11
36
37    ; CHECK-LABEL: name: cmp_slt_i32
38    ; CHECK: liveins: $x10, $x11
39    ; CHECK-NEXT: {{  $}}
40    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
41    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
42    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
43    ; CHECK-NEXT: $x10 = COPY [[SLT]]
44    ; CHECK-NEXT: PseudoRET implicit $x10
45    %0:gprb(s32) = COPY $x10
46    %1:gprb(s32) = COPY $x11
47    %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
48    $x10 = COPY %2(s32)
49    PseudoRET implicit $x10
50
51...
52---
53name:            cmp_ugt_i32
54legalized:       true
55regBankSelected: true
56tracksRegLiveness: true
57body:             |
58  bb.0.entry:
59    liveins: $x10, $x11
60
61    ; CHECK-LABEL: name: cmp_ugt_i32
62    ; CHECK: liveins: $x10, $x11
63    ; CHECK-NEXT: {{  $}}
64    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
65    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
66    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
67    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
68    ; CHECK-NEXT: PseudoRET implicit $x10
69    %0:gprb(s32) = COPY $x10
70    %1:gprb(s32) = COPY $x11
71    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
72    $x10 = COPY %2(s32)
73    PseudoRET implicit $x10
74
75...
76---
77name:            cmp_sgt_i32
78legalized:       true
79regBankSelected: true
80tracksRegLiveness: true
81body:             |
82  bb.0.entry:
83    liveins: $x10, $x11
84
85    ; CHECK-LABEL: name: cmp_sgt_i32
86    ; CHECK: liveins: $x10, $x11
87    ; CHECK-NEXT: {{  $}}
88    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
89    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
90    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
91    ; CHECK-NEXT: $x10 = COPY [[SLT]]
92    ; CHECK-NEXT: PseudoRET implicit $x10
93    %0:gprb(s32) = COPY $x10
94    %1:gprb(s32) = COPY $x11
95    %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
96    $x10 = COPY %2(s32)
97    PseudoRET implicit $x10
98
99...
100---
101name:            cmp_eq_i32
102legalized:       true
103regBankSelected: true
104tracksRegLiveness: true
105body:             |
106  bb.0.entry:
107    liveins: $x10, $x11
108
109    ; CHECK-LABEL: name: cmp_eq_i32
110    ; CHECK: liveins: $x10, $x11
111    ; CHECK-NEXT: {{  $}}
112    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
113    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
114    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
115    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
116    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
117    ; CHECK-NEXT: PseudoRET implicit $x10
118    %0:gprb(s32) = COPY $x10
119    %1:gprb(s32) = COPY $x11
120    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
121    $x10 = COPY %2(s32)
122    PseudoRET implicit $x10
123
124...
125---
126name:            cmp_ne_i32
127legalized:       true
128regBankSelected: true
129tracksRegLiveness: true
130body:             |
131  bb.0.entry:
132    liveins: $x10, $x11
133
134    ; CHECK-LABEL: name: cmp_ne_i32
135    ; CHECK: liveins: $x10, $x11
136    ; CHECK-NEXT: {{  $}}
137    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
138    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
139    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
140    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
141    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
142    ; CHECK-NEXT: PseudoRET implicit $x10
143    %0:gprb(s32) = COPY $x10
144    %1:gprb(s32) = COPY $x11
145    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
146    $x10 = COPY %2(s32)
147    PseudoRET implicit $x10
148
149...
150---
151name:            cmp_ule_i32
152legalized:       true
153regBankSelected: true
154tracksRegLiveness: true
155body:             |
156  bb.0.entry:
157    liveins: $x10, $x11
158
159    ; CHECK-LABEL: name: cmp_ule_i32
160    ; CHECK: liveins: $x10, $x11
161    ; CHECK-NEXT: {{  $}}
162    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
163    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
164    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
165    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
166    ; CHECK-NEXT: $x10 = COPY [[XORI]]
167    ; CHECK-NEXT: PseudoRET implicit $x10
168    %0:gprb(s32) = COPY $x10
169    %1:gprb(s32) = COPY $x11
170    %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
171    $x10 = COPY %2(s32)
172    PseudoRET implicit $x10
173
174...
175---
176name:            cmp_sle_i32
177legalized:       true
178regBankSelected: true
179tracksRegLiveness: true
180body:             |
181  bb.0.entry:
182    liveins: $x10, $x11
183
184    ; CHECK-LABEL: name: cmp_sle_i32
185    ; CHECK: liveins: $x10, $x11
186    ; CHECK-NEXT: {{  $}}
187    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
188    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
189    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
190    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
191    ; CHECK-NEXT: $x10 = COPY [[XORI]]
192    ; CHECK-NEXT: PseudoRET implicit $x10
193    %0:gprb(s32) = COPY $x10
194    %1:gprb(s32) = COPY $x11
195    %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
196    $x10 = COPY %2(s32)
197    PseudoRET implicit $x10
198
199...
200---
201name:            cmp_uge_i32
202legalized:       true
203regBankSelected: true
204tracksRegLiveness: true
205body:             |
206  bb.0.entry:
207    liveins: $x10, $x11
208
209    ; CHECK-LABEL: name: cmp_uge_i32
210    ; CHECK: liveins: $x10, $x11
211    ; CHECK-NEXT: {{  $}}
212    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
213    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
214    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
215    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
216    ; CHECK-NEXT: $x10 = COPY [[XORI]]
217    ; CHECK-NEXT: PseudoRET implicit $x10
218    %0:gprb(s32) = COPY $x10
219    %1:gprb(s32) = COPY $x11
220    %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
221    $x10 = COPY %2(s32)
222    PseudoRET implicit $x10
223
224...
225---
226name:            cmp_sge_i32
227legalized:       true
228regBankSelected: true
229tracksRegLiveness: true
230body:             |
231  bb.0.entry:
232    liveins: $x10, $x11
233
234    ; CHECK-LABEL: name: cmp_sge_i32
235    ; CHECK: liveins: $x10, $x11
236    ; CHECK-NEXT: {{  $}}
237    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
238    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
239    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
240    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
241    ; CHECK-NEXT: $x10 = COPY [[XORI]]
242    ; CHECK-NEXT: PseudoRET implicit $x10
243    %0:gprb(s32) = COPY $x10
244    %1:gprb(s32) = COPY $x11
245    %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
246    $x10 = COPY %2(s32)
247    PseudoRET implicit $x10
248
249...
250---
251name:            cmp_ult_p0
252legalized:       true
253regBankSelected: true
254tracksRegLiveness: true
255body:             |
256  bb.0.entry:
257    liveins: $x10, $x11
258
259    ; CHECK-LABEL: name: cmp_ult_p0
260    ; CHECK: liveins: $x10, $x11
261    ; CHECK-NEXT: {{  $}}
262    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
263    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
264    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
265    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
266    ; CHECK-NEXT: PseudoRET implicit $x10
267    %0:gprb(p0) = COPY $x10
268    %1:gprb(p0) = COPY $x11
269    %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
270    $x10 = COPY %2(s32)
271    PseudoRET implicit $x10
272
273...
274---
275name:            cmp_slt_p0
276legalized:       true
277regBankSelected: true
278tracksRegLiveness: true
279body:             |
280  bb.0.entry:
281    liveins: $x10, $x11
282
283    ; CHECK-LABEL: name: cmp_slt_p0
284    ; CHECK: liveins: $x10, $x11
285    ; CHECK-NEXT: {{  $}}
286    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
287    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
288    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
289    ; CHECK-NEXT: $x10 = COPY [[SLT]]
290    ; CHECK-NEXT: PseudoRET implicit $x10
291    %0:gprb(p0) = COPY $x10
292    %1:gprb(p0) = COPY $x11
293    %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
294    $x10 = COPY %2(s32)
295    PseudoRET implicit $x10
296
297...
298---
299name:            cmp_ugt_p0
300legalized:       true
301regBankSelected: true
302tracksRegLiveness: true
303body:             |
304  bb.0.entry:
305    liveins: $x10, $x11
306
307    ; CHECK-LABEL: name: cmp_ugt_p0
308    ; CHECK: liveins: $x10, $x11
309    ; CHECK-NEXT: {{  $}}
310    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
311    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
312    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
313    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
314    ; CHECK-NEXT: PseudoRET implicit $x10
315    %0:gprb(p0) = COPY $x10
316    %1:gprb(p0) = COPY $x11
317    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
318    $x10 = COPY %2(s32)
319    PseudoRET implicit $x10
320
321...
322---
323name:            cmp_sgt_p0
324legalized:       true
325regBankSelected: true
326tracksRegLiveness: true
327body:             |
328  bb.0.entry:
329    liveins: $x10, $x11
330
331    ; CHECK-LABEL: name: cmp_sgt_p0
332    ; CHECK: liveins: $x10, $x11
333    ; CHECK-NEXT: {{  $}}
334    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
335    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
336    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
337    ; CHECK-NEXT: $x10 = COPY [[SLT]]
338    ; CHECK-NEXT: PseudoRET implicit $x10
339    %0:gprb(p0) = COPY $x10
340    %1:gprb(p0) = COPY $x11
341    %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
342    $x10 = COPY %2(s32)
343    PseudoRET implicit $x10
344
345...
346---
347name:            cmp_eq_p0
348legalized:       true
349regBankSelected: true
350tracksRegLiveness: true
351body:             |
352  bb.0.entry:
353    liveins: $x10, $x11
354
355    ; CHECK-LABEL: name: cmp_eq_p0
356    ; CHECK: liveins: $x10, $x11
357    ; CHECK-NEXT: {{  $}}
358    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
359    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
360    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
361    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
362    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
363    ; CHECK-NEXT: PseudoRET implicit $x10
364    %0:gprb(p0) = COPY $x10
365    %1:gprb(p0) = COPY $x11
366    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
367    $x10 = COPY %2(s32)
368    PseudoRET implicit $x10
369
370...
371---
372name:            cmp_ne_p0
373legalized:       true
374regBankSelected: true
375tracksRegLiveness: true
376body:             |
377  bb.0.entry:
378    liveins: $x10, $x11
379
380    ; CHECK-LABEL: name: cmp_ne_p0
381    ; CHECK: liveins: $x10, $x11
382    ; CHECK-NEXT: {{  $}}
383    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
384    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
385    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[COPY1]]
386    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
387    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
388    ; CHECK-NEXT: PseudoRET implicit $x10
389    %0:gprb(p0) = COPY $x10
390    %1:gprb(p0) = COPY $x11
391    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
392    $x10 = COPY %2(s32)
393    PseudoRET implicit $x10
394
395...
396---
397name:            cmp_ule_p0
398legalized:       true
399regBankSelected: true
400tracksRegLiveness: true
401body:             |
402  bb.0.entry:
403    liveins: $x10, $x11
404
405    ; CHECK-LABEL: name: cmp_ule_p0
406    ; CHECK: liveins: $x10, $x11
407    ; CHECK-NEXT: {{  $}}
408    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
409    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
410    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY1]], [[COPY]]
411    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
412    ; CHECK-NEXT: $x10 = COPY [[XORI]]
413    ; CHECK-NEXT: PseudoRET implicit $x10
414    %0:gprb(p0) = COPY $x10
415    %1:gprb(p0) = COPY $x11
416    %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
417    $x10 = COPY %2(s32)
418    PseudoRET implicit $x10
419
420...
421---
422name:            cmp_sle_p0
423legalized:       true
424regBankSelected: true
425tracksRegLiveness: true
426body:             |
427  bb.0.entry:
428    liveins: $x10, $x11
429
430    ; CHECK-LABEL: name: cmp_sle_p0
431    ; CHECK: liveins: $x10, $x11
432    ; CHECK-NEXT: {{  $}}
433    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
434    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
435    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY1]], [[COPY]]
436    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
437    ; CHECK-NEXT: $x10 = COPY [[XORI]]
438    ; CHECK-NEXT: PseudoRET implicit $x10
439    %0:gprb(p0) = COPY $x10
440    %1:gprb(p0) = COPY $x11
441    %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
442    $x10 = COPY %2(s32)
443    PseudoRET implicit $x10
444
445...
446---
447name:            cmp_uge_p0
448legalized:       true
449regBankSelected: true
450tracksRegLiveness: true
451body:             |
452  bb.0.entry:
453    liveins: $x10, $x11
454
455    ; CHECK-LABEL: name: cmp_uge_p0
456    ; CHECK: liveins: $x10, $x11
457    ; CHECK-NEXT: {{  $}}
458    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
459    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
460    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[COPY1]]
461    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
462    ; CHECK-NEXT: $x10 = COPY [[XORI]]
463    ; CHECK-NEXT: PseudoRET implicit $x10
464    %0:gprb(p0) = COPY $x10
465    %1:gprb(p0) = COPY $x11
466    %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
467    $x10 = COPY %2(s32)
468    PseudoRET implicit $x10
469
470...
471---
472name:            cmp_sge_p0
473legalized:       true
474regBankSelected: true
475tracksRegLiveness: true
476body:             |
477  bb.0.entry:
478    liveins: $x10, $x11
479
480    ; CHECK-LABEL: name: cmp_sge_p0
481    ; CHECK: liveins: $x10, $x11
482    ; CHECK-NEXT: {{  $}}
483    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
484    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
485    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[COPY1]]
486    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
487    ; CHECK-NEXT: $x10 = COPY [[XORI]]
488    ; CHECK-NEXT: PseudoRET implicit $x10
489    %0:gprb(p0) = COPY $x10
490    %1:gprb(p0) = COPY $x11
491    %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
492    $x10 = COPY %2(s32)
493    PseudoRET implicit $x10
494
495...
496---
497name:            cmp_ulti_i32
498legalized:       true
499regBankSelected: true
500tracksRegLiveness: true
501body:             |
502  bb.0.entry:
503    liveins: $x10
504
505    ; CHECK-LABEL: name: cmp_ulti_i32
506    ; CHECK: liveins: $x10
507    ; CHECK-NEXT: {{  $}}
508    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
509    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 10
510    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
511    ; CHECK-NEXT: PseudoRET implicit $x10
512    %0:gprb(s32) = COPY $x10
513    %1:gprb(s32) = G_CONSTANT i32 10
514    %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
515    $x10 = COPY %2(s32)
516    PseudoRET implicit $x10
517
518...
519---
520name:            cmp_slti_i32
521legalized:       true
522regBankSelected: true
523tracksRegLiveness: true
524body:             |
525  bb.0.entry:
526    liveins: $x10
527
528    ; CHECK-LABEL: name: cmp_slti_i32
529    ; CHECK: liveins: $x10
530    ; CHECK-NEXT: {{  $}}
531    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
532    ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -10
533    ; CHECK-NEXT: $x10 = COPY [[SLTI]]
534    ; CHECK-NEXT: PseudoRET implicit $x10
535    %0:gprb(s32) = COPY $x10
536    %1:gprb(s32) = G_CONSTANT i32 -10
537    %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
538    $x10 = COPY %2(s32)
539    PseudoRET implicit $x10
540
541...
542---
543name:            cmp_ugti_i32
544legalized:       true
545regBankSelected: true
546tracksRegLiveness: true
547body:             |
548  bb.0.entry:
549    liveins: $x10
550
551    ; CHECK-LABEL: name: cmp_ugti_i32
552    ; CHECK: liveins: $x10
553    ; CHECK-NEXT: {{  $}}
554    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
555    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 11
556    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTIU]], 1
557    ; CHECK-NEXT: $x10 = COPY [[XORI]]
558    ; CHECK-NEXT: PseudoRET implicit $x10
559    %0:gprb(s32) = COPY $x10
560    %1:gprb(s32) = G_CONSTANT i32 10
561    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
562    $x10 = COPY %2(s32)
563    PseudoRET implicit $x10
564
565...
566---
567name:            cmp_sgti_i32
568legalized:       true
569regBankSelected: true
570tracksRegLiveness: true
571body:             |
572  bb.0.entry:
573    liveins: $x10
574
575    ; CHECK-LABEL: name: cmp_sgti_i32
576    ; CHECK: liveins: $x10
577    ; CHECK-NEXT: {{  $}}
578    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
579    ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -9
580    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTI]], 1
581    ; CHECK-NEXT: $x10 = COPY [[XORI]]
582    ; CHECK-NEXT: PseudoRET implicit $x10
583    %0:gprb(s32) = COPY $x10
584    %1:gprb(s32) = G_CONSTANT i32 -10
585    %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
586    $x10 = COPY %2(s32)
587    PseudoRET implicit $x10
588
589...
590---
591name:            cmp_eqi_i32
592legalized:       true
593regBankSelected: true
594tracksRegLiveness: true
595body:             |
596  bb.0.entry:
597    liveins: $x10
598
599    ; CHECK-LABEL: name: cmp_eqi_i32
600    ; CHECK: liveins: $x10
601    ; CHECK-NEXT: {{  $}}
602    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
603    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[COPY]], -10
604    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[ADDI]], 1
605    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
606    ; CHECK-NEXT: PseudoRET implicit $x10
607    %0:gprb(s32) = COPY $x10
608    %1:gprb(s32) = G_CONSTANT i32 10
609    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
610    $x10 = COPY %2(s32)
611    PseudoRET implicit $x10
612
613...
614---
615name:            cmp_nei_i32
616legalized:       true
617regBankSelected: true
618tracksRegLiveness: true
619body:             |
620  bb.0.entry:
621    liveins: $x10
622
623    ; CHECK-LABEL: name: cmp_nei_i32
624    ; CHECK: liveins: $x10
625    ; CHECK-NEXT: {{  $}}
626    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
627    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[COPY]], 10
628    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ADDI]]
629    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
630    ; CHECK-NEXT: PseudoRET implicit $x10
631    %0:gprb(s32) = COPY $x10
632    %1:gprb(s32) = G_CONSTANT i32 -10
633    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
634    $x10 = COPY %2(s32)
635    PseudoRET implicit $x10
636
637...
638---
639name:            cmp_ulei_i32
640legalized:       true
641regBankSelected: true
642tracksRegLiveness: true
643body:             |
644  bb.0.entry:
645    liveins: $x10
646
647    ; CHECK-LABEL: name: cmp_ulei_i32
648    ; CHECK: liveins: $x10
649    ; CHECK-NEXT: {{  $}}
650    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
651    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 11
652    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
653    ; CHECK-NEXT: PseudoRET implicit $x10
654    %0:gprb(s32) = COPY $x10
655    %1:gprb(s32) = G_CONSTANT i32 10
656    %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
657    $x10 = COPY %2(s32)
658    PseudoRET implicit $x10
659
660...
661---
662name:            cmp_slei_i32
663legalized:       true
664regBankSelected: true
665tracksRegLiveness: true
666body:             |
667  bb.0.entry:
668    liveins: $x10
669
670    ; CHECK-LABEL: name: cmp_slei_i32
671    ; CHECK: liveins: $x10
672    ; CHECK-NEXT: {{  $}}
673    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
674    ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -9
675    ; CHECK-NEXT: $x10 = COPY [[SLTI]]
676    ; CHECK-NEXT: PseudoRET implicit $x10
677    %0:gprb(s32) = COPY $x10
678    %1:gprb(s32) = G_CONSTANT i32 -10
679    %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
680    $x10 = COPY %2(s32)
681    PseudoRET implicit $x10
682
683...
684---
685name:            cmp_ugei_i32
686legalized:       true
687regBankSelected: true
688tracksRegLiveness: true
689body:             |
690  bb.0.entry:
691    liveins: $x10
692
693    ; CHECK-LABEL: name: cmp_ugei_i32
694    ; CHECK: liveins: $x10
695    ; CHECK-NEXT: {{  $}}
696    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
697    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 10
698    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTIU]], 1
699    ; CHECK-NEXT: $x10 = COPY [[XORI]]
700    ; CHECK-NEXT: PseudoRET implicit $x10
701    %0:gprb(s32) = COPY $x10
702    %1:gprb(s32) = G_CONSTANT i32 10
703    %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
704    $x10 = COPY %2(s32)
705    PseudoRET implicit $x10
706
707...
708---
709name:            cmp_sgei_i32
710legalized:       true
711regBankSelected: true
712tracksRegLiveness: true
713body:             |
714  bb.0.entry:
715    liveins: $x10
716
717    ; CHECK-LABEL: name: cmp_sgei_i32
718    ; CHECK: liveins: $x10
719    ; CHECK-NEXT: {{  $}}
720    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
721    ; CHECK-NEXT: [[SLTI:%[0-9]+]]:gpr = SLTI [[COPY]], -10
722    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTI]], 1
723    ; CHECK-NEXT: $x10 = COPY [[XORI]]
724    ; CHECK-NEXT: PseudoRET implicit $x10
725    %0:gprb(s32) = COPY $x10
726    %1:gprb(s32) = G_CONSTANT i32 -10
727    %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
728    $x10 = COPY %2(s32)
729    PseudoRET implicit $x10
730
731...
732---
733name:            cmp_ulti_p0
734legalized:       true
735regBankSelected: true
736tracksRegLiveness: true
737body:             |
738  bb.0.entry:
739    liveins: $x10
740
741    ; CHECK-LABEL: name: cmp_ulti_p0
742    ; CHECK: liveins: $x10
743    ; CHECK-NEXT: {{  $}}
744    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
745    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
746    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[ADDI]]
747    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
748    ; CHECK-NEXT: PseudoRET implicit $x10
749    %0:gprb(p0) = COPY $x10
750    %1:gprb(p0) = G_CONSTANT i32 10
751    %2:gprb(s32) = G_ICMP intpred(ult), %0, %1
752    $x10 = COPY %2(s32)
753    PseudoRET implicit $x10
754
755...
756---
757name:            cmp_slti_p0
758legalized:       true
759regBankSelected: true
760tracksRegLiveness: true
761body:             |
762  bb.0.entry:
763    liveins: $x10
764
765    ; CHECK-LABEL: name: cmp_slti_p0
766    ; CHECK: liveins: $x10
767    ; CHECK-NEXT: {{  $}}
768    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
769    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
770    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[ADDI]]
771    ; CHECK-NEXT: $x10 = COPY [[SLT]]
772    ; CHECK-NEXT: PseudoRET implicit $x10
773    %0:gprb(p0) = COPY $x10
774    %1:gprb(p0) = G_CONSTANT i32 -10
775    %2:gprb(s32) = G_ICMP intpred(slt), %0, %1
776    $x10 = COPY %2(s32)
777    PseudoRET implicit $x10
778
779...
780---
781name:            cmp_ugti_p0
782legalized:       true
783regBankSelected: true
784tracksRegLiveness: true
785body:             |
786  bb.0.entry:
787    liveins: $x10
788
789    ; CHECK-LABEL: name: cmp_ugti_p0
790    ; CHECK: liveins: $x10
791    ; CHECK-NEXT: {{  $}}
792    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
793    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
794    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
795    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
796    ; CHECK-NEXT: PseudoRET implicit $x10
797    %0:gprb(p0) = COPY $x10
798    %1:gprb(p0) = G_CONSTANT i32 10
799    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
800    $x10 = COPY %2(s32)
801    PseudoRET implicit $x10
802
803...
804---
805name:            cmp_sgti_p0
806legalized:       true
807regBankSelected: true
808tracksRegLiveness: true
809body:             |
810  bb.0.entry:
811    liveins: $x10
812
813    ; CHECK-LABEL: name: cmp_sgti_p0
814    ; CHECK: liveins: $x10
815    ; CHECK-NEXT: {{  $}}
816    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
817    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
818    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[ADDI]], [[COPY]]
819    ; CHECK-NEXT: $x10 = COPY [[SLT]]
820    ; CHECK-NEXT: PseudoRET implicit $x10
821    %0:gprb(p0) = COPY $x10
822    %1:gprb(p0) = G_CONSTANT i32 -10
823    %2:gprb(s32) = G_ICMP intpred(sgt), %0, %1
824    $x10 = COPY %2(s32)
825    PseudoRET implicit $x10
826
827...
828---
829name:            cmp_eqi_p0
830legalized:       true
831regBankSelected: true
832tracksRegLiveness: true
833body:             |
834  bb.0.entry:
835    liveins: $x10
836
837    ; CHECK-LABEL: name: cmp_eqi_p0
838    ; CHECK: liveins: $x10
839    ; CHECK-NEXT: {{  $}}
840    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
841    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
842    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[ADDI]]
843    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[XOR]], 1
844    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
845    ; CHECK-NEXT: PseudoRET implicit $x10
846    %0:gprb(p0) = COPY $x10
847    %1:gprb(p0) = G_CONSTANT i32 10
848    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
849    $x10 = COPY %2(s32)
850    PseudoRET implicit $x10
851
852...
853---
854name:            cmp_nei_p0
855legalized:       true
856regBankSelected: true
857tracksRegLiveness: true
858body:             |
859  bb.0.entry:
860    liveins: $x10
861
862    ; CHECK-LABEL: name: cmp_nei_p0
863    ; CHECK: liveins: $x10
864    ; CHECK-NEXT: {{  $}}
865    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
866    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
867    ; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr = XOR [[COPY]], [[ADDI]]
868    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[XOR]]
869    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
870    ; CHECK-NEXT: PseudoRET implicit $x10
871    %0:gprb(p0) = COPY $x10
872    %1:gprb(p0) = G_CONSTANT i32 -10
873    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
874    $x10 = COPY %2(s32)
875    PseudoRET implicit $x10
876
877...
878---
879name:            cmp_ulei_p0
880legalized:       true
881regBankSelected: true
882tracksRegLiveness: true
883body:             |
884  bb.0.entry:
885    liveins: $x10
886
887    ; CHECK-LABEL: name: cmp_ulei_p0
888    ; CHECK: liveins: $x10
889    ; CHECK-NEXT: {{  $}}
890    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
891    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
892    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
893    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
894    ; CHECK-NEXT: $x10 = COPY [[XORI]]
895    ; CHECK-NEXT: PseudoRET implicit $x10
896    %0:gprb(p0) = COPY $x10
897    %1:gprb(p0) = G_CONSTANT i32 10
898    %2:gprb(s32) = G_ICMP intpred(ule), %0, %1
899    $x10 = COPY %2(s32)
900    PseudoRET implicit $x10
901
902...
903---
904name:            cmp_slei_p0
905legalized:       true
906regBankSelected: true
907tracksRegLiveness: true
908body:             |
909  bb.0.entry:
910    liveins: $x10
911
912    ; CHECK-LABEL: name: cmp_slei_p0
913    ; CHECK: liveins: $x10
914    ; CHECK-NEXT: {{  $}}
915    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
916    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
917    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[ADDI]], [[COPY]]
918    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
919    ; CHECK-NEXT: $x10 = COPY [[XORI]]
920    ; CHECK-NEXT: PseudoRET implicit $x10
921    %0:gprb(p0) = COPY $x10
922    %1:gprb(p0) = G_CONSTANT i32 -10
923    %2:gprb(s32) = G_ICMP intpred(sle), %0, %1
924    $x10 = COPY %2(s32)
925    PseudoRET implicit $x10
926
927...
928---
929name:            cmp_ugei_p0
930legalized:       true
931regBankSelected: true
932tracksRegLiveness: true
933body:             |
934  bb.0.entry:
935    liveins: $x10
936
937    ; CHECK-LABEL: name: cmp_ugei_p0
938    ; CHECK: liveins: $x10
939    ; CHECK-NEXT: {{  $}}
940    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
941    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 10
942    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[COPY]], [[ADDI]]
943    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLTU]], 1
944    ; CHECK-NEXT: $x10 = COPY [[XORI]]
945    ; CHECK-NEXT: PseudoRET implicit $x10
946    %0:gprb(p0) = COPY $x10
947    %1:gprb(p0) = G_CONSTANT i32 10
948    %2:gprb(s32) = G_ICMP intpred(uge), %0, %1
949    $x10 = COPY %2(s32)
950    PseudoRET implicit $x10
951
952...
953---
954name:            cmp_sgei_p0
955legalized:       true
956regBankSelected: true
957tracksRegLiveness: true
958body:             |
959  bb.0.entry:
960    liveins: $x10
961
962    ; CHECK-LABEL: name: cmp_sgei_p0
963    ; CHECK: liveins: $x10
964    ; CHECK-NEXT: {{  $}}
965    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
966    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -10
967    ; CHECK-NEXT: [[SLT:%[0-9]+]]:gpr = SLT [[COPY]], [[ADDI]]
968    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[SLT]], 1
969    ; CHECK-NEXT: $x10 = COPY [[XORI]]
970    ; CHECK-NEXT: PseudoRET implicit $x10
971    %0:gprb(p0) = COPY $x10
972    %1:gprb(p0) = G_CONSTANT i32 -10
973    %2:gprb(s32) = G_ICMP intpred(sge), %0, %1
974    $x10 = COPY %2(s32)
975    PseudoRET implicit $x10
976
977...
978---
979name:            cmp_eq0_i32
980legalized:       true
981regBankSelected: true
982tracksRegLiveness: true
983body:             |
984  bb.0.entry:
985    liveins: $x10
986
987    ; CHECK-LABEL: name: cmp_eq0_i32
988    ; CHECK: liveins: $x10
989    ; CHECK-NEXT: {{  $}}
990    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
991    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 1
992    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
993    ; CHECK-NEXT: PseudoRET implicit $x10
994    %0:gprb(s32) = COPY $x10
995    %1:gprb(s32) = G_CONSTANT i32 0
996    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
997    $x10 = COPY %2(s32)
998    PseudoRET implicit $x10
999
1000...
1001---
1002name:            cmp_eq0_p0
1003legalized:       true
1004regBankSelected: true
1005tracksRegLiveness: true
1006body:             |
1007  bb.0.entry:
1008    liveins: $x10
1009
1010    ; CHECK-LABEL: name: cmp_eq0_p0
1011    ; CHECK: liveins: $x10
1012    ; CHECK-NEXT: {{  $}}
1013    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1014    ; CHECK-NEXT: [[SLTIU:%[0-9]+]]:gpr = SLTIU [[COPY]], 1
1015    ; CHECK-NEXT: $x10 = COPY [[SLTIU]]
1016    ; CHECK-NEXT: PseudoRET implicit $x10
1017    %0:gprb(p0) = COPY $x10
1018    %1:gprb(p0) = G_CONSTANT i32 0
1019    %2:gprb(s32) = G_ICMP intpred(eq), %0, %1
1020    $x10 = COPY %2(s32)
1021    PseudoRET implicit $x10
1022
1023...
1024---
1025name:            cmp_ne0_i32
1026legalized:       true
1027regBankSelected: true
1028tracksRegLiveness: true
1029body:             |
1030  bb.0.entry:
1031    liveins: $x10
1032
1033    ; CHECK-LABEL: name: cmp_ne0_i32
1034    ; CHECK: liveins: $x10
1035    ; CHECK-NEXT: {{  $}}
1036    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1037    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[COPY]]
1038    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1039    ; CHECK-NEXT: PseudoRET implicit $x10
1040    %0:gprb(s32) = COPY $x10
1041    %1:gprb(s32) = G_CONSTANT i32 0
1042    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
1043    $x10 = COPY %2(s32)
1044    PseudoRET implicit $x10
1045
1046...
1047---
1048name:            cmp_ne0_p0
1049legalized:       true
1050regBankSelected: true
1051tracksRegLiveness: true
1052body:             |
1053  bb.0.entry:
1054    liveins: $x10
1055
1056    ; CHECK-LABEL: name: cmp_ne0_p0
1057    ; CHECK: liveins: $x10
1058    ; CHECK-NEXT: {{  $}}
1059    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1060    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[COPY]]
1061    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1062    ; CHECK-NEXT: PseudoRET implicit $x10
1063    %0:gprb(p0) = COPY $x10
1064    %1:gprb(p0) = G_CONSTANT i32 0
1065    %2:gprb(s32) = G_ICMP intpred(ne), %0, %1
1066    $x10 = COPY %2(s32)
1067    PseudoRET implicit $x10
1068
1069...
1070---
1071name:            cmp_ugt_neg1_i32
1072legalized:       true
1073regBankSelected: true
1074tracksRegLiveness: true
1075body:             |
1076  bb.0.entry:
1077    liveins: $x10
1078
1079    ; CHECK-LABEL: name: cmp_ugt_neg1_i32
1080    ; CHECK: liveins: $x10
1081    ; CHECK-NEXT: {{  $}}
1082    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1083    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
1084    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
1085    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1086    ; CHECK-NEXT: PseudoRET implicit $x10
1087    %0:gprb(s32) = COPY $x10
1088    %1:gprb(s32) = G_CONSTANT i32 -1
1089    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
1090    $x10 = COPY %2(s32)
1091    PseudoRET implicit $x10
1092
1093...
1094---
1095name:            cmp_ugt_neg1_p0
1096legalized:       true
1097regBankSelected: true
1098tracksRegLiveness: true
1099body:             |
1100  bb.0.entry:
1101    liveins: $x10
1102
1103    ; CHECK-LABEL: name: cmp_ugt_neg1_p0
1104    ; CHECK: liveins: $x10
1105    ; CHECK-NEXT: {{  $}}
1106    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
1107    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
1108    ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU [[ADDI]], [[COPY]]
1109    ; CHECK-NEXT: $x10 = COPY [[SLTU]]
1110    ; CHECK-NEXT: PseudoRET implicit $x10
1111    %0:gprb(p0) = COPY $x10
1112    %1:gprb(p0) = G_CONSTANT i32 -1
1113    %2:gprb(s32) = G_ICMP intpred(ugt), %0, %1
1114    $x10 = COPY %2(s32)
1115    PseudoRET implicit $x10
1116
1117...
1118