xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir (revision 39edac23dfb7ead6da2c9b37c3286d06ea004e8d) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -relocation-model=pic \
3# RUN:   %s -o - | FileCheck --check-prefix=RV32-PIE %s
4# RUN: llc -mtriple=riscv32 -run-pass=instruction-select \
5# RUN:   -mattr=+tagged-globals %s -o - | FileCheck  \
6# RUN:   --check-prefix=RV32-NOPIE-TAG %s
7# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -code-model=small \
8# RUN:   %s -o - | FileCheck --check-prefix=RV32-SMALL-NOPIE-NOTAG %s
9# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -code-model=medium \
10# RUN:   %s -o - | FileCheck --check-prefix=RV32-MED %s
11
12
13--- |
14  @x = global i32 0, align 4
15  define ptr @global_addr() {
16  entry:
17    ret ptr @x
18  }
19  @y = extern_weak global i32, align 4
20  define ptr @extern_weak_global_addr() {
21  entry:
22    ret ptr @y
23  }
24  @z = dso_local global i32 0, align 4
25  define ptr @local_global_addr() {
26  entry:
27    ret ptr @z
28  }
29...
30---
31name:            global_addr
32legalized:       true
33regBankSelected: true
34tracksRegLiveness: true
35registers:
36  - { id: 0, class: gprb, preferred-register: '' }
37body:             |
38  bb.1.entry:
39    ; RV32-PIE-LABEL: name: global_addr
40    ; RV32-PIE: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @x :: (dereferenceable invariant load (p0) from got)
41    ; RV32-PIE-NEXT: $x10 = COPY [[PseudoLGA]]
42    ; RV32-PIE-NEXT: PseudoRET implicit $x10
43    ;
44    ; RV32-NOPIE-TAG-LABEL: name: global_addr
45    ; RV32-NOPIE-TAG: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @x :: (dereferenceable invariant load (p0) from got)
46    ; RV32-NOPIE-TAG-NEXT: $x10 = COPY [[PseudoLGA]]
47    ; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
48    ;
49    ; RV32-SMALL-NOPIE-NOTAG-LABEL: name: global_addr
50    ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @x
51    ; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @x
52    ; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
53    ; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
54    ;
55    ; RV32-MED-LABEL: name: global_addr
56    ; RV32-MED: [[PseudoLLA:%[0-9]+]]:gpr = PseudoLLA @x
57    ; RV32-MED-NEXT: $x10 = COPY [[PseudoLLA]]
58    ; RV32-MED-NEXT: PseudoRET implicit $x10
59    %0:gprb(p0) = G_GLOBAL_VALUE @x
60    $x10 = COPY %0(p0)
61    PseudoRET implicit $x10
62...
63---
64name:            extern_weak_global_addr
65legalized:       true
66regBankSelected: true
67tracksRegLiveness: true
68registers:
69  - { id: 0, class: gprb, preferred-register: '' }
70body:             |
71  bb.1.entry:
72    ; RV32-PIE-LABEL: name: extern_weak_global_addr
73    ; RV32-PIE: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @y :: (dereferenceable invariant load (p0) from got)
74    ; RV32-PIE-NEXT: $x10 = COPY [[PseudoLGA]]
75    ; RV32-PIE-NEXT: PseudoRET implicit $x10
76    ;
77    ; RV32-NOPIE-TAG-LABEL: name: extern_weak_global_addr
78    ; RV32-NOPIE-TAG: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @y :: (dereferenceable invariant load (p0) from got)
79    ; RV32-NOPIE-TAG-NEXT: $x10 = COPY [[PseudoLGA]]
80    ; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
81    ;
82    ; RV32-SMALL-NOPIE-NOTAG-LABEL: name: extern_weak_global_addr
83    ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @y
84    ; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @y
85    ; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
86    ; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
87    ;
88    ; RV32-MED-LABEL: name: extern_weak_global_addr
89    ; RV32-MED: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @y :: (dereferenceable invariant load (p0) from got)
90    ; RV32-MED-NEXT: $x10 = COPY [[PseudoLGA]]
91    ; RV32-MED-NEXT: PseudoRET implicit $x10
92    %0:gprb(p0) = G_GLOBAL_VALUE @y
93    $x10 = COPY %0(p0)
94    PseudoRET implicit $x10
95...
96---
97name:            local_global_addr
98legalized:       true
99regBankSelected: true
100tracksRegLiveness: true
101registers:
102  - { id: 0, class: gprb, preferred-register: '' }
103body:             |
104  bb.1.entry:
105    ; RV32-PIE-LABEL: name: local_global_addr
106    ; RV32-PIE: [[PseudoLLA:%[0-9]+]]:gpr = PseudoLLA @z
107    ; RV32-PIE-NEXT: $x10 = COPY [[PseudoLLA]]
108    ; RV32-PIE-NEXT: PseudoRET implicit $x10
109    ;
110    ; RV32-NOPIE-TAG-LABEL: name: local_global_addr
111    ; RV32-NOPIE-TAG: [[PseudoLGA:%[0-9]+]]:gpr = PseudoLGA @z :: (dereferenceable invariant load (p0) from got)
112    ; RV32-NOPIE-TAG-NEXT: $x10 = COPY [[PseudoLGA]]
113    ; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
114    ;
115    ; RV32-SMALL-NOPIE-NOTAG-LABEL: name: local_global_addr
116    ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @z
117    ; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @z
118    ; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
119    ; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
120    ;
121    ; RV32-MED-LABEL: name: local_global_addr
122    ; RV32-MED: [[PseudoLLA:%[0-9]+]]:gpr = PseudoLLA @z
123    ; RV32-MED-NEXT: $x10 = COPY [[PseudoLLA]]
124    ; RV32-MED-NEXT: PseudoRET implicit $x10
125    %0:gprb(p0) = G_GLOBAL_VALUE @z
126    $x10 = COPY %0(p0)
127    PseudoRET implicit $x10
128...
129
130