xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc.mir (revision 4ac304242b65413f4eae21af300dd14cb14ed066)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
3# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
5# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
6
7---
8name:            fpext
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12body:             |
13  bb.1:
14    liveins: $f10_f
15
16    ; CHECK-LABEL: name: fpext
17    ; CHECK: liveins: $f10_f
18    ; CHECK-NEXT: {{  $}}
19    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
20    ; CHECK-NEXT: [[FCVT_D_S:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_S [[COPY]], 0
21    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_S]]
22    ; CHECK-NEXT: PseudoRET implicit $f10_d
23    %0:fprb(s32) = COPY $f10_f
24    %1:fprb(s64) = G_FPEXT %0(s32)
25    $f10_d = COPY %1(s64)
26    PseudoRET implicit $f10_d
27
28...
29---
30name:            fptrunc
31legalized:       true
32regBankSelected: true
33tracksRegLiveness: true
34body:             |
35  bb.1:
36    liveins: $f10_d
37
38    ; CHECK-LABEL: name: fptrunc
39    ; CHECK: liveins: $f10_d
40    ; CHECK-NEXT: {{  $}}
41    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
42    ; CHECK-NEXT: [[FCVT_S_D:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_D [[COPY]], 7
43    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_D]]
44    ; CHECK-NEXT: PseudoRET implicit $f10_f
45    %0:fprb(s64) = COPY $f10_d
46    %1:fprb(s32) = G_FPTRUNC %0(s64)
47    $f10_f = COPY %1(s32)
48    PseudoRET implicit $f10_f
49
50...
51