xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc-f16.mir (revision 868fae1f2ecb54604231c1334ce9aa5b4c0b1288)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=instruction-select \
3# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=instruction-select \
5# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
6
7---
8name:            fpext_f32
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12body:             |
13  bb.1:
14    liveins: $f10_h
15
16    ; CHECK-LABEL: name: fpext_f32
17    ; CHECK: liveins: $f10_h
18    ; CHECK-NEXT: {{  $}}
19    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
20    ; CHECK-NEXT: [[FCVT_S_H:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_H [[COPY]], 0
21    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_H]]
22    ; CHECK-NEXT: PseudoRET implicit $f10_f
23    %0:fprb(s16) = COPY $f10_h
24    %1:fprb(s32) = G_FPEXT %0(s16)
25    $f10_f = COPY %1(s32)
26    PseudoRET implicit $f10_f
27
28...
29---
30name:            fptrunc_f32
31legalized:       true
32regBankSelected: true
33tracksRegLiveness: true
34body:             |
35  bb.1:
36    liveins: $f10_f
37
38    ; CHECK-LABEL: name: fptrunc_f32
39    ; CHECK: liveins: $f10_f
40    ; CHECK-NEXT: {{  $}}
41    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
42    ; CHECK-NEXT: [[FCVT_H_S:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_S [[COPY]], 7
43    ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_S]]
44    ; CHECK-NEXT: PseudoRET implicit $f10_h
45    %0:fprb(s32) = COPY $f10_f
46    %1:fprb(s16) = G_FPTRUNC %0(s32)
47    $f10_h = COPY %1(s16)
48    PseudoRET implicit $f10_h
49
50...
51---
52name:            fpext_f64
53legalized:       true
54regBankSelected: true
55tracksRegLiveness: true
56body:             |
57  bb.1:
58    liveins: $f10_h
59
60    ; CHECK-LABEL: name: fpext_f64
61    ; CHECK: liveins: $f10_h
62    ; CHECK-NEXT: {{  $}}
63    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
64    ; CHECK-NEXT: [[FCVT_D_H:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_H [[COPY]], 0
65    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_H]]
66    ; CHECK-NEXT: PseudoRET implicit $f10_d
67    %0:fprb(s16) = COPY $f10_h
68    %1:fprb(s64) = G_FPEXT %0(s16)
69    $f10_d = COPY %1(s64)
70    PseudoRET implicit $f10_d
71
72...
73---
74name:            fptrunc_f64
75legalized:       true
76regBankSelected: true
77tracksRegLiveness: true
78body:             |
79  bb.1:
80    liveins: $f10_d
81
82    ; CHECK-LABEL: name: fptrunc_f64
83    ; CHECK: liveins: $f10_d
84    ; CHECK-NEXT: {{  $}}
85    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
86    ; CHECK-NEXT: [[FCVT_H_D:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_D [[COPY]], 7
87    ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_D]]
88    ; CHECK-NEXT: PseudoRET implicit $f10_h
89    %0:fprb(s64) = COPY $f10_d
90    %1:fprb(s16) = G_FPTRUNC %0(s64)
91    $f10_h = COPY %1(s16)
92    PseudoRET implicit $f10_h
93
94...
95