xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fcmp-rv64.mir (revision fdbff88196b54cea12deb1fae978277066dffd1e) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
3# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4
5---
6name:            fcmp_oeq_f32
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.1:
12    liveins: $f10_f, $f11_f
13
14    ; CHECK-LABEL: name: fcmp_oeq_f32
15    ; CHECK: liveins: $f10_f, $f11_f
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
18    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
19    ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = nofpexcept FEQ_S [[COPY]], [[COPY1]]
20    ; CHECK-NEXT: $x10 = COPY [[FEQ_S]]
21    ; CHECK-NEXT: PseudoRET implicit $x10
22    %0:fprb(s32) = COPY $f10_f
23    %1:fprb(s32) = COPY $f11_f
24    %4:gprb(s64) = G_FCMP floatpred(oeq), %0(s32), %1
25    $x10 = COPY %4(s64)
26    PseudoRET implicit $x10
27
28...
29---
30name:            fcmp_ogt_f32
31legalized:       true
32regBankSelected: true
33tracksRegLiveness: true
34body:             |
35  bb.1:
36    liveins: $f10_f, $f11_f
37
38    ; CHECK-LABEL: name: fcmp_ogt_f32
39    ; CHECK: liveins: $f10_f, $f11_f
40    ; CHECK-NEXT: {{  $}}
41    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
42    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
43    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]
44    ; CHECK-NEXT: $x10 = COPY [[FLT_S]]
45    ; CHECK-NEXT: PseudoRET implicit $x10
46    %0:fprb(s32) = COPY $f10_f
47    %1:fprb(s32) = COPY $f11_f
48    %4:gprb(s64) = G_FCMP floatpred(ogt), %0(s32), %1
49    $x10 = COPY %4(s64)
50    PseudoRET implicit $x10
51
52...
53---
54name:            fcmp_oge_f32
55legalized:       true
56regBankSelected: true
57tracksRegLiveness: true
58body:             |
59  bb.1:
60    liveins: $f10_f, $f11_f
61
62    ; CHECK-LABEL: name: fcmp_oge_f32
63    ; CHECK: liveins: $f10_f, $f11_f
64    ; CHECK-NEXT: {{  $}}
65    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
66    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
67    ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY1]], [[COPY]]
68    ; CHECK-NEXT: $x10 = COPY [[FLE_S]]
69    ; CHECK-NEXT: PseudoRET implicit $x10
70    %0:fprb(s32) = COPY $f10_f
71    %1:fprb(s32) = COPY $f11_f
72    %4:gprb(s64) = G_FCMP floatpred(oge), %0(s32), %1
73    $x10 = COPY %4(s64)
74    PseudoRET implicit $x10
75
76...
77---
78name:            fcmp_olt_f32
79legalized:       true
80regBankSelected: true
81tracksRegLiveness: true
82body:             |
83  bb.1:
84    liveins: $f10_f, $f11_f
85
86    ; CHECK-LABEL: name: fcmp_olt_f32
87    ; CHECK: liveins: $f10_f, $f11_f
88    ; CHECK-NEXT: {{  $}}
89    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
90    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
91    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = nofpexcept FLT_S [[COPY]], [[COPY1]]
92    ; CHECK-NEXT: $x10 = COPY [[FLT_S]]
93    ; CHECK-NEXT: PseudoRET implicit $x10
94    %0:fprb(s32) = COPY $f10_f
95    %1:fprb(s32) = COPY $f11_f
96    %4:gprb(s64) = G_FCMP floatpred(olt), %0(s32), %1
97    $x10 = COPY %4(s64)
98    PseudoRET implicit $x10
99
100...
101---
102name:            fcmp_ole_f32
103legalized:       true
104regBankSelected: true
105tracksRegLiveness: true
106body:             |
107  bb.1:
108    liveins: $f10_f, $f11_f
109
110    ; CHECK-LABEL: name: fcmp_ole_f32
111    ; CHECK: liveins: $f10_f, $f11_f
112    ; CHECK-NEXT: {{  $}}
113    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
114    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
115    ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = nofpexcept FLE_S [[COPY]], [[COPY1]]
116    ; CHECK-NEXT: $x10 = COPY [[FLE_S]]
117    ; CHECK-NEXT: PseudoRET implicit $x10
118    %0:fprb(s32) = COPY $f10_f
119    %1:fprb(s32) = COPY $f11_f
120    %4:gprb(s64) = G_FCMP floatpred(ole), %0(s32), %1
121    $x10 = COPY %4(s64)
122    PseudoRET implicit $x10
123
124...
125---
126name:            fcmp_one_f32
127legalized:       true
128regBankSelected: true
129tracksRegLiveness: true
130body:             |
131  bb.1:
132    liveins: $f10_f, $f11_f
133
134    ; CHECK-LABEL: name: fcmp_one_f32
135    ; CHECK: liveins: $f10_f, $f11_f
136    ; CHECK-NEXT: {{  $}}
137    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
138    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
139    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]
140    ; CHECK-NEXT: [[FLT_S1:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]
141    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_S]], [[FLT_S1]]
142    ; CHECK-NEXT: $x10 = COPY [[OR]]
143    ; CHECK-NEXT: PseudoRET implicit $x10
144    %0:fprb(s32) = COPY $f10_f
145    %1:fprb(s32) = COPY $f11_f
146    %4:gprb(s64) = G_FCMP floatpred(one), %0(s32), %1
147    $x10 = COPY %4(s64)
148    PseudoRET implicit $x10
149
150...
151---
152name:            fcmp_ord_f32
153legalized:       true
154regBankSelected: true
155tracksRegLiveness: true
156body:             |
157  bb.1:
158    liveins: $f10_f, $f11_f
159
160    ; CHECK-LABEL: name: fcmp_ord_f32
161    ; CHECK: liveins: $f10_f, $f11_f
162    ; CHECK-NEXT: {{  $}}
163    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
164    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
165    ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY]]
166    ; CHECK-NEXT: [[FEQ_S1:%[0-9]+]]:gpr = FEQ_S [[COPY1]], [[COPY1]]
167    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_S]], [[FEQ_S1]]
168    ; CHECK-NEXT: $x10 = COPY [[AND]]
169    ; CHECK-NEXT: PseudoRET implicit $x10
170    %0:fprb(s32) = COPY $f10_f
171    %1:fprb(s32) = COPY $f11_f
172    %4:gprb(s64) = G_FCMP floatpred(ord), %0(s32), %1
173    $x10 = COPY %4(s64)
174    PseudoRET implicit $x10
175
176...
177---
178name:            fcmp_ueq_f32
179legalized:       true
180regBankSelected: true
181tracksRegLiveness: true
182body:             |
183  bb.1:
184    liveins: $f10_f, $f11_f
185
186    ; CHECK-LABEL: name: fcmp_ueq_f32
187    ; CHECK: liveins: $f10_f, $f11_f
188    ; CHECK-NEXT: {{  $}}
189    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
190    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
191    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]
192    ; CHECK-NEXT: [[FLT_S1:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]
193    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_S]], [[FLT_S1]]
194    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[OR]], 1
195    ; CHECK-NEXT: $x10 = COPY [[XORI]]
196    ; CHECK-NEXT: PseudoRET implicit $x10
197    %0:fprb(s32) = COPY $f10_f
198    %1:fprb(s32) = COPY $f11_f
199    %4:gprb(s64) = G_FCMP floatpred(ueq), %0(s32), %1
200    $x10 = COPY %4(s64)
201    PseudoRET implicit $x10
202
203...
204---
205name:            fcmp_ugt_f32
206legalized:       true
207regBankSelected: true
208tracksRegLiveness: true
209body:             |
210  bb.1:
211    liveins: $f10_f, $f11_f
212
213    ; CHECK-LABEL: name: fcmp_ugt_f32
214    ; CHECK: liveins: $f10_f, $f11_f
215    ; CHECK-NEXT: {{  $}}
216    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
217    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
218    ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY]], [[COPY1]]
219    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_S]], 1
220    ; CHECK-NEXT: $x10 = COPY [[XORI]]
221    ; CHECK-NEXT: PseudoRET implicit $x10
222    %0:fprb(s32) = COPY $f10_f
223    %1:fprb(s32) = COPY $f11_f
224    %4:gprb(s64) = G_FCMP floatpred(ugt), %0(s32), %1
225    $x10 = COPY %4(s64)
226    PseudoRET implicit $x10
227
228...
229---
230name:            fcmp_uge_f32
231legalized:       true
232regBankSelected: true
233tracksRegLiveness: true
234body:             |
235  bb.1:
236    liveins: $f10_f, $f11_f
237
238    ; CHECK-LABEL: name: fcmp_uge_f32
239    ; CHECK: liveins: $f10_f, $f11_f
240    ; CHECK-NEXT: {{  $}}
241    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
242    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
243    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]
244    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_S]], 1
245    ; CHECK-NEXT: $x10 = COPY [[XORI]]
246    ; CHECK-NEXT: PseudoRET implicit $x10
247    %0:fprb(s32) = COPY $f10_f
248    %1:fprb(s32) = COPY $f11_f
249    %4:gprb(s64) = G_FCMP floatpred(uge), %0(s32), %1
250    $x10 = COPY %4(s64)
251    PseudoRET implicit $x10
252
253...
254---
255name:            fcmp_ult_f32
256legalized:       true
257regBankSelected: true
258tracksRegLiveness: true
259body:             |
260  bb.1:
261    liveins: $f10_f, $f11_f
262
263    ; CHECK-LABEL: name: fcmp_ult_f32
264    ; CHECK: liveins: $f10_f, $f11_f
265    ; CHECK-NEXT: {{  $}}
266    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
267    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
268    ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY1]], [[COPY]]
269    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_S]], 1
270    ; CHECK-NEXT: $x10 = COPY [[XORI]]
271    ; CHECK-NEXT: PseudoRET implicit $x10
272    %0:fprb(s32) = COPY $f10_f
273    %1:fprb(s32) = COPY $f11_f
274    %4:gprb(s64) = G_FCMP floatpred(ult), %0(s32), %1
275    $x10 = COPY %4(s64)
276    PseudoRET implicit $x10
277
278...
279---
280name:            fcmp_ule_f32
281legalized:       true
282regBankSelected: true
283tracksRegLiveness: true
284body:             |
285  bb.1:
286    liveins: $f10_f, $f11_f
287
288    ; CHECK-LABEL: name: fcmp_ule_f32
289    ; CHECK: liveins: $f10_f, $f11_f
290    ; CHECK-NEXT: {{  $}}
291    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
292    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
293    ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]
294    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_S]], 1
295    ; CHECK-NEXT: $x10 = COPY [[XORI]]
296    ; CHECK-NEXT: PseudoRET implicit $x10
297    %0:fprb(s32) = COPY $f10_f
298    %1:fprb(s32) = COPY $f11_f
299    %4:gprb(s64) = G_FCMP floatpred(ule), %0(s32), %1
300    $x10 = COPY %4(s64)
301    PseudoRET implicit $x10
302
303...
304---
305name:            fcmp_une_f32
306legalized:       true
307regBankSelected: true
308tracksRegLiveness: true
309body:             |
310  bb.1:
311    liveins: $f10_f, $f11_f
312
313    ; CHECK-LABEL: name: fcmp_une_f32
314    ; CHECK: liveins: $f10_f, $f11_f
315    ; CHECK-NEXT: {{  $}}
316    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
317    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
318    ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY1]]
319    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FEQ_S]], 1
320    ; CHECK-NEXT: $x10 = COPY [[XORI]]
321    ; CHECK-NEXT: PseudoRET implicit $x10
322    %0:fprb(s32) = COPY $f10_f
323    %1:fprb(s32) = COPY $f11_f
324    %4:gprb(s64) = G_FCMP floatpred(une), %0(s32), %1
325    $x10 = COPY %4(s64)
326    PseudoRET implicit $x10
327
328...
329---
330name:            fcmp_uno_f32
331legalized:       true
332regBankSelected: true
333tracksRegLiveness: true
334body:             |
335  bb.1:
336    liveins: $f10_f, $f11_f
337
338    ; CHECK-LABEL: name: fcmp_uno_f32
339    ; CHECK: liveins: $f10_f, $f11_f
340    ; CHECK-NEXT: {{  $}}
341    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
342    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f
343    ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY]]
344    ; CHECK-NEXT: [[FEQ_S1:%[0-9]+]]:gpr = FEQ_S [[COPY1]], [[COPY1]]
345    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_S]], [[FEQ_S1]]
346    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[AND]], 1
347    ; CHECK-NEXT: $x10 = COPY [[XORI]]
348    ; CHECK-NEXT: PseudoRET implicit $x10
349    %0:fprb(s32) = COPY $f10_f
350    %1:fprb(s32) = COPY $f11_f
351    %4:gprb(s64) = G_FCMP floatpred(uno), %0(s32), %1
352    $x10 = COPY %4(s64)
353    PseudoRET implicit $x10
354
355...
356---
357name:            fcmp_oeq_f64
358legalized:       true
359regBankSelected: true
360tracksRegLiveness: true
361body:             |
362  bb.1:
363    liveins: $f10_d, $f11_d
364
365    ; CHECK-LABEL: name: fcmp_oeq_f64
366    ; CHECK: liveins: $f10_d, $f11_d
367    ; CHECK-NEXT: {{  $}}
368    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
369    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
370    ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = nofpexcept FEQ_D [[COPY]], [[COPY1]]
371    ; CHECK-NEXT: $x10 = COPY [[FEQ_D]]
372    ; CHECK-NEXT: PseudoRET implicit $x10
373    %0:fprb(s64) = COPY $f10_d
374    %1:fprb(s64) = COPY $f11_d
375    %4:gprb(s64) = G_FCMP floatpred(oeq), %0(s64), %1
376    $x10 = COPY %4(s64)
377    PseudoRET implicit $x10
378
379...
380---
381name:            fcmp_ogt_f64
382legalized:       true
383regBankSelected: true
384tracksRegLiveness: true
385body:             |
386  bb.1:
387    liveins: $f10_d, $f11_d
388
389    ; CHECK-LABEL: name: fcmp_ogt_f64
390    ; CHECK: liveins: $f10_d, $f11_d
391    ; CHECK-NEXT: {{  $}}
392    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
393    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
394    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]
395    ; CHECK-NEXT: $x10 = COPY [[FLT_D]]
396    ; CHECK-NEXT: PseudoRET implicit $x10
397    %0:fprb(s64) = COPY $f10_d
398    %1:fprb(s64) = COPY $f11_d
399    %4:gprb(s64) = G_FCMP floatpred(ogt), %0(s64), %1
400    $x10 = COPY %4(s64)
401    PseudoRET implicit $x10
402
403...
404---
405name:            fcmp_oge_f64
406legalized:       true
407regBankSelected: true
408tracksRegLiveness: true
409body:             |
410  bb.1:
411    liveins: $f10_d, $f11_d
412
413    ; CHECK-LABEL: name: fcmp_oge_f64
414    ; CHECK: liveins: $f10_d, $f11_d
415    ; CHECK-NEXT: {{  $}}
416    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
417    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
418    ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY1]], [[COPY]]
419    ; CHECK-NEXT: $x10 = COPY [[FLE_D]]
420    ; CHECK-NEXT: PseudoRET implicit $x10
421    %0:fprb(s64) = COPY $f10_d
422    %1:fprb(s64) = COPY $f11_d
423    %4:gprb(s64) = G_FCMP floatpred(oge), %0(s64), %1
424    $x10 = COPY %4(s64)
425    PseudoRET implicit $x10
426
427...
428---
429name:            fcmp_olt_f64
430legalized:       true
431regBankSelected: true
432tracksRegLiveness: true
433body:             |
434  bb.1:
435    liveins: $f10_d, $f11_d
436
437    ; CHECK-LABEL: name: fcmp_olt_f64
438    ; CHECK: liveins: $f10_d, $f11_d
439    ; CHECK-NEXT: {{  $}}
440    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
441    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
442    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = nofpexcept FLT_D [[COPY]], [[COPY1]]
443    ; CHECK-NEXT: $x10 = COPY [[FLT_D]]
444    ; CHECK-NEXT: PseudoRET implicit $x10
445    %0:fprb(s64) = COPY $f10_d
446    %1:fprb(s64) = COPY $f11_d
447    %4:gprb(s64) = G_FCMP floatpred(olt), %0(s64), %1
448    $x10 = COPY %4(s64)
449    PseudoRET implicit $x10
450
451...
452---
453name:            fcmp_ole_f64
454legalized:       true
455regBankSelected: true
456tracksRegLiveness: true
457body:             |
458  bb.1:
459    liveins: $f10_d, $f11_d
460
461    ; CHECK-LABEL: name: fcmp_ole_f64
462    ; CHECK: liveins: $f10_d, $f11_d
463    ; CHECK-NEXT: {{  $}}
464    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
465    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
466    ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = nofpexcept FLE_D [[COPY]], [[COPY1]]
467    ; CHECK-NEXT: $x10 = COPY [[FLE_D]]
468    ; CHECK-NEXT: PseudoRET implicit $x10
469    %0:fprb(s64) = COPY $f10_d
470    %1:fprb(s64) = COPY $f11_d
471    %4:gprb(s64) = G_FCMP floatpred(ole), %0(s64), %1
472    $x10 = COPY %4(s64)
473    PseudoRET implicit $x10
474
475...
476---
477name:            fcmp_one_f64
478legalized:       true
479regBankSelected: true
480tracksRegLiveness: true
481body:             |
482  bb.1:
483    liveins: $f10_d, $f11_d
484
485    ; CHECK-LABEL: name: fcmp_one_f64
486    ; CHECK: liveins: $f10_d, $f11_d
487    ; CHECK-NEXT: {{  $}}
488    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
489    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
490    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]
491    ; CHECK-NEXT: [[FLT_D1:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]
492    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_D]], [[FLT_D1]]
493    ; CHECK-NEXT: $x10 = COPY [[OR]]
494    ; CHECK-NEXT: PseudoRET implicit $x10
495    %0:fprb(s64) = COPY $f10_d
496    %1:fprb(s64) = COPY $f11_d
497    %4:gprb(s64) = G_FCMP floatpred(one), %0(s64), %1
498    $x10 = COPY %4(s64)
499    PseudoRET implicit $x10
500
501...
502---
503name:            fcmp_ord_f64
504legalized:       true
505regBankSelected: true
506tracksRegLiveness: true
507body:             |
508  bb.1:
509    liveins: $f10_d, $f11_d
510
511    ; CHECK-LABEL: name: fcmp_ord_f64
512    ; CHECK: liveins: $f10_d, $f11_d
513    ; CHECK-NEXT: {{  $}}
514    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
515    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
516    ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY]]
517    ; CHECK-NEXT: [[FEQ_D1:%[0-9]+]]:gpr = FEQ_D [[COPY1]], [[COPY1]]
518    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_D]], [[FEQ_D1]]
519    ; CHECK-NEXT: $x10 = COPY [[AND]]
520    ; CHECK-NEXT: PseudoRET implicit $x10
521    %0:fprb(s64) = COPY $f10_d
522    %1:fprb(s64) = COPY $f11_d
523    %4:gprb(s64) = G_FCMP floatpred(ord), %0(s64), %1
524    $x10 = COPY %4(s64)
525    PseudoRET implicit $x10
526
527...
528---
529name:            fcmp_ueq_f64
530legalized:       true
531regBankSelected: true
532tracksRegLiveness: true
533body:             |
534  bb.1:
535    liveins: $f10_d, $f11_d
536
537    ; CHECK-LABEL: name: fcmp_ueq_f64
538    ; CHECK: liveins: $f10_d, $f11_d
539    ; CHECK-NEXT: {{  $}}
540    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
541    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
542    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]
543    ; CHECK-NEXT: [[FLT_D1:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]
544    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_D]], [[FLT_D1]]
545    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[OR]], 1
546    ; CHECK-NEXT: $x10 = COPY [[XORI]]
547    ; CHECK-NEXT: PseudoRET implicit $x10
548    %0:fprb(s64) = COPY $f10_d
549    %1:fprb(s64) = COPY $f11_d
550    %4:gprb(s64) = G_FCMP floatpred(ueq), %0(s64), %1
551    $x10 = COPY %4(s64)
552    PseudoRET implicit $x10
553
554...
555---
556name:            fcmp_ugt_f64
557legalized:       true
558regBankSelected: true
559tracksRegLiveness: true
560body:             |
561  bb.1:
562    liveins: $f10_d, $f11_d
563
564    ; CHECK-LABEL: name: fcmp_ugt_f64
565    ; CHECK: liveins: $f10_d, $f11_d
566    ; CHECK-NEXT: {{  $}}
567    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
568    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
569    ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY]], [[COPY1]]
570    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_D]], 1
571    ; CHECK-NEXT: $x10 = COPY [[XORI]]
572    ; CHECK-NEXT: PseudoRET implicit $x10
573    %0:fprb(s64) = COPY $f10_d
574    %1:fprb(s64) = COPY $f11_d
575    %4:gprb(s64) = G_FCMP floatpred(ugt), %0(s64), %1
576    $x10 = COPY %4(s64)
577    PseudoRET implicit $x10
578
579...
580---
581name:            fcmp_uge_f64
582legalized:       true
583regBankSelected: true
584tracksRegLiveness: true
585body:             |
586  bb.1:
587    liveins: $f10_d, $f11_d
588
589    ; CHECK-LABEL: name: fcmp_uge_f64
590    ; CHECK: liveins: $f10_d, $f11_d
591    ; CHECK-NEXT: {{  $}}
592    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
593    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
594    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]
595    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_D]], 1
596    ; CHECK-NEXT: $x10 = COPY [[XORI]]
597    ; CHECK-NEXT: PseudoRET implicit $x10
598    %0:fprb(s64) = COPY $f10_d
599    %1:fprb(s64) = COPY $f11_d
600    %4:gprb(s64) = G_FCMP floatpred(uge), %0(s64), %1
601    $x10 = COPY %4(s64)
602    PseudoRET implicit $x10
603
604...
605---
606name:            fcmp_ult_f64
607legalized:       true
608regBankSelected: true
609tracksRegLiveness: true
610body:             |
611  bb.1:
612    liveins: $f10_d, $f11_d
613
614    ; CHECK-LABEL: name: fcmp_ult_f64
615    ; CHECK: liveins: $f10_d, $f11_d
616    ; CHECK-NEXT: {{  $}}
617    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
618    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
619    ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY1]], [[COPY]]
620    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_D]], 1
621    ; CHECK-NEXT: $x10 = COPY [[XORI]]
622    ; CHECK-NEXT: PseudoRET implicit $x10
623    %0:fprb(s64) = COPY $f10_d
624    %1:fprb(s64) = COPY $f11_d
625    %4:gprb(s64) = G_FCMP floatpred(ult), %0(s64), %1
626    $x10 = COPY %4(s64)
627    PseudoRET implicit $x10
628
629...
630---
631name:            fcmp_ule_f64
632legalized:       true
633regBankSelected: true
634tracksRegLiveness: true
635body:             |
636  bb.1:
637    liveins: $f10_d, $f11_d
638
639    ; CHECK-LABEL: name: fcmp_ule_f64
640    ; CHECK: liveins: $f10_d, $f11_d
641    ; CHECK-NEXT: {{  $}}
642    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
643    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
644    ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]
645    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_D]], 1
646    ; CHECK-NEXT: $x10 = COPY [[XORI]]
647    ; CHECK-NEXT: PseudoRET implicit $x10
648    %0:fprb(s64) = COPY $f10_d
649    %1:fprb(s64) = COPY $f11_d
650    %4:gprb(s64) = G_FCMP floatpred(ule), %0(s64), %1
651    $x10 = COPY %4(s64)
652    PseudoRET implicit $x10
653
654...
655---
656name:            fcmp_une_f64
657legalized:       true
658regBankSelected: true
659tracksRegLiveness: true
660body:             |
661  bb.1:
662    liveins: $f10_d, $f11_d
663
664    ; CHECK-LABEL: name: fcmp_une_f64
665    ; CHECK: liveins: $f10_d, $f11_d
666    ; CHECK-NEXT: {{  $}}
667    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
668    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
669    ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY1]]
670    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FEQ_D]], 1
671    ; CHECK-NEXT: $x10 = COPY [[XORI]]
672    ; CHECK-NEXT: PseudoRET implicit $x10
673    %0:fprb(s64) = COPY $f10_d
674    %1:fprb(s64) = COPY $f11_d
675    %4:gprb(s64) = G_FCMP floatpred(une), %0(s64), %1
676    $x10 = COPY %4(s64)
677    PseudoRET implicit $x10
678
679...
680---
681name:            fcmp_uno_f64
682legalized:       true
683regBankSelected: true
684tracksRegLiveness: true
685body:             |
686  bb.1:
687    liveins: $f10_d, $f11_d
688
689    ; CHECK-LABEL: name: fcmp_uno_f64
690    ; CHECK: liveins: $f10_d, $f11_d
691    ; CHECK-NEXT: {{  $}}
692    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
693    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d
694    ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY]]
695    ; CHECK-NEXT: [[FEQ_D1:%[0-9]+]]:gpr = FEQ_D [[COPY1]], [[COPY1]]
696    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_D]], [[FEQ_D1]]
697    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[AND]], 1
698    ; CHECK-NEXT: $x10 = COPY [[XORI]]
699    ; CHECK-NEXT: PseudoRET implicit $x10
700    %0:fprb(s64) = COPY $f10_d
701    %1:fprb(s64) = COPY $f11_d
702    %4:gprb(s64) = G_FCMP floatpred(uno), %0(s64), %1
703    $x10 = COPY %4(s64)
704    PseudoRET implicit $x10
705
706...
707