xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fcmp-f16-rv32.mir (revision acd6cb85b3c410e88dbcc9e48733d0e1ac70eadc) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -mattr=+zfh -run-pass=instruction-select \
3# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
4
5---
6name:            fcmp_oeq_f16
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.1:
12    liveins: $f10_h, $f11_h
13
14    ; CHECK-LABEL: name: fcmp_oeq_f16
15    ; CHECK: liveins: $f10_h, $f11_h
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
18    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
19    ; CHECK-NEXT: [[FEQ_H:%[0-9]+]]:gpr = nofpexcept FEQ_H [[COPY]], [[COPY1]]
20    ; CHECK-NEXT: $x10 = COPY [[FEQ_H]]
21    ; CHECK-NEXT: PseudoRET implicit $x10
22    %0:fprb(s16) = COPY $f10_h
23    %1:fprb(s16) = COPY $f11_h
24    %4:gprb(s32) = G_FCMP floatpred(oeq), %0(s16), %1
25    $x10 = COPY %4(s32)
26    PseudoRET implicit $x10
27
28...
29---
30name:            fcmp_ogt_f16
31legalized:       true
32regBankSelected: true
33tracksRegLiveness: true
34body:             |
35  bb.1:
36    liveins: $f10_h, $f11_h
37
38    ; CHECK-LABEL: name: fcmp_ogt_f16
39    ; CHECK: liveins: $f10_h, $f11_h
40    ; CHECK-NEXT: {{  $}}
41    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
42    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
43    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = FLT_H [[COPY1]], [[COPY]]
44    ; CHECK-NEXT: $x10 = COPY [[FLT_H]]
45    ; CHECK-NEXT: PseudoRET implicit $x10
46    %0:fprb(s16) = COPY $f10_h
47    %1:fprb(s16) = COPY $f11_h
48    %4:gprb(s32) = G_FCMP floatpred(ogt), %0(s16), %1
49    $x10 = COPY %4(s32)
50    PseudoRET implicit $x10
51
52...
53---
54name:            fcmp_oge_f16
55legalized:       true
56regBankSelected: true
57tracksRegLiveness: true
58body:             |
59  bb.1:
60    liveins: $f10_h, $f11_h
61
62    ; CHECK-LABEL: name: fcmp_oge_f16
63    ; CHECK: liveins: $f10_h, $f11_h
64    ; CHECK-NEXT: {{  $}}
65    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
66    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
67    ; CHECK-NEXT: [[FLE_H:%[0-9]+]]:gpr = FLE_H [[COPY1]], [[COPY]]
68    ; CHECK-NEXT: $x10 = COPY [[FLE_H]]
69    ; CHECK-NEXT: PseudoRET implicit $x10
70    %0:fprb(s16) = COPY $f10_h
71    %1:fprb(s16) = COPY $f11_h
72    %4:gprb(s32) = G_FCMP floatpred(oge), %0(s16), %1
73    $x10 = COPY %4(s32)
74    PseudoRET implicit $x10
75
76...
77---
78name:            fcmp_olt_f16
79legalized:       true
80regBankSelected: true
81tracksRegLiveness: true
82body:             |
83  bb.1:
84    liveins: $f10_h, $f11_h
85
86    ; CHECK-LABEL: name: fcmp_olt_f16
87    ; CHECK: liveins: $f10_h, $f11_h
88    ; CHECK-NEXT: {{  $}}
89    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
90    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
91    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = nofpexcept FLT_H [[COPY]], [[COPY1]]
92    ; CHECK-NEXT: $x10 = COPY [[FLT_H]]
93    ; CHECK-NEXT: PseudoRET implicit $x10
94    %0:fprb(s16) = COPY $f10_h
95    %1:fprb(s16) = COPY $f11_h
96    %4:gprb(s32) = G_FCMP floatpred(olt), %0(s16), %1
97    $x10 = COPY %4(s32)
98    PseudoRET implicit $x10
99
100...
101---
102name:            fcmp_ole_f16
103legalized:       true
104regBankSelected: true
105tracksRegLiveness: true
106body:             |
107  bb.1:
108    liveins: $f10_h, $f11_h
109
110    ; CHECK-LABEL: name: fcmp_ole_f16
111    ; CHECK: liveins: $f10_h, $f11_h
112    ; CHECK-NEXT: {{  $}}
113    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
114    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
115    ; CHECK-NEXT: [[FLE_H:%[0-9]+]]:gpr = nofpexcept FLE_H [[COPY]], [[COPY1]]
116    ; CHECK-NEXT: $x10 = COPY [[FLE_H]]
117    ; CHECK-NEXT: PseudoRET implicit $x10
118    %0:fprb(s16) = COPY $f10_h
119    %1:fprb(s16) = COPY $f11_h
120    %4:gprb(s32) = G_FCMP floatpred(ole), %0(s16), %1
121    $x10 = COPY %4(s32)
122    PseudoRET implicit $x10
123
124...
125---
126name:            fcmp_one_f16
127legalized:       true
128regBankSelected: true
129tracksRegLiveness: true
130body:             |
131  bb.1:
132    liveins: $f10_h, $f11_h
133
134    ; CHECK-LABEL: name: fcmp_one_f16
135    ; CHECK: liveins: $f10_h, $f11_h
136    ; CHECK-NEXT: {{  $}}
137    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
138    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
139    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = FLT_H [[COPY]], [[COPY1]]
140    ; CHECK-NEXT: [[FLT_H1:%[0-9]+]]:gpr = FLT_H [[COPY1]], [[COPY]]
141    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_H]], [[FLT_H1]]
142    ; CHECK-NEXT: $x10 = COPY [[OR]]
143    ; CHECK-NEXT: PseudoRET implicit $x10
144    %0:fprb(s16) = COPY $f10_h
145    %1:fprb(s16) = COPY $f11_h
146    %4:gprb(s32) = G_FCMP floatpred(one), %0(s16), %1
147    $x10 = COPY %4(s32)
148    PseudoRET implicit $x10
149
150...
151---
152name:            fcmp_ord_f16
153legalized:       true
154regBankSelected: true
155tracksRegLiveness: true
156body:             |
157  bb.1:
158    liveins: $f10_h, $f11_h
159
160    ; CHECK-LABEL: name: fcmp_ord_f16
161    ; CHECK: liveins: $f10_h, $f11_h
162    ; CHECK-NEXT: {{  $}}
163    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
164    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
165    ; CHECK-NEXT: [[FEQ_H:%[0-9]+]]:gpr = FEQ_H [[COPY]], [[COPY]]
166    ; CHECK-NEXT: [[FEQ_H1:%[0-9]+]]:gpr = FEQ_H [[COPY1]], [[COPY1]]
167    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_H]], [[FEQ_H1]]
168    ; CHECK-NEXT: $x10 = COPY [[AND]]
169    ; CHECK-NEXT: PseudoRET implicit $x10
170    %0:fprb(s16) = COPY $f10_h
171    %1:fprb(s16) = COPY $f11_h
172    %4:gprb(s32) = G_FCMP floatpred(ord), %0(s16), %1
173    $x10 = COPY %4(s32)
174    PseudoRET implicit $x10
175
176...
177---
178name:            fcmp_ueq_f16
179legalized:       true
180regBankSelected: true
181tracksRegLiveness: true
182body:             |
183  bb.1:
184    liveins: $f10_h, $f11_h
185
186    ; CHECK-LABEL: name: fcmp_ueq_f16
187    ; CHECK: liveins: $f10_h, $f11_h
188    ; CHECK-NEXT: {{  $}}
189    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
190    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
191    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = FLT_H [[COPY]], [[COPY1]]
192    ; CHECK-NEXT: [[FLT_H1:%[0-9]+]]:gpr = FLT_H [[COPY1]], [[COPY]]
193    ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_H]], [[FLT_H1]]
194    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[OR]], 1
195    ; CHECK-NEXT: $x10 = COPY [[XORI]]
196    ; CHECK-NEXT: PseudoRET implicit $x10
197    %0:fprb(s16) = COPY $f10_h
198    %1:fprb(s16) = COPY $f11_h
199    %4:gprb(s32) = G_FCMP floatpred(ueq), %0(s16), %1
200    $x10 = COPY %4(s32)
201    PseudoRET implicit $x10
202
203...
204---
205name:            fcmp_ugt_f16
206legalized:       true
207regBankSelected: true
208tracksRegLiveness: true
209body:             |
210  bb.1:
211    liveins: $f10_h, $f11_h
212
213    ; CHECK-LABEL: name: fcmp_ugt_f16
214    ; CHECK: liveins: $f10_h, $f11_h
215    ; CHECK-NEXT: {{  $}}
216    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
217    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
218    ; CHECK-NEXT: [[FLE_H:%[0-9]+]]:gpr = FLE_H [[COPY]], [[COPY1]]
219    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_H]], 1
220    ; CHECK-NEXT: $x10 = COPY [[XORI]]
221    ; CHECK-NEXT: PseudoRET implicit $x10
222    %0:fprb(s16) = COPY $f10_h
223    %1:fprb(s16) = COPY $f11_h
224    %4:gprb(s32) = G_FCMP floatpred(ugt), %0(s16), %1
225    $x10 = COPY %4(s32)
226    PseudoRET implicit $x10
227
228...
229---
230name:            fcmp_uge_f16
231legalized:       true
232regBankSelected: true
233tracksRegLiveness: true
234body:             |
235  bb.1:
236    liveins: $f10_h, $f11_h
237
238    ; CHECK-LABEL: name: fcmp_uge_f16
239    ; CHECK: liveins: $f10_h, $f11_h
240    ; CHECK-NEXT: {{  $}}
241    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
242    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
243    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = FLT_H [[COPY]], [[COPY1]]
244    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_H]], 1
245    ; CHECK-NEXT: $x10 = COPY [[XORI]]
246    ; CHECK-NEXT: PseudoRET implicit $x10
247    %0:fprb(s16) = COPY $f10_h
248    %1:fprb(s16) = COPY $f11_h
249    %4:gprb(s32) = G_FCMP floatpred(uge), %0(s16), %1
250    $x10 = COPY %4(s32)
251    PseudoRET implicit $x10
252
253...
254---
255name:            fcmp_ult_f16
256legalized:       true
257regBankSelected: true
258tracksRegLiveness: true
259body:             |
260  bb.1:
261    liveins: $f10_h, $f11_h
262
263    ; CHECK-LABEL: name: fcmp_ult_f16
264    ; CHECK: liveins: $f10_h, $f11_h
265    ; CHECK-NEXT: {{  $}}
266    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
267    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
268    ; CHECK-NEXT: [[FLE_H:%[0-9]+]]:gpr = FLE_H [[COPY1]], [[COPY]]
269    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_H]], 1
270    ; CHECK-NEXT: $x10 = COPY [[XORI]]
271    ; CHECK-NEXT: PseudoRET implicit $x10
272    %0:fprb(s16) = COPY $f10_h
273    %1:fprb(s16) = COPY $f11_h
274    %4:gprb(s32) = G_FCMP floatpred(ult), %0(s16), %1
275    $x10 = COPY %4(s32)
276    PseudoRET implicit $x10
277
278...
279---
280name:            fcmp_ule_f16
281legalized:       true
282regBankSelected: true
283tracksRegLiveness: true
284body:             |
285  bb.1:
286    liveins: $f10_h, $f11_h
287
288    ; CHECK-LABEL: name: fcmp_ule_f16
289    ; CHECK: liveins: $f10_h, $f11_h
290    ; CHECK-NEXT: {{  $}}
291    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
292    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
293    ; CHECK-NEXT: [[FLT_H:%[0-9]+]]:gpr = FLT_H [[COPY1]], [[COPY]]
294    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_H]], 1
295    ; CHECK-NEXT: $x10 = COPY [[XORI]]
296    ; CHECK-NEXT: PseudoRET implicit $x10
297    %0:fprb(s16) = COPY $f10_h
298    %1:fprb(s16) = COPY $f11_h
299    %4:gprb(s32) = G_FCMP floatpred(ule), %0(s16), %1
300    $x10 = COPY %4(s32)
301    PseudoRET implicit $x10
302
303...
304---
305name:            fcmp_une_f16
306legalized:       true
307regBankSelected: true
308tracksRegLiveness: true
309body:             |
310  bb.1:
311    liveins: $f10_h, $f11_h
312
313    ; CHECK-LABEL: name: fcmp_une_f16
314    ; CHECK: liveins: $f10_h, $f11_h
315    ; CHECK-NEXT: {{  $}}
316    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
317    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
318    ; CHECK-NEXT: [[FEQ_H:%[0-9]+]]:gpr = FEQ_H [[COPY]], [[COPY1]]
319    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FEQ_H]], 1
320    ; CHECK-NEXT: $x10 = COPY [[XORI]]
321    ; CHECK-NEXT: PseudoRET implicit $x10
322    %0:fprb(s16) = COPY $f10_h
323    %1:fprb(s16) = COPY $f11_h
324    %4:gprb(s32) = G_FCMP floatpred(une), %0(s16), %1
325    $x10 = COPY %4(s32)
326    PseudoRET implicit $x10
327
328...
329---
330name:            fcmp_uno_f16
331legalized:       true
332regBankSelected: true
333tracksRegLiveness: true
334body:             |
335  bb.1:
336    liveins: $f10_h, $f11_h
337
338    ; CHECK-LABEL: name: fcmp_uno_f16
339    ; CHECK: liveins: $f10_h, $f11_h
340    ; CHECK-NEXT: {{  $}}
341    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
342    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f11_h
343    ; CHECK-NEXT: [[FEQ_H:%[0-9]+]]:gpr = FEQ_H [[COPY]], [[COPY]]
344    ; CHECK-NEXT: [[FEQ_H1:%[0-9]+]]:gpr = FEQ_H [[COPY1]], [[COPY1]]
345    ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_H]], [[FEQ_H1]]
346    ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[AND]], 1
347    ; CHECK-NEXT: $x10 = COPY [[XORI]]
348    ; CHECK-NEXT: PseudoRET implicit $x10
349    %0:fprb(s16) = COPY $f10_h
350    %1:fprb(s16) = COPY $f11_h
351    %4:gprb(s32) = G_FCMP floatpred(uno), %0(s16), %1
352    $x10 = COPY %4(s32)
353    PseudoRET implicit $x10
354
355...
356