xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant32.mir (revision 7cce908367faddd44443812ff2fba4e12561a083)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv32 -run-pass=instruction-select %s -o - \
3# RUN: | FileCheck %s
4---
5name:            const_i32_INT_MIN
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9body:            |
10  bb.0:
11    liveins: $x10
12
13    ; CHECK-LABEL: name: const_i32_INT_MIN
14    ; CHECK: liveins: $x10
15    ; CHECK-NEXT: {{  $}}
16    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
17    ; CHECK-NEXT: $x10 = COPY [[LUI]]
18    ; CHECK-NEXT: PseudoRET implicit $x10
19    %0:gprb(s32) = G_CONSTANT i32 -2147483648
20    $x10 = COPY %0(s32)
21    PseudoRET implicit $x10
22
23...
24---
25name:            const_i32_neg_2147483000
26legalized:       true
27regBankSelected: true
28tracksRegLiveness: true
29body:            |
30  bb.0:
31    liveins: $x10
32
33    ; CHECK-LABEL: name: const_i32_neg_2147483000
34    ; CHECK: liveins: $x10
35    ; CHECK-NEXT: {{  $}}
36    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
37    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], 648
38    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
39    ; CHECK-NEXT: PseudoRET implicit $x10
40    %0:gprb(s32) = G_CONSTANT i32 -2147483000
41    $x10 = COPY %0(s32)
42    PseudoRET implicit $x10
43
44...
45---
46name:            const_i32_INT_MAX
47legalized:       true
48regBankSelected: true
49tracksRegLiveness: true
50body:            |
51  bb.0:
52    liveins: $x10
53
54    ; CHECK-LABEL: name: const_i32_INT_MAX
55    ; CHECK: liveins: $x10
56    ; CHECK-NEXT: {{  $}}
57    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
58    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], -1
59    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
60    ; CHECK-NEXT: PseudoRET implicit $x10
61    %0:gprb(s32) = G_CONSTANT i32 2147483647
62    $x10 = COPY %0(s32)
63    PseudoRET implicit $x10
64
65...
66---
67name:            const_i32_2147483000
68legalized:       true
69regBankSelected: true
70tracksRegLiveness: true
71body:            |
72  bb.0:
73    liveins: $x10
74
75    ; CHECK-LABEL: name: const_i32_2147483000
76    ; CHECK: liveins: $x10
77    ; CHECK-NEXT: {{  $}}
78    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
79    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], -648
80    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
81    ; CHECK-NEXT: PseudoRET implicit $x10
82    %0:gprb(s32) = G_CONSTANT i32 2147483000
83    $x10 = COPY %0(s32)
84    PseudoRET implicit $x10
85
86...
87---
88name:            const_i32_256
89legalized:       true
90regBankSelected: true
91tracksRegLiveness: true
92body:            |
93  bb.0:
94    liveins: $x10
95
96    ; CHECK-LABEL: name: const_i32_256
97    ; CHECK: liveins: $x10
98    ; CHECK-NEXT: {{  $}}
99    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 256
100    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
101    ; CHECK-NEXT: PseudoRET implicit $x10
102    %0:gprb(s32) = G_CONSTANT i32 256
103    $x10 = COPY %0(s32)
104    PseudoRET implicit $x10
105
106...
107---
108name:            const_i32_0
109legalized:       true
110regBankSelected: true
111tracksRegLiveness: true
112body:            |
113  bb.0:
114    liveins: $x10
115
116    ; CHECK-LABEL: name: const_i32_0
117    ; CHECK: liveins: $x10
118    ; CHECK-NEXT: {{  $}}
119    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0
120    ; CHECK-NEXT: $x10 = COPY [[COPY]]
121    ; CHECK-NEXT: PseudoRET implicit $x10
122    %0:gprb(s32) = G_CONSTANT i32 0
123    $x10 = COPY %0(s32)
124    PseudoRET implicit $x10
125
126...
127