xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/brindirect-rv64.mir (revision 179a2e04439d449bbcd7482070c27983ef345c20)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -simplify-mir \
3# RUN:   -verify-machineinstrs %s -o - | FileCheck -check-prefix=RV64I %s
4
5---
6name:            indirectbr
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  ; RV64I-LABEL: name: indirectbr
12  ; RV64I: bb.0:
13  ; RV64I-NEXT:   successors: %bb.1, %bb.2
14  ; RV64I-NEXT:   liveins: $x10
15  ; RV64I-NEXT: {{  $}}
16  ; RV64I-NEXT:   [[COPY:%[0-9]+]]:gprjalr = COPY $x10
17  ; RV64I-NEXT:   PseudoBRIND [[COPY]], 0
18  ; RV64I-NEXT: {{  $}}
19  ; RV64I-NEXT: bb.1:
20  ; RV64I-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $x0
21  ; RV64I-NEXT:   $x10 = COPY [[COPY1]]
22  ; RV64I-NEXT:   PseudoRET implicit $x10
23  ; RV64I-NEXT: {{  $}}
24  ; RV64I-NEXT: bb.2:
25  ; RV64I-NEXT:   [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 1
26  ; RV64I-NEXT:   $x10 = COPY [[ADDI]]
27  ; RV64I-NEXT:   PseudoRET implicit $x10
28  bb.1:
29    successors: %bb.2, %bb.3
30    liveins: $x10
31
32    %0:gprb(p0) = COPY $x10
33    G_BRINDIRECT %0(p0)
34
35  bb.2:
36    %4:gprb(s64) = G_CONSTANT i64 0
37    $x10 = COPY %4(s64)
38    PseudoRET implicit $x10
39
40  bb.3:
41    %2:gprb(s64) = G_CONSTANT i64 1
42    $x10 = COPY %2(s64)
43    PseudoRET implicit $x10
44
45...
46