xref: /llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll (revision dde5546b79f784ab71cac325e0a0698c67c4dcde) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=riscv32 -mattr=+f,+d,+zfh,+m,+v -global-isel -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+f,+d,+zfh,+m,+v -global-isel -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
4
5define i32 @freeze_int(i32 %x) {
6; CHECK-LABEL: freeze_int:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    mul a0, a0, a0
9; CHECK-NEXT:    ret
10  %y1 = freeze i32 %x
11  %t1 = mul i32 %y1, %y1
12  ret i32 %t1
13}
14
15define i5 @freeze_int2(i5 %x) {
16; CHECK-LABEL: freeze_int2:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    mul a0, a0, a0
19; CHECK-NEXT:    ret
20  %y1 = freeze i5 %x
21  %t1 = mul i5 %y1, %y1
22  ret i5 %t1
23}
24
25define float @freeze_float(float %x) {
26; CHECK-LABEL: freeze_float:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    fadd.s fa0, fa0, fa0
29; CHECK-NEXT:    ret
30  %y1 = freeze float %x
31  %t1 = fadd float %y1, %y1
32  ret float %t1
33}
34
35define double @freeze_double(double %x) nounwind {
36; RV32-LABEL: freeze_double:
37; RV32:       # %bb.0:
38; RV32-NEXT:    addi sp, sp, -16
39; RV32-NEXT:    fsd fa0, 8(sp)
40; RV32-NEXT:    lw a0, 8(sp)
41; RV32-NEXT:    lw a1, 12(sp)
42; RV32-NEXT:    sw a0, 8(sp)
43; RV32-NEXT:    sw a1, 12(sp)
44; RV32-NEXT:    fld fa5, 8(sp)
45; RV32-NEXT:    fadd.d fa0, fa5, fa5
46; RV32-NEXT:    addi sp, sp, 16
47; RV32-NEXT:    ret
48;
49; RV64-LABEL: freeze_double:
50; RV64:       # %bb.0:
51; RV64-NEXT:    fadd.d fa0, fa0, fa0
52; RV64-NEXT:    ret
53  %y1 = freeze double %x
54  %t1 = fadd double %y1, %y1
55  ret double %t1
56}
57
58define void @freeze_half(ptr %p) {
59; CHECK-LABEL: freeze_half:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    lh a1, 0(a0)
62; CHECK-NEXT:    sh a1, 0(a0)
63; CHECK-NEXT:    ret
64  %x = load half, ptr %p
65  %y1 = freeze half %x
66  store half %y1, ptr %p
67  ret void
68}
69
70define <vscale x 2 x i32> @freeze_ivec(<vscale x 2 x i32> %x) {
71; CHECK-LABEL: freeze_ivec:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    ret
74  %y = freeze <vscale x 2 x i32> %x
75  ret <vscale x 2 x i32> %y
76}
77
78define <vscale x 2 x float> @freeze_fvec(<vscale x 2 x float> %x) {
79; CHECK-LABEL: freeze_fvec:
80; CHECK:       # %bb.0:
81; CHECK-NEXT:    ret
82  %y = freeze <vscale x 2 x float> %x
83  ret <vscale x 2 x float> %y
84}
85
86define ptr @freeze_ptr(ptr %x) {
87; CHECK-LABEL: freeze_ptr:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    addi a0, a0, 4
90; CHECK-NEXT:    ret
91  %y1 = freeze ptr %x
92  %t1 = getelementptr i8, ptr %y1, i64 4
93  ret ptr %t1
94}
95
96%struct.T = type { i32, i32 }
97
98define i32 @freeze_struct(ptr %p) {
99; RV32-LABEL: freeze_struct:
100; RV32:       # %bb.0:
101; RV32-NEXT:    lw a1, 0(a0)
102; RV32-NEXT:    lw a0, 4(a0)
103; RV32-NEXT:    add a0, a1, a0
104; RV32-NEXT:    ret
105;
106; RV64-LABEL: freeze_struct:
107; RV64:       # %bb.0:
108; RV64-NEXT:    lw a1, 0(a0)
109; RV64-NEXT:    lw a0, 4(a0)
110; RV64-NEXT:    addw a0, a1, a0
111; RV64-NEXT:    ret
112  %s = load %struct.T, ptr %p
113  %y1 = freeze %struct.T %s
114  %v1 = extractvalue %struct.T %y1, 0
115  %v2 = extractvalue %struct.T %y1, 1
116  %t1 = add i32 %v1, %v2
117  ret i32 %t1
118}
119
120define i32 @freeze_anonstruct(ptr %p) {
121; RV32-LABEL: freeze_anonstruct:
122; RV32:       # %bb.0:
123; RV32-NEXT:    lw a1, 0(a0)
124; RV32-NEXT:    lw a0, 4(a0)
125; RV32-NEXT:    add a0, a1, a0
126; RV32-NEXT:    ret
127;
128; RV64-LABEL: freeze_anonstruct:
129; RV64:       # %bb.0:
130; RV64-NEXT:    lw a1, 0(a0)
131; RV64-NEXT:    lw a0, 4(a0)
132; RV64-NEXT:    addw a0, a1, a0
133; RV64-NEXT:    ret
134  %s = load {i32, i32}, ptr %p
135  %y1 = freeze {i32, i32} %s
136  %v1 = extractvalue {i32, i32} %y1, 0
137  %v2 = extractvalue {i32, i32} %y1, 1
138  %t1 = add i32 %v1, %v2
139  ret i32 %t1
140}
141
142define i32 @freeze_anonstruct2(ptr %p) {
143; RV32-LABEL: freeze_anonstruct2:
144; RV32:       # %bb.0:
145; RV32-NEXT:    lh a1, 4(a0)
146; RV32-NEXT:    lw a0, 0(a0)
147; RV32-NEXT:    slli a1, a1, 16
148; RV32-NEXT:    srli a1, a1, 16
149; RV32-NEXT:    add a0, a0, a1
150; RV32-NEXT:    ret
151;
152; RV64-LABEL: freeze_anonstruct2:
153; RV64:       # %bb.0:
154; RV64-NEXT:    lh a1, 4(a0)
155; RV64-NEXT:    lw a0, 0(a0)
156; RV64-NEXT:    slli a1, a1, 48
157; RV64-NEXT:    srli a1, a1, 48
158; RV64-NEXT:    addw a0, a0, a1
159; RV64-NEXT:    ret
160  %s = load {i32, i16}, ptr %p
161  %y1 = freeze {i32, i16} %s
162  %v1 = extractvalue {i32, i16} %y1, 0
163  %v2 = extractvalue {i32, i16} %y1, 1
164  %z2 = zext i16 %v2 to i32
165  %t1 = add i32 %v1, %z2
166  ret i32 %t1
167}
168
169define i32 @freeze_anonstruct2_sext(ptr %p) {
170; RV32-LABEL: freeze_anonstruct2_sext:
171; RV32:       # %bb.0:
172; RV32-NEXT:    lh a1, 4(a0)
173; RV32-NEXT:    lw a0, 0(a0)
174; RV32-NEXT:    slli a1, a1, 16
175; RV32-NEXT:    srai a1, a1, 16
176; RV32-NEXT:    add a0, a0, a1
177; RV32-NEXT:    ret
178;
179; RV64-LABEL: freeze_anonstruct2_sext:
180; RV64:       # %bb.0:
181; RV64-NEXT:    lh a1, 4(a0)
182; RV64-NEXT:    lw a0, 0(a0)
183; RV64-NEXT:    slli a1, a1, 48
184; RV64-NEXT:    srai a1, a1, 48
185; RV64-NEXT:    addw a0, a0, a1
186; RV64-NEXT:    ret
187  %s = load {i32, i16}, ptr %p
188  %y1 = freeze {i32, i16} %s
189  %v1 = extractvalue {i32, i16} %y1, 0
190  %v2 = extractvalue {i32, i16} %y1, 1
191  %z2 = sext i16 %v2 to i32
192  %t1 = add i32 %v1, %z2
193  ret i32 %t1
194}
195
196define i32 @freeze_array(ptr %p) nounwind {
197; RV32-LABEL: freeze_array:
198; RV32:       # %bb.0:
199; RV32-NEXT:    lw a1, 0(a0)
200; RV32-NEXT:    lw a0, 4(a0)
201; RV32-NEXT:    add a0, a1, a0
202; RV32-NEXT:    ret
203;
204; RV64-LABEL: freeze_array:
205; RV64:       # %bb.0:
206; RV64-NEXT:    lw a1, 0(a0)
207; RV64-NEXT:    lw a0, 4(a0)
208; RV64-NEXT:    addw a0, a1, a0
209; RV64-NEXT:    ret
210  %s = load [2 x i32], ptr %p
211  %y1 = freeze [2 x i32] %s
212  %v1 = extractvalue [2 x i32] %y1, 0
213  %v2 = extractvalue [2 x i32] %y1, 1
214  %t1 = add i32 %v1, %v2
215  ret i32 %t1
216}
217