1; RUN: llc -relocation-model=pic -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu \ 2; RUN: -mcpu=pwr8 -mattr=-direct-move | FileCheck %s 3; RUN: llc -relocation-model=pic -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu \ 4; RUN: -mcpu=pwr8 -mattr=-direct-move | FileCheck %s 5; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu \ 6; RUN: -mcpu=pwr9 -mattr=-direct-move | FileCheck %s -check-prefix=CHECK-P9 7 8@d = common global double 0.000000e+00, align 8 9@f = common global float 0.000000e+00, align 4 10@i = common global i32 0, align 4 11@ui = common global i32 0, align 4 12 13; Function Attrs: nounwind 14define void @dblToInt() #0 { 15entry: 16 %ii = alloca i32, align 4 17 %0 = load double, ptr @d, align 8 18 %conv = fptosi double %0 to i32 19 store volatile i32 %conv, ptr %ii, align 4 20 ret void 21; CHECK-LABEL: @dblToInt 22; CHECK: xscvdpsxws [[REGCONV1:[0-9]+]], 23; CHECK: stfiwx [[REGCONV1]], 24} 25 26; Function Attrs: nounwind 27define void @fltToInt() #0 { 28entry: 29 %ii = alloca i32, align 4 30 %0 = load float, ptr @f, align 4 31 %conv = fptosi float %0 to i32 32 store volatile i32 %conv, ptr %ii, align 4 33 ret void 34; CHECK-LABEL: @fltToInt 35; CHECK: xscvdpsxws [[REGCONV2:[0-9]+]], 36; CHECK: stfiwx [[REGCONV2]], 37} 38 39; Function Attrs: nounwind 40define void @intToDbl() #0 { 41entry: 42 %dd = alloca double, align 8 43 %0 = load i32, ptr @i, align 4 44 %conv = sitofp i32 %0 to double 45 store volatile double %conv, ptr %dd, align 8 46 ret void 47; CHECK-LABEL: @intToDbl 48; CHECK: lfiwax [[REGLD1:[0-9]+]], 49; CHECK: xscvsxddp {{[0-9]+}}, [[REGLD1]] 50} 51 52; Function Attrs: nounwind 53define void @intToFlt() #0 { 54entry: 55 %ff = alloca float, align 4 56 %0 = load i32, ptr @i, align 4 57 %conv = sitofp i32 %0 to float 58 store volatile float %conv, ptr %ff, align 4 59 ret void 60; CHECK-LABEL: @intToFlt 61; CHECK: lfiwax [[REGLD2:[0-9]+]], 62; CHECK: xscvsxdsp {{[0-9]}}, [[REGLD2]] 63} 64 65; Function Attrs: nounwind 66define void @dblToUInt() #0 { 67entry: 68 %uiui = alloca i32, align 4 69 %0 = load double, ptr @d, align 8 70 %conv = fptoui double %0 to i32 71 store volatile i32 %conv, ptr %uiui, align 4 72 ret void 73; CHECK-LABEL: @dblToUInt 74; CHECK: xscvdpuxws [[REGCONV3:[0-9]+]], 75; CHECK: stfiwx [[REGCONV3]], 76} 77 78; Function Attrs: nounwind 79define void @fltToUInt() #0 { 80entry: 81 %uiui = alloca i32, align 4 82 %0 = load float, ptr @f, align 4 83 %conv = fptoui float %0 to i32 84 store volatile i32 %conv, ptr %uiui, align 4 85 ret void 86; CHECK-LABEL: @fltToUInt 87; CHECK: xscvdpuxws [[REGCONV4:[0-9]+]], 88; CHECK: stfiwx [[REGCONV4]], 89} 90 91; Function Attrs: nounwind 92define void @uIntToDbl() #0 { 93entry: 94 %dd = alloca double, align 8 95 %0 = load i32, ptr @ui, align 4 96 %conv = uitofp i32 %0 to double 97 store volatile double %conv, ptr %dd, align 8 98 ret void 99; CHECK-LABEL: @uIntToDbl 100; CHECK: lfiwzx [[REGLD3:[0-9]+]], 101; CHECK: xscvuxddp {{[0-9]+}}, [[REGLD3]] 102} 103 104; Function Attrs: nounwind 105define void @uIntToFlt() #0 { 106entry: 107 %ff = alloca float, align 4 108 %0 = load i32, ptr @ui, align 4 109 %conv = uitofp i32 %0 to float 110 store volatile float %conv, ptr %ff, align 4 111 ret void 112; CHECK-LABEL: @uIntToFlt 113; CHECK: lfiwzx [[REGLD4:[0-9]+]], 114; CHECK: xscvuxdsp {{[0-9]+}}, [[REGLD4]] 115} 116 117; Function Attrs: nounwind 118define void @dblToFloat() #0 { 119entry: 120 %ff = alloca float, align 4 121 %0 = load double, ptr @d, align 8 122 %conv = fptrunc double %0 to float 123 store volatile float %conv, ptr %ff, align 4 124 ret void 125; CHECK-LABEL: @dblToFloat 126; CHECK: lfd [[REGLD5:[0-9]+]], 127; CHECK: stfs [[REGLD5]], 128; CHECK-P9-LABEL: @dblToFloat 129; CHECK-P9: lfd [[REGLD5:[0-9]+]], 130; CHECK-P9: stfs [[REGLD5]], 131} 132 133; Function Attrs: nounwind 134define void @floatToDbl() #0 { 135entry: 136 %dd = alloca double, align 8 137 %0 = load float, ptr @f, align 4 138 %conv = fpext float %0 to double 139 store volatile double %conv, ptr %dd, align 8 140 ret void 141; CHECK-LABEL: @floatToDbl 142; CHECK: lfs [[REGLD5:[0-9]+]], 143; CHECK: stfd [[REGLD5]], 144; CHECK-P9-LABEL: @floatToDbl 145; CHECK-P9: lfs [[REGLD5:[0-9]+]], 146; CHECK-P9: stfd [[REGLD5]], 147} 148