xref: /llvm-project/llvm/test/CodeGen/PowerPC/vsx-shuffle-le-multiple-uses.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
3; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=+vsx \
4; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
5
6define <2 x double> @loadHasMultipleUses(ptr %p1, ptr %p2) {
7; CHECK-LABEL: loadHasMultipleUses:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    lxv 0, 0(3)
10; CHECK-NEXT:    xxswapd 34, 0
11; CHECK-NEXT:    stxv 0, 0(4)
12; CHECK-NEXT:    blr
13  %v1 = load <2 x double>, ptr %p1
14  store <2 x double> %v1, ptr %p2, align 16
15  %v2 = shufflevector <2 x double> %v1, <2 x double> %v1, <2 x i32> < i32 1, i32 0>
16  ret <2 x double> %v2
17}
18
19define <2 x double> @storeHasMultipleUses(<2 x double> %v, ptr %p) {
20; CHECK-LABEL: storeHasMultipleUses:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    xxswapd 34, 34
23; CHECK-NEXT:    stxv 34, 256(5)
24; CHECK-NEXT:    blr
25  %v1 = shufflevector <2 x double> %v, <2 x double> %v, <2 x i32> < i32 1, i32 0>
26  %addr = getelementptr inbounds <2 x double>, ptr %p, i64 16
27  store <2 x double> %v1, ptr %addr, align 16
28  %v2 = shufflevector <2 x double> %v, <2 x double> %v, <2 x i32> < i32 1, i32 2>
29  ret <2 x double> %v2
30}
31
32