1; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx -O2 \ 2; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s 3 4; RUN: llc -verify-machineinstrs -mcpu=pwr9 -O2 \ 5; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \ 6; RUN: --check-prefix=CHECK-P9UP 7 8; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector -O2 \ 9; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s 10 11; RUN: llc -verify-machineinstrs -mcpu=pwr10 -O2 \ 12; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \ 13; RUN: --check-prefix=CHECK-P9UP 14 15@vf = global <4 x float> <float -1.500000e+00, float 2.500000e+00, float -3.500000e+00, float 4.500000e+00>, align 16 16@vd = global <2 x double> <double 3.500000e+00, double -7.500000e+00>, align 16 17@vsi = global <4 x i32> <i32 -1, i32 2, i32 -3, i32 4>, align 16 18@vui = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16 19@vsll = global <2 x i64> <i64 255, i64 -937>, align 16 20@vull = global <2 x i64> <i64 1447, i64 2894>, align 16 21@res_vsi = common global <4 x i32> zeroinitializer, align 16 22@res_vui = common global <4 x i32> zeroinitializer, align 16 23@res_vf = common global <4 x float> zeroinitializer, align 16 24@res_vsll = common global <2 x i64> zeroinitializer, align 16 25@res_vull = common global <2 x i64> zeroinitializer, align 16 26@res_vd = common global <2 x double> zeroinitializer, align 16 27 28define void @test1() { 29entry: 30; CHECK-LABEL: test1 31; CHECK-P9UP-LABEL: test1 32; CHECK: lxvd2x 33; CHECK-P9UP-DAG: lxv 34 %0 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr @vsi) 35; CHECK: stxvd2x 36; CHECK-P9UP-DAG: stxv 37 store <4 x i32> %0, ptr @res_vsi, align 16 38; CHECK: lxvd2x 39; CHECK-P9UP-DAG: lxv 40 %1 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr @vui) 41; CHECK: stxvd2x 42; CHECK-P9UP-DAG: stxv 43 store <4 x i32> %1, ptr @res_vui, align 16 44; CHECK: lxvd2x 45; CHECK-P9UP-DAG: lxv 46 %2 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr @vf) 47 %3 = bitcast <4 x i32> %2 to <4 x float> 48; CHECK: stxvd2x 49; CHECK-P9UP-DAG: stxv 50 store <4 x float> %3, ptr @res_vf, align 16 51; CHECK: lxvd2x 52; CHECK-P9UP-DAG: lxv 53 %4 = call <2 x double> @llvm.ppc.vsx.lxvd2x(ptr @vsll) 54 %5 = bitcast <2 x double> %4 to <2 x i64> 55; CHECK: stxvd2x 56; CHECK-P9UP-DAG: stxv 57 store <2 x i64> %5, ptr @res_vsll, align 16 58; CHECK: lxvd2x 59; CHECK-P9UP-DAG: lxv 60 %6 = call <2 x double> @llvm.ppc.vsx.lxvd2x(ptr @vull) 61 %7 = bitcast <2 x double> %6 to <2 x i64> 62; CHECK: stxvd2x 63; CHECK-P9UP-DAG: stxv 64 store <2 x i64> %7, ptr @res_vull, align 16 65; CHECK: lxvd2x 66; CHECK-P9UP-DAG: lxv 67 %8 = call <2 x double> @llvm.ppc.vsx.lxvd2x(ptr @vd) 68; CHECK: stxvd2x 69; CHECK-P9UP-DAG: stxv 70 store <2 x double> %8, ptr @res_vd, align 16 71; CHECK: lxvd2x 72; CHECK-P9UP-DAG: lxv 73 %9 = load <4 x i32>, ptr @vsi, align 16 74; CHECK: stxvd2x 75; CHECK-P9UP-DAG: stxv 76 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %9, ptr @res_vsi) 77; CHECK: lxvd2x 78; CHECK-P9UP-DAG: lxv 79 %10 = load <4 x i32>, ptr @vui, align 16 80; CHECK: stxvd2x 81; CHECK-P9UP-DAG: stxv 82 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %10, ptr @res_vui) 83; CHECK: lxvd2x 84; CHECK-P9UP-DAG: lxv 85 %11 = load <4 x float>, ptr @vf, align 16 86 %12 = bitcast <4 x float> %11 to <4 x i32> 87; CHECK: stxvd2x 88; CHECK-P9UP-DAG: stxv 89 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %12, ptr @res_vf) 90; CHECK: lxvd2x 91; CHECK-P9UP-DAG: lxv 92 %13 = load <2 x i64>, ptr @vsll, align 16 93 %14 = bitcast <2 x i64> %13 to <2 x double> 94; CHECK: stxvd2x 95; CHECK-P9UP-DAG: stxv 96 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %14, ptr @res_vsll) 97; CHECK: lxvd2x 98; CHECK-P9UP-DAG: lxv 99 %15 = load <2 x i64>, ptr @vull, align 16 100 %16 = bitcast <2 x i64> %15 to <2 x double> 101; CHECK: stxvd2x 102; CHECK-P9UP-DAG: stxv 103 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %16, ptr @res_vull) 104; CHECK: lxvd2x 105; CHECK-P9UP-DAG: lxv 106 %17 = load <2 x double>, ptr @vd, align 16 107; CHECK: stxvd2x 108; CHECK-P9UP-DAG: stxv 109 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %17, ptr @res_vd) 110 ret void 111} 112 113declare void @llvm.ppc.vsx.stxvd2x(<2 x double>, ptr) 114declare void @llvm.ppc.vsx.stxvw4x(<4 x i32>, ptr) 115declare <2 x double> @llvm.ppc.vsx.lxvd2x(ptr) 116declare <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr) 117