1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -mattr=+power8-vector < %s | FileCheck %s 3; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mattr=+power8-vector < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck -check-prefix=CHECK-PWR7 %s 5; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck -check-prefix=CHECK-PWR7-AIX %s 6 7define void @VPKUDUM_unary(ptr %A) { 8; CHECK-LABEL: VPKUDUM_unary: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: lxvw4x 34, 0, 3 11; CHECK-NEXT: vpkudum 2, 2, 2 12; CHECK-NEXT: stxvw4x 34, 0, 3 13; CHECK-NEXT: blr 14; 15; CHECK-PWR7-LABEL: VPKUDUM_unary: 16; CHECK-PWR7: # %bb.0: # %entry 17; CHECK-PWR7-NEXT: addis 4, 2, .LCPI0_0@toc@ha 18; CHECK-PWR7-NEXT: lxvw4x 34, 0, 3 19; CHECK-PWR7-NEXT: addi 4, 4, .LCPI0_0@toc@l 20; CHECK-PWR7-NEXT: lxvw4x 35, 0, 4 21; CHECK-PWR7-NEXT: vperm 2, 2, 2, 3 22; CHECK-PWR7-NEXT: stxvw4x 34, 0, 3 23; CHECK-PWR7-NEXT: blr 24; 25; CHECK-PWR7-AIX-LABEL: VPKUDUM_unary: 26; CHECK-PWR7-AIX: # %bb.0: # %entry 27; CHECK-PWR7-AIX-NEXT: ld 4, L..C0(2) # %const.0 28; CHECK-PWR7-AIX-NEXT: lxvw4x 34, 0, 3 29; CHECK-PWR7-AIX-NEXT: lxvw4x 35, 0, 4 30; CHECK-PWR7-AIX-NEXT: vperm 2, 2, 2, 3 31; CHECK-PWR7-AIX-NEXT: stxvw4x 34, 0, 3 32; CHECK-PWR7-AIX-NEXT: blr 33entry: 34 %tmp = load <2 x i64>, ptr %A 35 %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> 36 %tmp3 = extractelement <4 x i32> %tmp2, i32 1 37 %tmp4 = extractelement <4 x i32> %tmp2, i32 3 38 %tmp5 = insertelement <4 x i32> undef, i32 %tmp3, i32 0 39 %tmp6 = insertelement <4 x i32> %tmp5, i32 %tmp4, i32 1 40 %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 2 41 %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 3 42 %tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64> 43 store <2 x i64> %tmp9, ptr %A 44 ret void 45} 46 47define void @VPKUDUM(ptr %A, ptr %B) { 48; CHECK-LABEL: VPKUDUM: 49; CHECK: # %bb.0: # %entry 50; CHECK-NEXT: lxvw4x 34, 0, 3 51; CHECK-NEXT: lxvw4x 35, 0, 4 52; CHECK-NEXT: vpkudum 2, 2, 3 53; CHECK-NEXT: stxvw4x 34, 0, 3 54; CHECK-NEXT: blr 55; 56; CHECK-PWR7-LABEL: VPKUDUM: 57; CHECK-PWR7: # %bb.0: # %entry 58; CHECK-PWR7-NEXT: lxvw4x 35, 0, 4 59; CHECK-PWR7-NEXT: addis 4, 2, .LCPI1_0@toc@ha 60; CHECK-PWR7-NEXT: lxvw4x 34, 0, 3 61; CHECK-PWR7-NEXT: addi 4, 4, .LCPI1_0@toc@l 62; CHECK-PWR7-NEXT: lxvw4x 36, 0, 4 63; CHECK-PWR7-NEXT: vperm 2, 2, 3, 4 64; CHECK-PWR7-NEXT: stxvw4x 34, 0, 3 65; CHECK-PWR7-NEXT: blr 66; 67; CHECK-PWR7-AIX-LABEL: VPKUDUM: 68; CHECK-PWR7-AIX: # %bb.0: # %entry 69; CHECK-PWR7-AIX-NEXT: lxvw4x 35, 0, 4 70; CHECK-PWR7-AIX-NEXT: ld 4, L..C1(2) # %const.0 71; CHECK-PWR7-AIX-NEXT: lxvw4x 34, 0, 3 72; CHECK-PWR7-AIX-NEXT: lxvw4x 36, 0, 4 73; CHECK-PWR7-AIX-NEXT: vperm 2, 2, 3, 4 74; CHECK-PWR7-AIX-NEXT: stxvw4x 34, 0, 3 75; CHECK-PWR7-AIX-NEXT: blr 76entry: 77 %tmp = load <2 x i64>, ptr %A 78 %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> 79 %tmp3 = load <2 x i64>, ptr %B 80 %tmp4 = bitcast <2 x i64> %tmp3 to <4 x i32> 81 %tmp5 = extractelement <4 x i32> %tmp2, i32 1 82 %tmp6 = extractelement <4 x i32> %tmp2, i32 3 83 %tmp7 = extractelement <4 x i32> %tmp4, i32 1 84 %tmp8 = extractelement <4 x i32> %tmp4, i32 3 85 %tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0 86 %tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1 87 %tmp11 = insertelement <4 x i32> %tmp10, i32 %tmp7, i32 2 88 %tmp12 = insertelement <4 x i32> %tmp11, i32 %tmp8, i32 3 89 %tmp13 = bitcast <4 x i32> %tmp12 to <2 x i64> 90 store <2 x i64> %tmp13, ptr %A 91 ret void 92} 93 94