xref: /llvm-project/llvm/test/CodeGen/PowerPC/vec-promote.ll (revision b922a3621116b404d868af8b74cab25ab78555be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=powerpc64-unknown-unknown -verify-machineinstrs -mcpu=pwr8 \
3; RUN:   < %s | FileCheck %s --check-prefix=CHECK-BE
4; RUN: llc -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs -mcpu=pwr8 \
5; RUN:   < %s | FileCheck %s --check-prefix=CHECK-LE
6
7define noundef <2 x double> @vec_promote_double_zeroed(ptr nocapture noundef readonly %p) {
8; CHECK-BE-LABEL: vec_promote_double_zeroed:
9; CHECK-BE:       # %bb.0: # %entry
10; CHECK-BE-NEXT:    lfd 0, 0(3)
11; CHECK-BE-NEXT:    xxlxor 1, 1, 1
12; CHECK-BE-NEXT:    xxmrghd 34, 0, 1
13; CHECK-BE-NEXT:    blr
14;
15; CHECK-LE-LABEL: vec_promote_double_zeroed:
16; CHECK-LE:       # %bb.0: # %entry
17; CHECK-LE-NEXT:    lfd 0, 0(3)
18; CHECK-LE-NEXT:    xxlxor 1, 1, 1
19; CHECK-LE-NEXT:    xxmrghd 34, 1, 0
20; CHECK-LE-NEXT:    blr
21entry:
22  %0 = load double, ptr %p, align 8
23  %vecins.i = insertelement <2 x double> <double poison, double 0.0>, double %0, i64 0
24  ret <2 x double> %vecins.i
25}
26
27define noundef <2 x double> @vec_promote_double(ptr nocapture noundef readonly %p) {
28; CHECK-BE-LABEL: vec_promote_double:
29; CHECK-BE:       # %bb.0: # %entry
30; CHECK-BE-NEXT:    lxvdsx 34, 0, 3
31; CHECK-BE-NEXT:    blr
32;
33; CHECK-LE-LABEL: vec_promote_double:
34; CHECK-LE:       # %bb.0: # %entry
35; CHECK-LE-NEXT:    lxvdsx 34, 0, 3
36; CHECK-LE-NEXT:    blr
37entry:
38  %0 = load double, ptr %p, align 8
39  %vecins.i = insertelement <2 x double> poison, double %0, i64 0
40  ret <2 x double> %vecins.i
41}
42
43define noundef <4 x float> @vec_promote_float_zeroed(ptr nocapture noundef readonly %p) {
44; CHECK-BE-LABEL: vec_promote_float_zeroed:
45; CHECK-BE:       # %bb.0: # %entry
46; CHECK-BE-NEXT:    lfs 0, 0(3)
47; CHECK-BE-NEXT:    xxlxor 1, 1, 1
48; CHECK-BE-NEXT:    xxmrghd 0, 0, 1
49; CHECK-BE-NEXT:    xxspltd 1, 1, 0
50; CHECK-BE-NEXT:    xvcvdpsp 34, 0
51; CHECK-BE-NEXT:    xvcvdpsp 35, 1
52; CHECK-BE-NEXT:    vmrgew 2, 2, 3
53; CHECK-BE-NEXT:    blr
54;
55; CHECK-LE-LABEL: vec_promote_float_zeroed:
56; CHECK-LE:       # %bb.0: # %entry
57; CHECK-LE-NEXT:    lfs 0, 0(3)
58; CHECK-LE-NEXT:    xxlxor 1, 1, 1
59; CHECK-LE-NEXT:    xxmrghd 0, 1, 0
60; CHECK-LE-NEXT:    xxspltd 1, 1, 0
61; CHECK-LE-NEXT:    xvcvdpsp 34, 0
62; CHECK-LE-NEXT:    xvcvdpsp 35, 1
63; CHECK-LE-NEXT:    vmrgew 2, 3, 2
64; CHECK-LE-NEXT:    blr
65entry:
66  %0 = load float, ptr %p, align 8
67  %vecins.i = insertelement <4 x float> <float poison, float 0.0, float 0.0, float 0.0>, float %0, i64 0
68  ret <4 x float> %vecins.i
69}
70
71define noundef <4 x float> @vec_promote_float(ptr nocapture noundef readonly %p) {
72; CHECK-BE-LABEL: vec_promote_float:
73; CHECK-BE:       # %bb.0: # %entry
74; CHECK-BE-NEXT:    lfiwzx 0, 0, 3
75; CHECK-BE-NEXT:    xxspltw 34, 0, 1
76; CHECK-BE-NEXT:    blr
77;
78; CHECK-LE-LABEL: vec_promote_float:
79; CHECK-LE:       # %bb.0: # %entry
80; CHECK-LE-NEXT:    lfiwzx 0, 0, 3
81; CHECK-LE-NEXT:    xxspltw 34, 0, 1
82; CHECK-LE-NEXT:    blr
83entry:
84  %0 = load float, ptr %p, align 8
85  %vecins.i = insertelement <4 x float> poison, float %0, i64 0
86  ret <4 x float> %vecins.i
87}
88
89define noundef <2 x i64> @vec_promote_long_long_zeroed(ptr nocapture noundef readonly %p) {
90; CHECK-BE-LABEL: vec_promote_long_long_zeroed:
91; CHECK-BE:       # %bb.0: # %entry
92; CHECK-BE-NEXT:    ld 3, 0(3)
93; CHECK-BE-NEXT:    li 4, 0
94; CHECK-BE-NEXT:    mtfprd 0, 4
95; CHECK-BE-NEXT:    mtfprd 1, 3
96; CHECK-BE-NEXT:    xxmrghd 34, 1, 0
97; CHECK-BE-NEXT:    blr
98;
99; CHECK-LE-LABEL: vec_promote_long_long_zeroed:
100; CHECK-LE:       # %bb.0: # %entry
101; CHECK-LE-NEXT:    ld 3, 0(3)
102; CHECK-LE-NEXT:    li 4, 0
103; CHECK-LE-NEXT:    mtfprd 0, 4
104; CHECK-LE-NEXT:    mtfprd 1, 3
105; CHECK-LE-NEXT:    xxmrghd 34, 0, 1
106; CHECK-LE-NEXT:    blr
107entry:
108  %0 = load i64, ptr %p, align 8
109  %vecins.i = insertelement <2 x i64> <i64 poison, i64 0>, i64 %0, i64 0
110  ret <2 x i64> %vecins.i
111}
112
113define noundef <2 x i64> @vec_promote_long_long(ptr nocapture noundef readonly %p) {
114; CHECK-BE-LABEL: vec_promote_long_long:
115; CHECK-BE:       # %bb.0: # %entry
116; CHECK-BE-NEXT:    lxvdsx 34, 0, 3
117; CHECK-BE-NEXT:    blr
118;
119; CHECK-LE-LABEL: vec_promote_long_long:
120; CHECK-LE:       # %bb.0: # %entry
121; CHECK-LE-NEXT:    lxvdsx 34, 0, 3
122; CHECK-LE-NEXT:    blr
123entry:
124  %0 = load i64, ptr %p, align 8
125  %vecins.i = insertelement <2 x i64> poison, i64 %0, i64 0
126  ret <2 x i64> %vecins.i
127}
128
129define noundef <4 x i32> @vec_promote_int_zeroed(ptr nocapture noundef readonly %p) {
130; CHECK-BE-LABEL: vec_promote_int_zeroed:
131; CHECK-BE:       # %bb.0: # %entry
132; CHECK-BE-NEXT:    lwz 3, 0(3)
133; CHECK-BE-NEXT:    li 4, 0
134; CHECK-BE-NEXT:    li 5, 0
135; CHECK-BE-NEXT:    rldimi 4, 4, 32, 0
136; CHECK-BE-NEXT:    rldimi 5, 3, 32, 0
137; CHECK-BE-NEXT:    mtfprd 1, 4
138; CHECK-BE-NEXT:    mtfprd 0, 5
139; CHECK-BE-NEXT:    xxmrghd 34, 0, 1
140; CHECK-BE-NEXT:    blr
141;
142; CHECK-LE-LABEL: vec_promote_int_zeroed:
143; CHECK-LE:       # %bb.0: # %entry
144; CHECK-LE-NEXT:    lwz 3, 0(3)
145; CHECK-LE-NEXT:    li 4, 0
146; CHECK-LE-NEXT:    rldimi 3, 4, 32, 0
147; CHECK-LE-NEXT:    rldimi 4, 4, 32, 0
148; CHECK-LE-NEXT:    mtfprd 0, 3
149; CHECK-LE-NEXT:    mtfprd 1, 4
150; CHECK-LE-NEXT:    xxmrghd 34, 1, 0
151; CHECK-LE-NEXT:    blr
152entry:
153  %0 = load i32, ptr %p, align 4
154  %vecins.i = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %0, i64 0
155  ret <4 x i32> %vecins.i
156}
157
158define noundef <4 x i32> @vec_promote_int(ptr nocapture noundef readonly %p) {
159; CHECK-BE-LABEL: vec_promote_int:
160; CHECK-BE:       # %bb.0: # %entry
161; CHECK-BE-NEXT:    lfiwzx 0, 0, 3
162; CHECK-BE-NEXT:    xxspltw 34, 0, 1
163; CHECK-BE-NEXT:    blr
164;
165; CHECK-LE-LABEL: vec_promote_int:
166; CHECK-LE:       # %bb.0: # %entry
167; CHECK-LE-NEXT:    lfiwzx 0, 0, 3
168; CHECK-LE-NEXT:    xxspltw 34, 0, 1
169; CHECK-LE-NEXT:    blr
170entry:
171  %0 = load i32, ptr %p, align 4
172  %vecins.i = insertelement <4 x i32> poison, i32 %0, i64 0
173  ret <4 x i32> %vecins.i
174}
175
176define noundef <8 x i16> @vec_promote_short_zeroed(ptr nocapture noundef readonly %p) {
177; CHECK-BE-LABEL: vec_promote_short_zeroed:
178; CHECK-BE:       # %bb.0: # %entry
179; CHECK-BE-NEXT:    addis 4, 2, .LCPI8_0@toc@ha
180; CHECK-BE-NEXT:    lhz 3, 0(3)
181; CHECK-BE-NEXT:    addi 4, 4, .LCPI8_0@toc@l
182; CHECK-BE-NEXT:    mtvsrwz 36, 3
183; CHECK-BE-NEXT:    lxvw4x 34, 0, 4
184; CHECK-BE-NEXT:    li 4, 0
185; CHECK-BE-NEXT:    mtvsrwz 35, 4
186; CHECK-BE-NEXT:    vperm 2, 4, 3, 2
187; CHECK-BE-NEXT:    blr
188;
189; CHECK-LE-LABEL: vec_promote_short_zeroed:
190; CHECK-LE:       # %bb.0: # %entry
191; CHECK-LE-NEXT:    addis 4, 2, .LCPI8_0@toc@ha
192; CHECK-LE-NEXT:    lhz 3, 0(3)
193; CHECK-LE-NEXT:    addi 4, 4, .LCPI8_0@toc@l
194; CHECK-LE-NEXT:    mtvsrd 36, 3
195; CHECK-LE-NEXT:    lxvd2x 0, 0, 4
196; CHECK-LE-NEXT:    li 4, 0
197; CHECK-LE-NEXT:    mtvsrd 35, 4
198; CHECK-LE-NEXT:    xxswapd 34, 0
199; CHECK-LE-NEXT:    vperm 2, 3, 4, 2
200; CHECK-LE-NEXT:    blr
201entry:
202  %0 = load i16, ptr %p, align 2
203  %vecins.i = insertelement <8 x i16> <i16 poison, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %0, i64 0
204  ret <8 x i16> %vecins.i
205}
206
207define noundef <8 x i16> @vec_promote_short(ptr nocapture noundef readonly %p) {
208; CHECK-BE-LABEL: vec_promote_short:
209; CHECK-BE:       # %bb.0: # %entry
210; CHECK-BE-NEXT:    lhzx 3, 0, 3
211; CHECK-BE-NEXT:    mtvsrwz 34, 3
212; CHECK-BE-NEXT:    vsplth 2, 2, 3
213; CHECK-BE-NEXT:    blr
214;
215; CHECK-LE-LABEL: vec_promote_short:
216; CHECK-LE:       # %bb.0: # %entry
217; CHECK-LE-NEXT:    lhzx 3, 0, 3
218; CHECK-LE-NEXT:    mtvsrwz 34, 3
219; CHECK-LE-NEXT:    vsplth 2, 2, 3
220; CHECK-LE-NEXT:    blr
221entry:
222  %0 = load i16, ptr %p, align 2
223  %vecins.i = insertelement <8 x i16> poison, i16 %0, i64 0
224  ret <8 x i16> %vecins.i
225}
226
227define noundef <16 x i8> @vec_promote_char_zeroed(ptr nocapture noundef readonly %p) {
228; CHECK-BE-LABEL: vec_promote_char_zeroed:
229; CHECK-BE:       # %bb.0: # %entry
230; CHECK-BE-NEXT:    addis 4, 2, .LCPI10_0@toc@ha
231; CHECK-BE-NEXT:    lbz 3, 0(3)
232; CHECK-BE-NEXT:    addi 4, 4, .LCPI10_0@toc@l
233; CHECK-BE-NEXT:    mtvsrwz 36, 3
234; CHECK-BE-NEXT:    lxvw4x 34, 0, 4
235; CHECK-BE-NEXT:    li 4, 0
236; CHECK-BE-NEXT:    mtvsrwz 35, 4
237; CHECK-BE-NEXT:    vperm 2, 4, 3, 2
238; CHECK-BE-NEXT:    blr
239;
240; CHECK-LE-LABEL: vec_promote_char_zeroed:
241; CHECK-LE:       # %bb.0: # %entry
242; CHECK-LE-NEXT:    addis 4, 2, .LCPI10_0@toc@ha
243; CHECK-LE-NEXT:    lbz 3, 0(3)
244; CHECK-LE-NEXT:    addi 4, 4, .LCPI10_0@toc@l
245; CHECK-LE-NEXT:    mtvsrd 36, 3
246; CHECK-LE-NEXT:    lxvd2x 0, 0, 4
247; CHECK-LE-NEXT:    li 4, 0
248; CHECK-LE-NEXT:    mtvsrd 35, 4
249; CHECK-LE-NEXT:    xxswapd 34, 0
250; CHECK-LE-NEXT:    vperm 2, 3, 4, 2
251; CHECK-LE-NEXT:    blr
252entry:
253  %0 = load i8, ptr %p, align 1
254  %vecins.i = insertelement <16 x i8> <i8 poison, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, i8 %0, i64 0
255  ret <16 x i8> %vecins.i
256}
257
258define noundef <16 x i8> @vec_promote_char(ptr nocapture noundef readonly %p) {
259; CHECK-BE-LABEL: vec_promote_char:
260; CHECK-BE:       # %bb.0: # %entry
261; CHECK-BE-NEXT:    lbzx 3, 0, 3
262; CHECK-BE-NEXT:    mtvsrwz 34, 3
263; CHECK-BE-NEXT:    vspltb 2, 2, 7
264; CHECK-BE-NEXT:    blr
265;
266; CHECK-LE-LABEL: vec_promote_char:
267; CHECK-LE:       # %bb.0: # %entry
268; CHECK-LE-NEXT:    lbzx 3, 0, 3
269; CHECK-LE-NEXT:    mtvsrwz 34, 3
270; CHECK-LE-NEXT:    vspltb 2, 2, 7
271; CHECK-LE-NEXT:    blr
272entry:
273  %0 = load i8, ptr %p, align 1
274  %vecins.i = insertelement <16 x i8> poison, i8 %0, i64 0
275  ret <16 x i8> %vecins.i
276}
277