1; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 \ 2; RUN: -verify-machineinstrs -ppc-asm-full-reg-names | FileCheck %s 3 4; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 \ 5; RUN: -verify-machineinstrs -vec-extabi | \ 6; RUN: FileCheck %s --check-prefixes=AIX,AIX64 7; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 \ 8; RUN: -verify-machineinstrs -vec-extabi | \ 9; RUN: FileCheck %s --check-prefixes=AIX,AIX32 10 11define dso_local void @test(ptr %Arr, i32 signext %Len) { 12; CHECK-LABEL: test: 13; CHECK: lxv [[REG:vs[0-9]+]], 0(r{{[0-9]+}}) 14; CHECK-NOT: [[REG]] 15; CHECK: xxbrw vs{{[0-9]+}}, [[REG]] 16 17; AIX-LABEL: test: 18; AIX64: lxv [[REG64:[0-9]+]], {{[0-9]+}}({{[0-9]+}}) 19; AIX32: lxv [[REG32:[0-9]+]], {{[0-9]+}}({{[0-9]+}}) 20; AIX64-NOT: [[REG64]] 21; AIX64: xxbrw {{[0-9]+}}, [[REG64]] 22; AIX32: xxbrw {{[0-9]+}}, [[REG32]] 23entry: 24 %cmp1 = icmp slt i32 0, %Len 25 br i1 %cmp1, label %for.body.lr.ph, label %for.cond.cleanup 26 27for.body.lr.ph: ; preds = %entry 28 %min.iters.check = icmp ult i32 %Len, 4 29 br i1 %min.iters.check, label %scalar.ph, label %vector.ph 30 31vector.ph: ; preds = %for.body.lr.ph 32 %n.mod.vf = urem i32 %Len, 4 33 %n.vec = sub i32 %Len, %n.mod.vf 34 br label %vector.body 35 36vector.body: ; preds = %vector.body, %vector.ph 37 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] 38 %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0 39 %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 40 %induction = add <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3> 41 %0 = add i32 %index, 0 42 %1 = sext i32 %0 to i64 43 %2 = getelementptr inbounds i32, ptr %Arr, i64 %1 44 %wide.load = load <4 x i32>, ptr %2, align 4 45 %3 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %wide.load) 46 %4 = sext i32 %0 to i64 47 %5 = getelementptr inbounds i32, ptr %Arr, i64 %4 48 store <4 x i32> %3, ptr %5, align 4 49 %index.next = add i32 %index, 4 50 %6 = icmp eq i32 %index.next, %n.vec 51 br i1 %6, label %middle.block, label %vector.body 52 53middle.block: ; preds = %vector.body 54 %cmp.n = icmp eq i32 %Len, %n.vec 55 br i1 %cmp.n, label %for.cond.for.cond.cleanup_crit_edge, label %scalar.ph 56 57scalar.ph: ; preds = %middle.block, %for.body.lr.ph 58 %bc.resume.val = phi i32 [ %n.vec, %middle.block ], [ 0, %for.body.lr.ph ] 59 br label %for.body 60 61for.cond.for.cond.cleanup_crit_edge: ; preds = %middle.block, %for.inc 62 br label %for.cond.cleanup 63 64for.cond.cleanup: ; preds = %for.cond.for.cond.cleanup_crit_edge, %entry 65 br label %for.end 66 67for.body: ; preds = %for.inc, %scalar.ph 68 %i.02 = phi i32 [ %bc.resume.val, %scalar.ph ], [ %inc, %for.inc ] 69 %idxprom = sext i32 %i.02 to i64 70 %arrayidx = getelementptr inbounds i32, ptr %Arr, i64 %idxprom 71 %7 = load i32, ptr %arrayidx, align 4 72 %8 = call i32 @llvm.bswap.i32(i32 %7) 73 %idxprom1 = sext i32 %i.02 to i64 74 %arrayidx2 = getelementptr inbounds i32, ptr %Arr, i64 %idxprom1 75 store i32 %8, ptr %arrayidx2, align 4 76 br label %for.inc 77 78for.inc: ; preds = %for.body 79 %inc = add nsw i32 %i.02, 1 80 %cmp = icmp slt i32 %inc, %Len 81 br i1 %cmp, label %for.body, label %for.cond.for.cond.cleanup_crit_edge 82 83for.end: ; preds = %for.cond.cleanup 84 ret void 85} 86 87define dso_local <8 x i16> @test_halfword(<8 x i16> %a) local_unnamed_addr { 88; CHECK-LABEL: test_halfword: 89; CHECK: xxbrh vs34, vs34 90; CHECK-NEXT: blr 91 92; AIX-LABEL: test_halfword: 93; AIX: xxbrh 34, 34 94; AIX-NEXT: blr 95entry: 96 %0 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %a) 97 ret <8 x i16> %0 98} 99 100define dso_local <2 x i64> @test_doubleword(<2 x i64> %a) local_unnamed_addr { 101; CHECK-LABEL: test_doubleword: 102; CHECK: xxbrd vs34, vs34 103; CHECK-NEXT: blr 104 105; AIX-LABEL: test_doubleword: 106; AIX: xxbrd 34, 34 107; AIX-NEXT: blr 108entry: 109 %0 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %a) 110 ret <2 x i64> %0 111} 112 113define dso_local <1 x i128> @test_quadword(<1 x i128> %a) local_unnamed_addr { 114; CHECK-LABEL: test_quadword: 115; CHECK: xxbrq vs34, vs34 116; CHECK-NEXT: blr 117 118; AIX-LABEL: test_quadword: 119; AIX: xxbrq 34, 34 120; AIX-NEXT: blr 121entry: 122 %0 = call <1 x i128> @llvm.bswap.v1i128(<1 x i128> %a) 123 ret <1 x i128> %0 124} 125 126; Function Attrs: nounwind readnone speculatable willreturn 127declare <1 x i128> @llvm.bswap.v1i128(<1 x i128>) 128 129; Function Attrs: nounwind readnone speculatable willreturn 130declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) 131 132; Function Attrs: nounwind readnone speculatable willreturn 133declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>) 134 135; Function Attrs: nounwind readnone speculatable willreturn 136declare i32 @llvm.bswap.i32(i32) 137 138; Function Attrs: nounwind readnone speculatable willreturn 139declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) 140