xref: /llvm-project/llvm/test/CodeGen/PowerPC/vec-abi-align.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
4target triple = "powerpc64-unknown-linux-gnu"
5
6%struct.s2 = type { i64, <4 x float> }
7
8@ve = external global <4 x float>
9@n = external global i64
10
11; Function Attrs: nounwind
12define void @test1(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, <4 x float> inreg %vs.coerce) #0 {
13entry:
14  store <4 x float> %vs.coerce, ptr @ve, align 16
15  ret void
16
17; CHECK-LABEL: @test1
18; CHECK: stvx 2,
19; CHECK: blr
20
21; CHECK-VSX-LABEL: @test1
22; CHECK-VSX: stxvw4x 34,
23; CHECK-VSX: blr
24}
25
26; Function Attrs: nounwind
27define void @test2(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, ptr byval(%struct.s2) nocapture readonly %vs) #0 {
28entry:
29  %0 = load i64, ptr %vs, align 8
30  store i64 %0, ptr @n, align 8
31  %v = getelementptr inbounds %struct.s2, ptr %vs, i64 0, i32 1
32  %1 = load <4 x float>, ptr %v, align 16
33  store <4 x float> %1, ptr @ve, align 16
34  ret void
35
36; CHECK-LABEL: @test2
37; CHECK-DAG: ld {{[0-9]+}}, 112(1)
38; CHECK-DAG: li [[REG16:[0-9]+]], 16
39; CHECK-DAG: addi [[REGB:[0-9]+]], 1, 112
40; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]
41; CHECK: blr
42
43; CHECK-VSX-LABEL: @test2
44; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1)
45; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
46; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 112
47; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
48; CHECK-VSX: blr
49}
50
51; Function Attrs: nounwind
52define void @test3(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, ptr byval(%struct.s2) nocapture readonly %vs) #0 {
53entry:
54  %0 = load i64, ptr %vs, align 8
55  store i64 %0, ptr @n, align 8
56  %v = getelementptr inbounds %struct.s2, ptr %vs, i64 0, i32 1
57  %1 = load <4 x float>, ptr %v, align 16
58  store <4 x float> %1, ptr @ve, align 16
59  ret void
60
61; CHECK-LABEL: @test3
62; CHECK-DAG: ld {{[0-9]+}}, 128(1)
63; CHECK-DAG: li [[REG16:[0-9]+]], 16
64; CHECK-DAG: addi [[REGB:[0-9]+]], 1, 128
65; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]
66; CHECK: blr
67
68; CHECK-VSX-LABEL: @test3
69; CHECK-VSX-DAG: ld {{[0-9]+}}, 128(1)
70; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
71; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 128
72; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
73; CHECK-VSX: blr
74}
75
76attributes #0 = { nounwind }
77
78