xref: /llvm-project/llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll (revision 53c37f300dd1b450671f2aee4cc649c380adb5ad)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -ppc-late-peephole=true < %s | FileCheck %s
3; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
4; RUN:  --check-prefix=CHECK-BE
5; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
6; RUN:  --check-prefix=CHECK-P7
7
8; Function Attrs: norecurse nounwind readnone
9define zeroext i32 @geti(<4 x i32> %a, i32 zeroext %b) {
10; CHECK-LABEL: geti:
11; CHECK:       # %bb.0: # %entry
12; CHECK-NEXT:    li 3, 2
13; CHECK-NEXT:    andc 3, 3, 5
14; CHECK-NEXT:    sldi 3, 3, 2
15; CHECK-NEXT:    lvsl 3, 0, 3
16; CHECK-NEXT:    li 3, 1
17; CHECK-NEXT:    and 3, 3, 5
18; CHECK-NEXT:    sldi 3, 3, 5
19; CHECK-NEXT:    vperm 2, 2, 2, 3
20; CHECK-NEXT:    mfvsrd 4, 34
21; CHECK-NEXT:    srd 3, 4, 3
22; CHECK-NEXT:    clrldi 3, 3, 32
23; CHECK-NEXT:    blr
24;
25; CHECK-BE-LABEL: geti:
26; CHECK-BE:       # %bb.0: # %entry
27; CHECK-BE-NEXT:    andi. 3, 5, 2
28; CHECK-BE-NEXT:    sldi 3, 3, 2
29; CHECK-BE-NEXT:    lvsl 3, 0, 3
30; CHECK-BE-NEXT:    li 3, 1
31; CHECK-BE-NEXT:    andc 3, 3, 5
32; CHECK-BE-NEXT:    sldi 3, 3, 5
33; CHECK-BE-NEXT:    vperm 2, 2, 2, 3
34; CHECK-BE-NEXT:    mfvsrd 4, 34
35; CHECK-BE-NEXT:    srd 3, 4, 3
36; CHECK-BE-NEXT:    clrldi 3, 3, 32
37; CHECK-BE-NEXT:    blr
38;
39; CHECK-P7-LABEL: geti:
40; CHECK-P7:       # %bb.0: # %entry
41; CHECK-P7-NEXT:    addi 4, 1, -16
42; CHECK-P7-NEXT:    rlwinm 3, 5, 2, 28, 29
43; CHECK-P7-NEXT:    stxvw4x 34, 0, 4
44; CHECK-P7-NEXT:    lwzx 3, 4, 3
45; CHECK-P7-NEXT:    blr
46entry:
47  %vecext = extractelement <4 x i32> %a, i32 %b
48  ret i32 %vecext
49}
50
51; Function Attrs: norecurse nounwind readnone
52define i64 @getl(<2 x i64> %a, i32 zeroext %b) {
53; CHECK-LABEL: getl:
54; CHECK:       # %bb.0: # %entry
55; CHECK-NEXT:    li 3, 1
56; CHECK-NEXT:    andc 3, 3, 5
57; CHECK-NEXT:    sldi 3, 3, 3
58; CHECK-NEXT:    lvsl 3, 0, 3
59; CHECK-NEXT:    vperm 2, 2, 2, 3
60; CHECK-NEXT:    mfvsrd 3, 34
61; CHECK-NEXT:    blr
62;
63; CHECK-BE-LABEL: getl:
64; CHECK-BE:       # %bb.0: # %entry
65; CHECK-BE-NEXT:    andi. 3, 5, 1
66; CHECK-BE-NEXT:    sldi 3, 3, 3
67; CHECK-BE-NEXT:    lvsl 3, 0, 3
68; CHECK-BE-NEXT:    vperm 2, 2, 2, 3
69; CHECK-BE-NEXT:    mfvsrd 3, 34
70; CHECK-BE-NEXT:    blr
71;
72; CHECK-P7-LABEL: getl:
73; CHECK-P7:       # %bb.0: # %entry
74; CHECK-P7-NEXT:    addi 4, 1, -16
75; CHECK-P7-NEXT:    rlwinm 3, 5, 3, 28, 28
76; CHECK-P7-NEXT:    stxvd2x 34, 0, 4
77; CHECK-P7-NEXT:    ldx 3, 4, 3
78; CHECK-P7-NEXT:    blr
79entry:
80  %vecext = extractelement <2 x i64> %a, i32 %b
81  ret i64 %vecext
82}
83
84; Function Attrs: norecurse nounwind readnone
85define float @getf(<4 x float> %a, i32 zeroext %b) {
86; CHECK-LABEL: getf:
87; CHECK:       # %bb.0: # %entry
88; CHECK-NEXT:    xori 3, 5, 3
89; CHECK-NEXT:    sldi 3, 3, 2
90; CHECK-NEXT:    lvsl 3, 0, 3
91; CHECK-NEXT:    vperm 2, 2, 2, 3
92; CHECK-NEXT:    xscvspdpn 1, 34
93; CHECK-NEXT:    blr
94;
95; CHECK-BE-LABEL: getf:
96; CHECK-BE:       # %bb.0: # %entry
97; CHECK-BE-NEXT:    sldi 3, 5, 2
98; CHECK-BE-NEXT:    lvsl 3, 0, 3
99; CHECK-BE-NEXT:    vperm 2, 2, 2, 3
100; CHECK-BE-NEXT:    xscvspdpn 1, 34
101; CHECK-BE-NEXT:    blr
102;
103; CHECK-P7-LABEL: getf:
104; CHECK-P7:       # %bb.0: # %entry
105; CHECK-P7-NEXT:    addi 4, 1, -16
106; CHECK-P7-NEXT:    rlwinm 3, 5, 2, 28, 29
107; CHECK-P7-NEXT:    stxvw4x 34, 0, 4
108; CHECK-P7-NEXT:    lfsx 1, 4, 3
109; CHECK-P7-NEXT:    blr
110entry:
111  %vecext = extractelement <4 x float> %a, i32 %b
112  ret float %vecext
113}
114
115; Function Attrs: norecurse nounwind readnone
116define double @getd(<2 x double> %a, i32 zeroext %b) {
117; CHECK-LABEL: getd:
118; CHECK:       # %bb.0: # %entry
119; CHECK-NEXT:    li 3, 1
120; CHECK-NEXT:    andc 3, 3, 5
121; CHECK-NEXT:    sldi 3, 3, 3
122; CHECK-NEXT:    lvsl 3, 0, 3
123; CHECK-NEXT:    vperm 2, 2, 2, 3
124; CHECK-NEXT:    xxlor 1, 34, 34
125; CHECK-NEXT:    blr
126;
127; CHECK-BE-LABEL: getd:
128; CHECK-BE:       # %bb.0: # %entry
129; CHECK-BE-NEXT:    andi. 3, 5, 1
130; CHECK-BE-NEXT:    sldi 3, 3, 3
131; CHECK-BE-NEXT:    lvsl 3, 0, 3
132; CHECK-BE-NEXT:    vperm 2, 2, 2, 3
133; CHECK-BE-NEXT:    xxlor 1, 34, 34
134; CHECK-BE-NEXT:    blr
135;
136; CHECK-P7-LABEL: getd:
137; CHECK-P7:       # %bb.0: # %entry
138; CHECK-P7-NEXT:    andi. 3, 5, 1
139; CHECK-P7-NEXT:    sldi 3, 3, 3
140; CHECK-P7-NEXT:    lvsl 3, 0, 3
141; CHECK-P7-NEXT:    vperm 2, 2, 2, 3
142; CHECK-P7-NEXT:    xxlor 1, 34, 34
143; CHECK-P7-NEXT:    blr
144entry:
145  %vecext = extractelement <2 x double> %a, i32 %b
146  ret double %vecext
147}
148