xref: /llvm-project/llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll (revision 4981f8cb72ea7d04da601c868763b38bdc11e74e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
3; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
5; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
6; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
7; RUN: FileCheck %s --check-prefix=CHECK-LE-P9
8; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
9; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
10; RUN: FileCheck %s --check-prefix=CHECK-BE-P8
11; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
12; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
13; RUN: FileCheck %s --check-prefix=CHECK-BE-P9
14
15; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
16; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
17; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P8
18; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
19; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
20; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9
21; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
22; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
23; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P8
24; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
25; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
26; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P9
27
28define void @test_none_v8i16(ptr %a) {
29; CHECK-LE-P8-LABEL: test_none_v8i16:
30; CHECK-LE-P8:       # %bb.0: # %entry
31; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
32; CHECK-LE-P8-NEXT:    lfdx f1, 0, r3
33; CHECK-LE-P8-NEXT:    mtfprd f0, r4
34; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs0, vs1
35; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
36; CHECK-LE-P8-NEXT:    stfdx f0, 0, r3
37; CHECK-LE-P8-NEXT:    blr
38;
39; CHECK-LE-P9-LABEL: test_none_v8i16:
40; CHECK-LE-P9:       # %bb.0: # %entry
41; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
42; CHECK-LE-P9-NEXT:    lfd f1, 0(r3)
43; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs0, vs1
44; CHECK-LE-P9-NEXT:    xxswapd vs0, vs0
45; CHECK-LE-P9-NEXT:    stfd f0, 0(r3)
46; CHECK-LE-P9-NEXT:    blr
47;
48; CHECK-BE-P8-LABEL: test_none_v8i16:
49; CHECK-BE-P8:       # %bb.0: # %entry
50; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
51; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
52; CHECK-BE-P8-NEXT:    sldi r4, r4, 48
53; CHECK-BE-P8-NEXT:    mtfprd f0, r4
54; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs1, vs0
55; CHECK-BE-P8-NEXT:    stfdx f0, 0, r3
56; CHECK-BE-P8-NEXT:    blr
57;
58; CHECK-BE-P9-LABEL: test_none_v8i16:
59; CHECK-BE-P9:       # %bb.0: # %entry
60; CHECK-BE-P9-NEXT:    lxsihzx v2, 0, r3
61; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
62; CHECK-BE-P9-NEXT:    vsplth v2, v2, 3
63; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs0, v2
64; CHECK-BE-P9-NEXT:    stfd f0, 0(r3)
65; CHECK-BE-P9-NEXT:    blr
66;
67; CHECK-AIX-64-P8-LABEL: test_none_v8i16:
68; CHECK-AIX-64-P8:       # %bb.0: # %entry
69; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
70; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
71; CHECK-AIX-64-P8-NEXT:    sldi r4, r4, 48
72; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
73; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs1, vs0
74; CHECK-AIX-64-P8-NEXT:    stfdx f0, 0, r3
75; CHECK-AIX-64-P8-NEXT:    blr
76;
77; CHECK-AIX-64-P9-LABEL: test_none_v8i16:
78; CHECK-AIX-64-P9:       # %bb.0: # %entry
79; CHECK-AIX-64-P9-NEXT:    lxsihzx v2, 0, r3
80; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
81; CHECK-AIX-64-P9-NEXT:    vsplth v2, v2, 3
82; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs0, v2
83; CHECK-AIX-64-P9-NEXT:    stfd f0, 0(r3)
84; CHECK-AIX-64-P9-NEXT:    blr
85;
86; CHECK-AIX-32-P8-LABEL: test_none_v8i16:
87; CHECK-AIX-32-P8:       # %bb.0: # %entry
88; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
89; CHECK-AIX-32-P8-NEXT:    sth r4, -32(r1)
90; CHECK-AIX-32-P8-NEXT:    addi r4, r1, -32
91; CHECK-AIX-32-P8-NEXT:    lwz r3, 0(r3)
92; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r4
93; CHECK-AIX-32-P8-NEXT:    addi r4, r1, -16
94; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r4
95; CHECK-AIX-32-P8-NEXT:    stw r3, 0(r3)
96; CHECK-AIX-32-P8-NEXT:    lwz r3, -16(r1)
97; CHECK-AIX-32-P8-NEXT:    stw r3, 0(r3)
98; CHECK-AIX-32-P8-NEXT:    blr
99;
100; CHECK-AIX-32-P9-LABEL: test_none_v8i16:
101; CHECK-AIX-32-P9:       # %bb.0: # %entry
102; CHECK-AIX-32-P9-NEXT:    lhz r4, 0(r3)
103; CHECK-AIX-32-P9-NEXT:    sth r4, -32(r1)
104; CHECK-AIX-32-P9-NEXT:    lxv vs0, -32(r1)
105; CHECK-AIX-32-P9-NEXT:    lwz r3, 0(r3)
106; CHECK-AIX-32-P9-NEXT:    stw r3, 0(r3)
107; CHECK-AIX-32-P9-NEXT:    stxv vs0, -16(r1)
108; CHECK-AIX-32-P9-NEXT:    lwz r3, -16(r1)
109; CHECK-AIX-32-P9-NEXT:    stw r3, 0(r3)
110; CHECK-AIX-32-P9-NEXT:    blr
111entry:
112  %0 = load <2 x i8>, ptr undef, align 1
113  %tmp0_1 = bitcast <2 x i8> %0 to i16
114  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
115  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
116  %1 = load <2 x i32>, ptr %a
117  %tmp1_1 = shufflevector <2 x i32> %1, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
118  %2 = shufflevector <4 x i32> %tmp0_3, <4 x i32> %tmp1_1, <2 x i32> <i32 4, i32 0>
119  store <2 x i32> %2, ptr undef, align 4
120  ret void
121}
122
123define void @test_v8i16_none(ptr %a) {
124; CHECK-LE-P8-LABEL: test_v8i16_none:
125; CHECK-LE-P8:       # %bb.0: # %entry
126; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
127; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
128; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
129; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
130; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
131; CHECK-LE-P8-NEXT:    lhz r3, 0(r3)
132; CHECK-LE-P8-NEXT:    mtvsrd v4, r3
133; CHECK-LE-P8-NEXT:    xxswapd v3, vs0
134; CHECK-LE-P8-NEXT:    vperm v2, v2, v4, v3
135; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
136; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
137; CHECK-LE-P8-NEXT:    blr
138;
139; CHECK-LE-P9-LABEL: test_v8i16_none:
140; CHECK-LE-P9:       # %bb.0: # %entry
141; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
142; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
143; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
144; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI1_0@toc@l
145; CHECK-LE-P9-NEXT:    lxv vs2, 0(r3)
146; CHECK-LE-P9-NEXT:    xxperm vs0, vs1, vs2
147; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
148; CHECK-LE-P9-NEXT:    blr
149;
150; CHECK-BE-P8-LABEL: test_v8i16_none:
151; CHECK-BE-P8:       # %bb.0: # %entry
152; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
153; CHECK-BE-P8-NEXT:    lxvw4x v3, 0, r3
154; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
155; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
156; CHECK-BE-P8-NEXT:    mtvsrwz v2, r4
157; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
158; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
159; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r3
160; CHECK-BE-P8-NEXT:    blr
161;
162; CHECK-BE-P9-LABEL: test_v8i16_none:
163; CHECK-BE-P9:       # %bb.0: # %entry
164; CHECK-BE-P9-NEXT:    lxsihzx f0, 0, r3
165; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
166; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
167; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI1_0@toc@l
168; CHECK-BE-P9-NEXT:    lxv vs2, 0(r3)
169; CHECK-BE-P9-NEXT:    xxperm vs1, vs0, vs2
170; CHECK-BE-P9-NEXT:    stxv vs1, 0(r3)
171; CHECK-BE-P9-NEXT:    blr
172;
173; CHECK-AIX-64-P8-LABEL: test_v8i16_none:
174; CHECK-AIX-64-P8:       # %bb.0: # %entry
175; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
176; CHECK-AIX-64-P8-NEXT:    lxvw4x v3, 0, r3
177; CHECK-AIX-64-P8-NEXT:    ld r3, L..C0(r2) # %const.0
178; CHECK-AIX-64-P8-NEXT:    mtvsrwz v2, r4
179; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r3
180; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v3, v4
181; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
182; CHECK-AIX-64-P8-NEXT:    blr
183;
184; CHECK-AIX-64-P9-LABEL: test_v8i16_none:
185; CHECK-AIX-64-P9:       # %bb.0: # %entry
186; CHECK-AIX-64-P9-NEXT:    lxsihzx f0, 0, r3
187; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r3)
188; CHECK-AIX-64-P9-NEXT:    ld r3, L..C0(r2) # %const.0
189; CHECK-AIX-64-P9-NEXT:    lxv vs2, 0(r3)
190; CHECK-AIX-64-P9-NEXT:    xxperm vs1, vs0, vs2
191; CHECK-AIX-64-P9-NEXT:    stxv vs1, 0(r3)
192; CHECK-AIX-64-P9-NEXT:    blr
193;
194; CHECK-AIX-32-P8-LABEL: test_v8i16_none:
195; CHECK-AIX-32-P8:       # %bb.0: # %entry
196; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
197; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
198; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C0(r2) # %const.0
199; CHECK-AIX-32-P8-NEXT:    mtvsrwz v2, r4
200; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
201; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
202; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
203; CHECK-AIX-32-P8-NEXT:    blr
204;
205; CHECK-AIX-32-P9-LABEL: test_v8i16_none:
206; CHECK-AIX-32-P9:       # %bb.0: # %entry
207; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
208; CHECK-AIX-32-P9-NEXT:    lxv vs1, 0(r3)
209; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C0(r2) # %const.0
210; CHECK-AIX-32-P9-NEXT:    lxv vs2, 0(r3)
211; CHECK-AIX-32-P9-NEXT:    xxperm vs1, vs0, vs2
212; CHECK-AIX-32-P9-NEXT:    stxv vs1, 0(r3)
213; CHECK-AIX-32-P9-NEXT:    blr
214entry:
215  %0 = load <2 x i8>, ptr undef, align 1
216  %tmp0_1 = bitcast <2 x i8> %0 to i16
217  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
218  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
219  %1 = load <4 x i32>, ptr %a, align 1
220  %2 = shufflevector <4 x i32> %tmp0_3, <4 x i32> %1, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
221  store <4 x i32> %2, ptr undef, align 4
222  ret void
223}
224
225define void @test_none_v4i32(<2 x i32> %vec, ptr %ptr1) {
226; CHECK-LE-P8-LABEL: test_none_v4i32:
227; CHECK-LE-P8:       # %bb.0: # %entry
228; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
229; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
230; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI2_0@toc@l
231; CHECK-LE-P8-NEXT:    lxvd2x vs1, 0, r3
232; CHECK-LE-P8-NEXT:    mffprwz r3, f0
233; CHECK-LE-P8-NEXT:    mtvsrwz v4, r3
234; CHECK-LE-P8-NEXT:    xxswapd v3, vs1
235; CHECK-LE-P8-NEXT:    vperm v2, v4, v2, v3
236; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
237; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r5
238; CHECK-LE-P8-NEXT:    blr
239;
240; CHECK-LE-P9-LABEL: test_none_v4i32:
241; CHECK-LE-P9:       # %bb.0: # %entry
242; CHECK-LE-P9-NEXT:    li r3, 0
243; CHECK-LE-P9-NEXT:    vextuwrx r3, r3, v2
244; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
245; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
246; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI2_0@toc@l
247; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
248; CHECK-LE-P9-NEXT:    xxperm v2, vs0, vs1
249; CHECK-LE-P9-NEXT:    stxv v2, 0(r5)
250; CHECK-LE-P9-NEXT:    blr
251;
252; CHECK-BE-P8-LABEL: test_none_v4i32:
253; CHECK-BE-P8:       # %bb.0: # %entry
254; CHECK-BE-P8-NEXT:    xxsldwi vs0, v2, v2, 3
255; CHECK-BE-P8-NEXT:    mffprwz r3, f0
256; CHECK-BE-P8-NEXT:    mtvsrwz v3, r3
257; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
258; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI2_0@toc@l
259; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
260; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
261; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r5
262; CHECK-BE-P8-NEXT:    blr
263;
264; CHECK-BE-P9-LABEL: test_none_v4i32:
265; CHECK-BE-P9:       # %bb.0: # %entry
266; CHECK-BE-P9-NEXT:    li r3, 0
267; CHECK-BE-P9-NEXT:    vextuwlx r3, r3, v2
268; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
269; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
270; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI2_0@toc@l
271; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
272; CHECK-BE-P9-NEXT:    xxperm vs0, v2, vs1
273; CHECK-BE-P9-NEXT:    stxv vs0, 0(r5)
274; CHECK-BE-P9-NEXT:    blr
275;
276; CHECK-AIX-64-P8-LABEL: test_none_v4i32:
277; CHECK-AIX-64-P8:       # %bb.0: # %entry
278; CHECK-AIX-64-P8-NEXT:    xxsldwi vs0, v2, v2, 3
279; CHECK-AIX-64-P8-NEXT:    mffprwz r4, f0
280; CHECK-AIX-64-P8-NEXT:    mtvsrwz v3, r4
281; CHECK-AIX-64-P8-NEXT:    ld r4, L..C1(r2) # %const.0
282; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r4
283; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v3, v4
284; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
285; CHECK-AIX-64-P8-NEXT:    blr
286;
287; CHECK-AIX-64-P9-LABEL: test_none_v4i32:
288; CHECK-AIX-64-P9:       # %bb.0: # %entry
289; CHECK-AIX-64-P9-NEXT:    li r4, 0
290; CHECK-AIX-64-P9-NEXT:    vextuwlx r4, r4, v2
291; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r4
292; CHECK-AIX-64-P9-NEXT:    ld r4, L..C1(r2) # %const.0
293; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r4)
294; CHECK-AIX-64-P9-NEXT:    xxperm vs0, v2, vs1
295; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
296; CHECK-AIX-64-P9-NEXT:    blr
297;
298; CHECK-AIX-32-P8-LABEL: test_none_v4i32:
299; CHECK-AIX-32-P8:       # %bb.0: # %entry
300; CHECK-AIX-32-P8-NEXT:    addi r4, r1, -16
301; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r4
302; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r4
303; CHECK-AIX-32-P8-NEXT:    lwz r4, L..C1(r2) # %const.0
304; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r4
305; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
306; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
307; CHECK-AIX-32-P8-NEXT:    blr
308;
309; CHECK-AIX-32-P9-LABEL: test_none_v4i32:
310; CHECK-AIX-32-P9:       # %bb.0: # %entry
311; CHECK-AIX-32-P9-NEXT:    addi r4, r1, -16
312; CHECK-AIX-32-P9-NEXT:    stxv v2, -16(r1)
313; CHECK-AIX-32-P9-NEXT:    lfiwzx f0, 0, r4
314; CHECK-AIX-32-P9-NEXT:    lwz r4, L..C1(r2) # %const.0
315; CHECK-AIX-32-P9-NEXT:    lxv vs1, 0(r4)
316; CHECK-AIX-32-P9-NEXT:    xxperm vs0, v2, vs1
317; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
318; CHECK-AIX-32-P9-NEXT:    blr
319entry:
320  %0 = extractelement <2 x i32> %vec, i64 0
321  %1 = bitcast i32 %0 to <2 x i16>
322  %2 = shufflevector <2 x i16> %1, <2 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
323  %3 = shufflevector <2 x i32> %vec, <2 x i32> %vec, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
324  %4 = bitcast <4 x i32> %3 to <8 x i16>
325  %5 = shufflevector <8 x i16> %4, <8 x i16> %2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
326  store <8 x i16> %5, ptr %ptr1, align 16
327  ret void
328}
329
330define void @test_v4i32_none(<2 x i32> %vec, ptr %ptr1) {
331; CHECK-LE-P8-LABEL: test_v4i32_none:
332; CHECK-LE-P8:       # %bb.0: # %entry
333; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
334; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
335; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI3_0@toc@l
336; CHECK-LE-P8-NEXT:    lxvd2x vs1, 0, r3
337; CHECK-LE-P8-NEXT:    mffprwz r3, f0
338; CHECK-LE-P8-NEXT:    mtvsrwz v4, r3
339; CHECK-LE-P8-NEXT:    xxswapd v3, vs1
340; CHECK-LE-P8-NEXT:    vperm v2, v2, v4, v3
341; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
342; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r5
343; CHECK-LE-P8-NEXT:    blr
344;
345; CHECK-LE-P9-LABEL: test_v4i32_none:
346; CHECK-LE-P9:       # %bb.0: # %entry
347; CHECK-LE-P9-NEXT:    li r3, 0
348; CHECK-LE-P9-NEXT:    vextuwrx r3, r3, v2
349; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
350; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
351; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI3_0@toc@l
352; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
353; CHECK-LE-P9-NEXT:    xxperm vs0, v2, vs1
354; CHECK-LE-P9-NEXT:    stxv vs0, 0(r5)
355; CHECK-LE-P9-NEXT:    blr
356;
357; CHECK-BE-P8-LABEL: test_v4i32_none:
358; CHECK-BE-P8:       # %bb.0: # %entry
359; CHECK-BE-P8-NEXT:    xxsldwi vs0, v2, v2, 3
360; CHECK-BE-P8-NEXT:    mffprwz r3, f0
361; CHECK-BE-P8-NEXT:    mtvsrwz v3, r3
362; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
363; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI3_0@toc@l
364; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
365; CHECK-BE-P8-NEXT:    vperm v2, v3, v2, v4
366; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r5
367; CHECK-BE-P8-NEXT:    blr
368;
369; CHECK-BE-P9-LABEL: test_v4i32_none:
370; CHECK-BE-P9:       # %bb.0: # %entry
371; CHECK-BE-P9-NEXT:    li r3, 0
372; CHECK-BE-P9-NEXT:    vextuwlx r3, r3, v2
373; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
374; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
375; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI3_0@toc@l
376; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
377; CHECK-BE-P9-NEXT:    xxperm v2, vs0, vs1
378; CHECK-BE-P9-NEXT:    stxv v2, 0(r5)
379; CHECK-BE-P9-NEXT:    blr
380;
381; CHECK-AIX-64-P8-LABEL: test_v4i32_none:
382; CHECK-AIX-64-P8:       # %bb.0: # %entry
383; CHECK-AIX-64-P8-NEXT:    xxsldwi vs0, v2, v2, 3
384; CHECK-AIX-64-P8-NEXT:    mffprwz r4, f0
385; CHECK-AIX-64-P8-NEXT:    mtvsrwz v3, r4
386; CHECK-AIX-64-P8-NEXT:    ld r4, L..C2(r2) # %const.0
387; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r4
388; CHECK-AIX-64-P8-NEXT:    vperm v2, v3, v2, v4
389; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
390; CHECK-AIX-64-P8-NEXT:    blr
391;
392; CHECK-AIX-64-P9-LABEL: test_v4i32_none:
393; CHECK-AIX-64-P9:       # %bb.0: # %entry
394; CHECK-AIX-64-P9-NEXT:    li r4, 0
395; CHECK-AIX-64-P9-NEXT:    vextuwlx r4, r4, v2
396; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r4
397; CHECK-AIX-64-P9-NEXT:    ld r4, L..C2(r2) # %const.0
398; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r4)
399; CHECK-AIX-64-P9-NEXT:    xxperm v2, vs0, vs1
400; CHECK-AIX-64-P9-NEXT:    stxv v2, 0(r3)
401; CHECK-AIX-64-P9-NEXT:    blr
402;
403; CHECK-AIX-32-P8-LABEL: test_v4i32_none:
404; CHECK-AIX-32-P8:       # %bb.0: # %entry
405; CHECK-AIX-32-P8-NEXT:    addi r4, r1, -16
406; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r4
407; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r4
408; CHECK-AIX-32-P8-NEXT:    lwz r4, L..C2(r2) # %const.0
409; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r4
410; CHECK-AIX-32-P8-NEXT:    vperm v2, v3, v2, v4
411; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
412; CHECK-AIX-32-P8-NEXT:    blr
413;
414; CHECK-AIX-32-P9-LABEL: test_v4i32_none:
415; CHECK-AIX-32-P9:       # %bb.0: # %entry
416; CHECK-AIX-32-P9-NEXT:    addi r4, r1, -16
417; CHECK-AIX-32-P9-NEXT:    stxv v2, -16(r1)
418; CHECK-AIX-32-P9-NEXT:    lfiwzx f0, 0, r4
419; CHECK-AIX-32-P9-NEXT:    lwz r4, L..C2(r2) # %const.0
420; CHECK-AIX-32-P9-NEXT:    lxv vs1, 0(r4)
421; CHECK-AIX-32-P9-NEXT:    xxperm v2, vs0, vs1
422; CHECK-AIX-32-P9-NEXT:    stxv v2, 0(r3)
423; CHECK-AIX-32-P9-NEXT:    blr
424entry:
425  %0 = extractelement <2 x i32> %vec, i64 0
426  %1 = bitcast i32 %0 to <2 x i16>
427  %2 = shufflevector <2 x i16> %1, <2 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
428  %3 = shufflevector <2 x i32> %vec, <2 x i32> %vec, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
429  %4 = bitcast <4 x i32> %3 to <8 x i16>
430  %5 = shufflevector <8 x i16> %2, <8 x i16> %4, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13>
431  store <8 x i16> %5, ptr %ptr1, align 16
432  ret void
433}
434
435define void @test_none_v2i64(ptr %ptr, i32 %v1, <2 x i32> %vec) local_unnamed_addr #0 {
436; CHECK-LE-P8-LABEL: test_none_v2i64:
437; CHECK-LE-P8:       # %bb.0: # %entry
438; CHECK-LE-P8-NEXT:    addis r5, r2, .LCPI4_0@toc@ha
439; CHECK-LE-P8-NEXT:    mtvsrwz v4, r4
440; CHECK-LE-P8-NEXT:    addis r4, r2, .LCPI4_1@toc@ha
441; CHECK-LE-P8-NEXT:    addi r5, r5, .LCPI4_0@toc@l
442; CHECK-LE-P8-NEXT:    addi r4, r4, .LCPI4_1@toc@l
443; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r5
444; CHECK-LE-P8-NEXT:    xxswapd v3, vs0
445; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
446; CHECK-LE-P8-NEXT:    vperm v2, v2, v4, v3
447; CHECK-LE-P8-NEXT:    lxsdx v4, 0, r3
448; CHECK-LE-P8-NEXT:    xxswapd v3, vs0
449; CHECK-LE-P8-NEXT:    vperm v2, v4, v2, v3
450; CHECK-LE-P8-NEXT:    xxswapd vs0, v2
451; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
452;
453; CHECK-LE-P9-LABEL: test_none_v2i64:
454; CHECK-LE-P9:       # %bb.0: # %entry
455; CHECK-LE-P9-NEXT:    lfd f0, 0(r3)
456; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
457; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
458; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI4_0@toc@l
459; CHECK-LE-P9-NEXT:    xxinsertw v2, vs1, 12
460; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
461; CHECK-LE-P9-NEXT:    xxperm v2, vs0, vs1
462; CHECK-LE-P9-NEXT:    stxv v2, 0(r3)
463;
464; CHECK-BE-P8-LABEL: test_none_v2i64:
465; CHECK-BE-P8:       # %bb.0: # %entry
466; CHECK-BE-P8-NEXT:    addis r5, r2, .LCPI4_0@toc@ha
467; CHECK-BE-P8-NEXT:    mtvsrwz v4, r4
468; CHECK-BE-P8-NEXT:    addi r5, r5, .LCPI4_0@toc@l
469; CHECK-BE-P8-NEXT:    lxvw4x v3, 0, r5
470; CHECK-BE-P8-NEXT:    vperm v2, v4, v2, v3
471; CHECK-BE-P8-NEXT:    lxsdx v3, 0, r3
472; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI4_1@toc@ha
473; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI4_1@toc@l
474; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
475; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
476; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r3
477;
478; CHECK-BE-P9-LABEL: test_none_v2i64:
479; CHECK-BE-P9:       # %bb.0: # %entry
480; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
481; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
482; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
483; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI4_0@toc@l
484; CHECK-BE-P9-NEXT:    xxinsertw v2, vs1, 0
485; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
486; CHECK-BE-P9-NEXT:    xxperm vs0, v2, vs1
487; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
488;
489; CHECK-AIX-64-P8-LABEL: test_none_v2i64:
490; CHECK-AIX-64-P8:       # %bb.0: # %entry
491; CHECK-AIX-64-P8-NEXT:    ld r5, L..C3(r2) # %const.0
492; CHECK-AIX-64-P8-NEXT:    mtvsrwz v4, r4
493; CHECK-AIX-64-P8-NEXT:    lxvw4x v3, 0, r5
494; CHECK-AIX-64-P8-NEXT:    vperm v2, v4, v2, v3
495; CHECK-AIX-64-P8-NEXT:    lxsdx v3, 0, r3
496; CHECK-AIX-64-P8-NEXT:    ld r3, L..C4(r2) # %const.1
497; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r3
498; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v3, v4
499; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
500;
501; CHECK-AIX-64-P9-LABEL: test_none_v2i64:
502; CHECK-AIX-64-P9:       # %bb.0: # %entry
503; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
504; CHECK-AIX-64-P9-NEXT:    ld r3, L..C3(r2) # %const.0
505; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
506; CHECK-AIX-64-P9-NEXT:    xxinsertw v2, vs1, 0
507; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r3)
508; CHECK-AIX-64-P9-NEXT:    xxperm vs0, v2, vs1
509; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
510;
511; CHECK-AIX-32-P8-LABEL: test_none_v2i64:
512; CHECK-AIX-32-P8:       # %bb.0: # %entry
513; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r3
514; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C3(r2) # %const.0
515; CHECK-AIX-32-P8-NEXT:    stw r4, -16(r1)
516; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
517; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
518; CHECK-AIX-32-P8-NEXT:    lxvw4x v5, 0, r3
519; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C4(r2) # %const.1
520; CHECK-AIX-32-P8-NEXT:    vperm v2, v5, v2, v4
521; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
522; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
523; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
524;
525; CHECK-AIX-32-P9-LABEL: test_none_v2i64:
526; CHECK-AIX-32-P9:       # %bb.0: # %entry
527; CHECK-AIX-32-P9-NEXT:    lfiwzx f0, 0, r3
528; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C3(r2) # %const.0
529; CHECK-AIX-32-P9-NEXT:    mtfprwz f1, r4
530; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs1, 0
531; CHECK-AIX-32-P9-NEXT:    lxv vs1, 0(r3)
532; CHECK-AIX-32-P9-NEXT:    xxperm vs0, v2, vs1
533; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
534entry:
535  %0 = load <2 x i32>, ptr %ptr, align 4
536  %tmp = insertelement <2 x i32> %vec, i32 %v1, i32 0
537  %1 = shufflevector <2 x i32> %0, <2 x i32> %tmp, <4 x i32> <i32 3, i32 2, i32 2, i32 0>
538  store <4 x i32> %1, ptr undef, align 4
539  unreachable
540}
541
542define void @test_v2i64_none() {
543; CHECK-LE-P8-LABEL: test_v2i64_none:
544; CHECK-LE-P8:       # %bb.0: # %entry
545; CHECK-LE-P8-NEXT:    lfdx f0, 0, r3
546; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs0, vs0
547; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
548; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
549; CHECK-LE-P8-NEXT:    blr
550;
551; CHECK-LE-P9-LABEL: test_v2i64_none:
552; CHECK-LE-P9:       # %bb.0: # %entry
553; CHECK-LE-P9-NEXT:    lfd f0, 0(r3)
554; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs0, vs0
555; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
556; CHECK-LE-P9-NEXT:    blr
557;
558; CHECK-BE-P8-LABEL: test_v2i64_none:
559; CHECK-BE-P8:       # %bb.0: # %entry
560; CHECK-BE-P8-NEXT:    lfdx f0, 0, r3
561; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs0, vs0
562; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
563; CHECK-BE-P8-NEXT:    blr
564;
565; CHECK-BE-P9-LABEL: test_v2i64_none:
566; CHECK-BE-P9:       # %bb.0: # %entry
567; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
568; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs0, vs0
569; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
570; CHECK-BE-P9-NEXT:    blr
571;
572; CHECK-AIX-64-P8-LABEL: test_v2i64_none:
573; CHECK-AIX-64-P8:       # %bb.0: # %entry
574; CHECK-AIX-64-P8-NEXT:    lfdx f0, 0, r3
575; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs0, vs0
576; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
577; CHECK-AIX-64-P8-NEXT:    blr
578;
579; CHECK-AIX-64-P9-LABEL: test_v2i64_none:
580; CHECK-AIX-64-P9:       # %bb.0: # %entry
581; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
582; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs0, vs0
583; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
584; CHECK-AIX-64-P9-NEXT:    blr
585;
586; CHECK-AIX-32-P8-LABEL: test_v2i64_none:
587; CHECK-AIX-32-P8:       # %bb.0: # %entry
588; CHECK-AIX-32-P8-NEXT:    lfiwzx f0, 0, r3
589; CHECK-AIX-32-P8-NEXT:    xxspltw vs0, vs0, 1
590; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r3
591; CHECK-AIX-32-P8-NEXT:    blr
592;
593; CHECK-AIX-32-P9-LABEL: test_v2i64_none:
594; CHECK-AIX-32-P9:       # %bb.0: # %entry
595; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, 0, r3
596; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
597; CHECK-AIX-32-P9-NEXT:    blr
598entry:
599  %0 = load <2 x i32>, ptr undef, align 4
600  %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
601  store <4 x i32> %1, ptr undef, align 4
602  ret void
603}
604
605define void @test_v8i16_v8i16(ptr %a) {
606; CHECK-LE-P8-LABEL: test_v8i16_v8i16:
607; CHECK-LE-P8:       # %bb.0: # %entry
608; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
609; CHECK-LE-P8-NEXT:    lhz r3, 0(r3)
610; CHECK-LE-P8-NEXT:    mtfprd f0, r4
611; CHECK-LE-P8-NEXT:    mtfprd f1, r3
612; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs1, vs0
613; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
614; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
615; CHECK-LE-P8-NEXT:    blr
616;
617; CHECK-LE-P9-LABEL: test_v8i16_v8i16:
618; CHECK-LE-P9:       # %bb.0: # %entry
619; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
620; CHECK-LE-P9-NEXT:    lxsihzx f1, 0, r3
621; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs1, vs0
622; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
623; CHECK-LE-P9-NEXT:    blr
624;
625; CHECK-BE-P8-LABEL: test_v8i16_v8i16:
626; CHECK-BE-P8:       # %bb.0: # %entry
627; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
628; CHECK-BE-P8-NEXT:    lhz r3, 0(r3)
629; CHECK-BE-P8-NEXT:    mtfprwz f0, r4
630; CHECK-BE-P8-NEXT:    mtfprwz f1, r3
631; CHECK-BE-P8-NEXT:    xxmrglw vs0, vs0, vs1
632; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
633; CHECK-BE-P8-NEXT:    blr
634;
635; CHECK-BE-P9-LABEL: test_v8i16_v8i16:
636; CHECK-BE-P9:       # %bb.0: # %entry
637; CHECK-BE-P9-NEXT:    lxsihzx f0, 0, r3
638; CHECK-BE-P9-NEXT:    lxsihzx f1, 0, r3
639; CHECK-BE-P9-NEXT:    xxmrglw vs0, vs0, vs1
640; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
641; CHECK-BE-P9-NEXT:    blr
642;
643; CHECK-AIX-64-P8-LABEL: test_v8i16_v8i16:
644; CHECK-AIX-64-P8:       # %bb.0: # %entry
645; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
646; CHECK-AIX-64-P8-NEXT:    lhz r3, 0(r3)
647; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r4
648; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r3
649; CHECK-AIX-64-P8-NEXT:    xxmrglw vs0, vs0, vs1
650; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
651; CHECK-AIX-64-P8-NEXT:    blr
652;
653; CHECK-AIX-64-P9-LABEL: test_v8i16_v8i16:
654; CHECK-AIX-64-P9:       # %bb.0: # %entry
655; CHECK-AIX-64-P9-NEXT:    lxsihzx f0, 0, r3
656; CHECK-AIX-64-P9-NEXT:    lxsihzx f1, 0, r3
657; CHECK-AIX-64-P9-NEXT:    xxmrglw vs0, vs0, vs1
658; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
659; CHECK-AIX-64-P9-NEXT:    blr
660;
661; CHECK-AIX-32-P8-LABEL: test_v8i16_v8i16:
662; CHECK-AIX-32-P8:       # %bb.0: # %entry
663; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
664; CHECK-AIX-32-P8-NEXT:    lhz r3, 0(r3)
665; CHECK-AIX-32-P8-NEXT:    mtfprwz f0, r4
666; CHECK-AIX-32-P8-NEXT:    mtfprwz f1, r3
667; CHECK-AIX-32-P8-NEXT:    xxmrglw vs0, vs0, vs1
668; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r3
669; CHECK-AIX-32-P8-NEXT:    blr
670;
671; CHECK-AIX-32-P9-LABEL: test_v8i16_v8i16:
672; CHECK-AIX-32-P9:       # %bb.0: # %entry
673; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
674; CHECK-AIX-32-P9-NEXT:    lxsihzx f1, 0, r3
675; CHECK-AIX-32-P9-NEXT:    xxmrglw vs0, vs0, vs1
676; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
677; CHECK-AIX-32-P9-NEXT:    blr
678entry:
679  %0 = load <2 x i8>, ptr undef, align 1
680  %tmp0_1 = bitcast <2 x i8> %0 to i16
681  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
682  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
683  %1 = load <2 x i8>, ptr %a, align 1
684  %tmp1_1 = bitcast <2 x i8> %1 to i16
685  %tmp1_2 = insertelement <8 x i16> undef, i16 %tmp1_1, i32 0
686  %tmp1_3 = bitcast <8 x i16> %tmp1_2 to <4 x i32>
687  %2 = shufflevector <4 x i32> %tmp0_3, <4 x i32> %tmp1_3, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
688  store <4 x i32> %2, ptr undef, align 4
689  ret void
690}
691
692define void @test_v8i16_v4i32(ptr %a) {
693; CHECK-LE-P8-LABEL: test_v8i16_v4i32:
694; CHECK-LE-P8:       # %bb.0: # %entry
695; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
696; CHECK-LE-P8-NEXT:    lfiwzx f1, 0, r3
697; CHECK-LE-P8-NEXT:    mtfprd f0, r4
698; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs1, vs0
699; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
700; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
701; CHECK-LE-P8-NEXT:    blr
702;
703; CHECK-LE-P9-LABEL: test_v8i16_v4i32:
704; CHECK-LE-P9:       # %bb.0: # %entry
705; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
706; CHECK-LE-P9-NEXT:    lfiwzx f1, 0, r3
707; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs1, vs0
708; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
709; CHECK-LE-P9-NEXT:    blr
710;
711; CHECK-BE-P8-LABEL: test_v8i16_v4i32:
712; CHECK-BE-P8:       # %bb.0: # %entry
713; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
714; CHECK-BE-P8-NEXT:    lxsiwzx v3, 0, r3
715; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
716; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI7_0@toc@l
717; CHECK-BE-P8-NEXT:    mtvsrwz v2, r4
718; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
719; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
720; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r3
721; CHECK-BE-P8-NEXT:    blr
722;
723; CHECK-BE-P9-LABEL: test_v8i16_v4i32:
724; CHECK-BE-P9:       # %bb.0: # %entry
725; CHECK-BE-P9-NEXT:    lxsihzx f0, 0, r3
726; CHECK-BE-P9-NEXT:    lfiwzx f1, 0, r3
727; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
728; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI7_0@toc@l
729; CHECK-BE-P9-NEXT:    lxv vs2, 0(r3)
730; CHECK-BE-P9-NEXT:    xxperm vs1, vs0, vs2
731; CHECK-BE-P9-NEXT:    stxv vs1, 0(r3)
732; CHECK-BE-P9-NEXT:    blr
733;
734; CHECK-AIX-64-P8-LABEL: test_v8i16_v4i32:
735; CHECK-AIX-64-P8:       # %bb.0: # %entry
736; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
737; CHECK-AIX-64-P8-NEXT:    lxsiwzx v3, 0, r3
738; CHECK-AIX-64-P8-NEXT:    ld r3, L..C5(r2) # %const.0
739; CHECK-AIX-64-P8-NEXT:    mtvsrwz v2, r4
740; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r3
741; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v3, v4
742; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
743; CHECK-AIX-64-P8-NEXT:    blr
744;
745; CHECK-AIX-64-P9-LABEL: test_v8i16_v4i32:
746; CHECK-AIX-64-P9:       # %bb.0: # %entry
747; CHECK-AIX-64-P9-NEXT:    lxsihzx f0, 0, r3
748; CHECK-AIX-64-P9-NEXT:    lfiwzx f1, 0, r3
749; CHECK-AIX-64-P9-NEXT:    ld r3, L..C4(r2) # %const.0
750; CHECK-AIX-64-P9-NEXT:    lxv vs2, 0(r3)
751; CHECK-AIX-64-P9-NEXT:    xxperm vs1, vs0, vs2
752; CHECK-AIX-64-P9-NEXT:    stxv vs1, 0(r3)
753; CHECK-AIX-64-P9-NEXT:    blr
754;
755; CHECK-AIX-32-P8-LABEL: test_v8i16_v4i32:
756; CHECK-AIX-32-P8:       # %bb.0: # %entry
757; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
758; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r3
759; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C5(r2) # %const.0
760; CHECK-AIX-32-P8-NEXT:    mtvsrwz v2, r4
761; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
762; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
763; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
764; CHECK-AIX-32-P8-NEXT:    blr
765;
766; CHECK-AIX-32-P9-LABEL: test_v8i16_v4i32:
767; CHECK-AIX-32-P9:       # %bb.0: # %entry
768; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
769; CHECK-AIX-32-P9-NEXT:    lfiwzx f1, 0, r3
770; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C4(r2) # %const.0
771; CHECK-AIX-32-P9-NEXT:    lxv vs2, 0(r3)
772; CHECK-AIX-32-P9-NEXT:    xxperm vs1, vs0, vs2
773; CHECK-AIX-32-P9-NEXT:    stxv vs1, 0(r3)
774; CHECK-AIX-32-P9-NEXT:    blr
775entry:
776  %0 = load <2 x i8>, ptr undef, align 1
777  %tmp0_1 = bitcast <2 x i8> %0 to i16
778  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
779  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
780  %1 = load <2 x i16>, ptr %a, align 4
781  %tmp1_1 = bitcast <2 x i16> %1 to i32
782  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
783  %2 = shufflevector <4 x i32> %tmp0_3, <4 x i32> %tmp1_2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
784  store <4 x i32> %2, ptr undef, align 4
785  ret void
786}
787
788define void @test_v8i16_v2i64(ptr %a) {
789; CHECK-LE-P8-LABEL: test_v8i16_v2i64:
790; CHECK-LE-P8:       # %bb.0: # %entry
791; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
792; CHECK-LE-P8-NEXT:    lfdx f1, 0, r3
793; CHECK-LE-P8-NEXT:    mtfprd f0, r4
794; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs1, vs0
795; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
796; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
797; CHECK-LE-P8-NEXT:    blr
798;
799; CHECK-LE-P9-LABEL: test_v8i16_v2i64:
800; CHECK-LE-P9:       # %bb.0: # %entry
801; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
802; CHECK-LE-P9-NEXT:    lfd f1, 0(r3)
803; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs1, vs0
804; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
805; CHECK-LE-P9-NEXT:    blr
806;
807; CHECK-BE-P8-LABEL: test_v8i16_v2i64:
808; CHECK-BE-P8:       # %bb.0: # %entry
809; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
810; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
811; CHECK-BE-P8-NEXT:    sldi r4, r4, 48
812; CHECK-BE-P8-NEXT:    mtfprd f0, r4
813; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs0, vs1
814; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
815; CHECK-BE-P8-NEXT:    blr
816;
817; CHECK-BE-P9-LABEL: test_v8i16_v2i64:
818; CHECK-BE-P9:       # %bb.0: # %entry
819; CHECK-BE-P9-NEXT:    lxsihzx v2, 0, r3
820; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
821; CHECK-BE-P9-NEXT:    vsplth v2, v2, 3
822; CHECK-BE-P9-NEXT:    xxmrghw vs0, v2, vs0
823; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
824; CHECK-BE-P9-NEXT:    blr
825;
826; CHECK-AIX-64-P8-LABEL: test_v8i16_v2i64:
827; CHECK-AIX-64-P8:       # %bb.0: # %entry
828; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
829; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
830; CHECK-AIX-64-P8-NEXT:    sldi r4, r4, 48
831; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
832; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs0, vs1
833; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
834; CHECK-AIX-64-P8-NEXT:    blr
835;
836; CHECK-AIX-64-P9-LABEL: test_v8i16_v2i64:
837; CHECK-AIX-64-P9:       # %bb.0: # %entry
838; CHECK-AIX-64-P9-NEXT:    lxsihzx v2, 0, r3
839; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
840; CHECK-AIX-64-P9-NEXT:    vsplth v2, v2, 3
841; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, v2, vs0
842; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
843; CHECK-AIX-64-P9-NEXT:    blr
844;
845; CHECK-AIX-32-P8-LABEL: test_v8i16_v2i64:
846; CHECK-AIX-32-P8:       # %bb.0: # %entry
847; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
848; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r3
849; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C6(r2) # %const.0
850; CHECK-AIX-32-P8-NEXT:    mtvsrwz v2, r4
851; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
852; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
853; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
854; CHECK-AIX-32-P8-NEXT:    blr
855;
856; CHECK-AIX-32-P9-LABEL: test_v8i16_v2i64:
857; CHECK-AIX-32-P9:       # %bb.0: # %entry
858; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
859; CHECK-AIX-32-P9-NEXT:    lfiwzx f1, 0, r3
860; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C5(r2) # %const.0
861; CHECK-AIX-32-P9-NEXT:    lxv vs2, 0(r3)
862; CHECK-AIX-32-P9-NEXT:    xxperm vs1, vs0, vs2
863; CHECK-AIX-32-P9-NEXT:    stxv vs1, 0(r3)
864; CHECK-AIX-32-P9-NEXT:    blr
865entry:
866  %0 = load <2 x i8>, ptr undef, align 1
867  %tmp0_1 = bitcast <2 x i8> %0 to i16
868  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
869  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
870  %1 = load <2 x i16>, ptr %a, align 8
871  %tmp1_1 = bitcast <2 x i16> %1 to i32
872  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
873  %2 = shufflevector <4 x i32> %tmp0_3, <4 x i32> %tmp1_2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
874  store <4 x i32> %2, ptr undef, align 4
875  ret void
876}
877
878define <16 x i8> @test_v4i32_v4i32(ptr %a, ptr %b) {
879; CHECK-LE-P8-LABEL: test_v4i32_v4i32:
880; CHECK-LE-P8:       # %bb.0: # %entry
881; CHECK-LE-P8-NEXT:    addis r5, r2, .LCPI9_0@toc@ha
882; CHECK-LE-P8-NEXT:    lxsiwzx v3, 0, r3
883; CHECK-LE-P8-NEXT:    lxsiwzx v4, 0, r4
884; CHECK-LE-P8-NEXT:    addi r5, r5, .LCPI9_0@toc@l
885; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r5
886; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
887; CHECK-LE-P8-NEXT:    vperm v2, v4, v3, v2
888; CHECK-LE-P8-NEXT:    blr
889;
890; CHECK-LE-P9-LABEL: test_v4i32_v4i32:
891; CHECK-LE-P9:       # %bb.0: # %entry
892; CHECK-LE-P9-NEXT:    lxsiwzx v2, 0, r3
893; CHECK-LE-P9-NEXT:    addis r3, r2, .LCPI9_0@toc@ha
894; CHECK-LE-P9-NEXT:    lfiwzx f0, 0, r4
895; CHECK-LE-P9-NEXT:    addi r3, r3, .LCPI9_0@toc@l
896; CHECK-LE-P9-NEXT:    lxv vs1, 0(r3)
897; CHECK-LE-P9-NEXT:    xxperm v2, vs0, vs1
898; CHECK-LE-P9-NEXT:    blr
899;
900; CHECK-BE-P8-LABEL: test_v4i32_v4i32:
901; CHECK-BE-P8:       # %bb.0: # %entry
902; CHECK-BE-P8-NEXT:    lxsiwzx v2, 0, r3
903; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI9_0@toc@ha
904; CHECK-BE-P8-NEXT:    lxsiwzx v3, 0, r4
905; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI9_0@toc@l
906; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
907; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
908; CHECK-BE-P8-NEXT:    blr
909;
910; CHECK-BE-P9-LABEL: test_v4i32_v4i32:
911; CHECK-BE-P9:       # %bb.0: # %entry
912; CHECK-BE-P9-NEXT:    lfiwzx f0, 0, r3
913; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI9_0@toc@ha
914; CHECK-BE-P9-NEXT:    lxsiwzx v2, 0, r4
915; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI9_0@toc@l
916; CHECK-BE-P9-NEXT:    lxv vs1, 0(r3)
917; CHECK-BE-P9-NEXT:    xxperm v2, vs0, vs1
918; CHECK-BE-P9-NEXT:    blr
919;
920; CHECK-AIX-64-P8-LABEL: test_v4i32_v4i32:
921; CHECK-AIX-64-P8:       # %bb.0: # %entry
922; CHECK-AIX-64-P8-NEXT:    lxsiwzx v2, 0, r3
923; CHECK-AIX-64-P8-NEXT:    ld r3, L..C6(r2) # %const.0
924; CHECK-AIX-64-P8-NEXT:    lxsiwzx v3, 0, r4
925; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r3
926; CHECK-AIX-64-P8-NEXT:    vperm v2, v2, v3, v4
927; CHECK-AIX-64-P8-NEXT:    blr
928;
929; CHECK-AIX-64-P9-LABEL: test_v4i32_v4i32:
930; CHECK-AIX-64-P9:       # %bb.0: # %entry
931; CHECK-AIX-64-P9-NEXT:    lfiwzx f0, 0, r3
932; CHECK-AIX-64-P9-NEXT:    ld r3, L..C5(r2) # %const.0
933; CHECK-AIX-64-P9-NEXT:    lxsiwzx v2, 0, r4
934; CHECK-AIX-64-P9-NEXT:    lxv vs1, 0(r3)
935; CHECK-AIX-64-P9-NEXT:    xxperm v2, vs0, vs1
936; CHECK-AIX-64-P9-NEXT:    blr
937;
938; CHECK-AIX-32-P8-LABEL: test_v4i32_v4i32:
939; CHECK-AIX-32-P8:       # %bb.0: # %entry
940; CHECK-AIX-32-P8-NEXT:    lxsiwzx v2, 0, r3
941; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C7(r2) # %const.0
942; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r4
943; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
944; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v3, v4
945; CHECK-AIX-32-P8-NEXT:    blr
946;
947; CHECK-AIX-32-P9-LABEL: test_v4i32_v4i32:
948; CHECK-AIX-32-P9:       # %bb.0: # %entry
949; CHECK-AIX-32-P9-NEXT:    lfiwzx f0, 0, r3
950; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C6(r2) # %const.0
951; CHECK-AIX-32-P9-NEXT:    lxsiwzx v2, 0, r4
952; CHECK-AIX-32-P9-NEXT:    lxv vs1, 0(r3)
953; CHECK-AIX-32-P9-NEXT:    xxperm v2, vs0, vs1
954; CHECK-AIX-32-P9-NEXT:    blr
955entry:
956  %load1 = load <4 x i8>, ptr %a
957  %load2 = load <4 x i8>, ptr %b
958  %shuffle1 = shufflevector <4 x i8> %load1, <4 x i8> %load2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
959  %shuffle2 = shufflevector <8 x i8> %shuffle1, <8 x i8> %shuffle1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
960  ret <16 x i8> %shuffle2
961}
962
963define void @test_v4i32_v8i16(ptr %a) {
964; CHECK-LE-P8-LABEL: test_v4i32_v8i16:
965; CHECK-LE-P8:       # %bb.0: # %entry
966; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
967; CHECK-LE-P8-NEXT:    lfiwzx f1, 0, r3
968; CHECK-LE-P8-NEXT:    mtfprd f0, r4
969; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs0, vs1
970; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
971; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
972; CHECK-LE-P8-NEXT:    blr
973;
974; CHECK-LE-P9-LABEL: test_v4i32_v8i16:
975; CHECK-LE-P9:       # %bb.0: # %entry
976; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
977; CHECK-LE-P9-NEXT:    lfiwzx f1, 0, r3
978; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs0, vs1
979; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
980; CHECK-LE-P9-NEXT:    blr
981;
982; CHECK-BE-P8-LABEL: test_v4i32_v8i16:
983; CHECK-BE-P8:       # %bb.0: # %entry
984; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
985; CHECK-BE-P8-NEXT:    lxsiwzx v3, 0, r3
986; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI10_0@toc@ha
987; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI10_0@toc@l
988; CHECK-BE-P8-NEXT:    mtvsrwz v2, r4
989; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
990; CHECK-BE-P8-NEXT:    vperm v2, v3, v2, v4
991; CHECK-BE-P8-NEXT:    stxvw4x v2, 0, r3
992; CHECK-BE-P8-NEXT:    blr
993;
994; CHECK-BE-P9-LABEL: test_v4i32_v8i16:
995; CHECK-BE-P9:       # %bb.0: # %entry
996; CHECK-BE-P9-NEXT:    lxsihzx f0, 0, r3
997; CHECK-BE-P9-NEXT:    lfiwzx f1, 0, r3
998; CHECK-BE-P9-NEXT:    addis r3, r2, .LCPI10_0@toc@ha
999; CHECK-BE-P9-NEXT:    addi r3, r3, .LCPI10_0@toc@l
1000; CHECK-BE-P9-NEXT:    lxv vs2, 0(r3)
1001; CHECK-BE-P9-NEXT:    xxperm vs0, vs1, vs2
1002; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
1003; CHECK-BE-P9-NEXT:    blr
1004;
1005; CHECK-AIX-64-P8-LABEL: test_v4i32_v8i16:
1006; CHECK-AIX-64-P8:       # %bb.0: # %entry
1007; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
1008; CHECK-AIX-64-P8-NEXT:    lxsiwzx v3, 0, r3
1009; CHECK-AIX-64-P8-NEXT:    ld r3, L..C7(r2) # %const.0
1010; CHECK-AIX-64-P8-NEXT:    mtvsrwz v2, r4
1011; CHECK-AIX-64-P8-NEXT:    lxvw4x v4, 0, r3
1012; CHECK-AIX-64-P8-NEXT:    vperm v2, v3, v2, v4
1013; CHECK-AIX-64-P8-NEXT:    stxvw4x v2, 0, r3
1014; CHECK-AIX-64-P8-NEXT:    blr
1015;
1016; CHECK-AIX-64-P9-LABEL: test_v4i32_v8i16:
1017; CHECK-AIX-64-P9:       # %bb.0: # %entry
1018; CHECK-AIX-64-P9-NEXT:    lxsihzx f0, 0, r3
1019; CHECK-AIX-64-P9-NEXT:    lfiwzx f1, 0, r3
1020; CHECK-AIX-64-P9-NEXT:    ld r3, L..C6(r2) # %const.0
1021; CHECK-AIX-64-P9-NEXT:    lxv vs2, 0(r3)
1022; CHECK-AIX-64-P9-NEXT:    xxperm vs0, vs1, vs2
1023; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
1024; CHECK-AIX-64-P9-NEXT:    blr
1025;
1026; CHECK-AIX-32-P8-LABEL: test_v4i32_v8i16:
1027; CHECK-AIX-32-P8:       # %bb.0: # %entry
1028; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
1029; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r3
1030; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C8(r2) # %const.0
1031; CHECK-AIX-32-P8-NEXT:    mtvsrwz v2, r4
1032; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1033; CHECK-AIX-32-P8-NEXT:    vperm v2, v3, v2, v4
1034; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
1035; CHECK-AIX-32-P8-NEXT:    blr
1036;
1037; CHECK-AIX-32-P9-LABEL: test_v4i32_v8i16:
1038; CHECK-AIX-32-P9:       # %bb.0: # %entry
1039; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
1040; CHECK-AIX-32-P9-NEXT:    lfiwzx f1, 0, r3
1041; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C7(r2) # %const.0
1042; CHECK-AIX-32-P9-NEXT:    lxv vs2, 0(r3)
1043; CHECK-AIX-32-P9-NEXT:    xxperm vs0, vs1, vs2
1044; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
1045; CHECK-AIX-32-P9-NEXT:    blr
1046entry:
1047  %0 = load <2 x i8>, ptr undef, align 1
1048  %tmp0_1 = bitcast <2 x i8> %0 to i16
1049  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
1050  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
1051  %1 = load <2 x i16>, ptr %a, align 4
1052  %tmp1_1 = bitcast <2 x i16> %1 to i32
1053  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
1054  %2 = shufflevector <4 x i32> %tmp1_2, <4 x i32> %tmp0_3, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1055  store <4 x i32> %2, ptr undef, align 4
1056  ret void
1057}
1058
1059define void @test_v4i32_v2i64(ptr %a) {
1060; CHECK-LE-P8-LABEL: test_v4i32_v2i64:
1061; CHECK-LE-P8:       # %bb.0: # %entry
1062; CHECK-LE-P8-NEXT:    lfdx f0, 0, r3
1063; CHECK-LE-P8-NEXT:    lfiwzx f1, 0, r3
1064; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs0, vs1
1065; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
1066; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
1067; CHECK-LE-P8-NEXT:    blr
1068;
1069; CHECK-LE-P9-LABEL: test_v4i32_v2i64:
1070; CHECK-LE-P9:       # %bb.0: # %entry
1071; CHECK-LE-P9-NEXT:    lfd f0, 0(r3)
1072; CHECK-LE-P9-NEXT:    lfiwzx f1, 0, r3
1073; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs0, vs1
1074; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
1075; CHECK-LE-P9-NEXT:    blr
1076;
1077; CHECK-BE-P8-LABEL: test_v4i32_v2i64:
1078; CHECK-BE-P8:       # %bb.0: # %entry
1079; CHECK-BE-P8-NEXT:    lfiwzx f0, 0, r3
1080; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
1081; CHECK-BE-P8-NEXT:    xxsldwi vs0, f0, f0, 1
1082; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs0, vs1
1083; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
1084; CHECK-BE-P8-NEXT:    blr
1085;
1086; CHECK-BE-P9-LABEL: test_v4i32_v2i64:
1087; CHECK-BE-P9:       # %bb.0: # %entry
1088; CHECK-BE-P9-NEXT:    lfiwzx f1, 0, r3
1089; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
1090; CHECK-BE-P9-NEXT:    xxsldwi vs1, f1, f1, 1
1091; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs1, vs0
1092; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
1093; CHECK-BE-P9-NEXT:    blr
1094;
1095; CHECK-AIX-64-P8-LABEL: test_v4i32_v2i64:
1096; CHECK-AIX-64-P8:       # %bb.0: # %entry
1097; CHECK-AIX-64-P8-NEXT:    lfiwzx f0, 0, r3
1098; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
1099; CHECK-AIX-64-P8-NEXT:    xxsldwi vs0, f0, f0, 1
1100; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs0, vs1
1101; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
1102; CHECK-AIX-64-P8-NEXT:    blr
1103;
1104; CHECK-AIX-64-P9-LABEL: test_v4i32_v2i64:
1105; CHECK-AIX-64-P9:       # %bb.0: # %entry
1106; CHECK-AIX-64-P9-NEXT:    lfiwzx f1, 0, r3
1107; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
1108; CHECK-AIX-64-P9-NEXT:    xxsldwi vs1, f1, f1, 1
1109; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs1, vs0
1110; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
1111; CHECK-AIX-64-P9-NEXT:    blr
1112;
1113; CHECK-AIX-32-P8-LABEL: test_v4i32_v2i64:
1114; CHECK-AIX-32-P8:       # %bb.0: # %entry
1115; CHECK-AIX-32-P8-NEXT:    lfiwzx f0, 0, r3
1116; CHECK-AIX-32-P8-NEXT:    lfiwzx f1, 0, r3
1117; CHECK-AIX-32-P8-NEXT:    xxspltw vs0, vs0, 1
1118; CHECK-AIX-32-P8-NEXT:    xxspltw vs1, vs1, 1
1119; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs1, vs0
1120; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r3
1121; CHECK-AIX-32-P8-NEXT:    blr
1122;
1123; CHECK-AIX-32-P9-LABEL: test_v4i32_v2i64:
1124; CHECK-AIX-32-P9:       # %bb.0: # %entry
1125; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, 0, r3
1126; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r3
1127; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1128; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
1129; CHECK-AIX-32-P9-NEXT:    blr
1130entry:
1131  %0 = load <2 x i16>, ptr undef, align 8
1132  %tmp0_1 = bitcast <2 x i16> %0 to i32
1133  %tmp0_2 = insertelement <4 x i32> undef, i32 %tmp0_1, i32 0
1134  %1 = load <2 x i16>, ptr %a, align 4
1135  %tmp1_1 = bitcast <2 x i16> %1 to i32
1136  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
1137  %2 = shufflevector <4 x i32> %tmp1_2, <4 x i32> %tmp0_2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1138  store <4 x i32> %2, ptr undef, align 4
1139  ret void
1140}
1141
1142define void @test_v2i64_v2i64(ptr %a) {
1143; CHECK-LE-P8-LABEL: test_v2i64_v2i64:
1144; CHECK-LE-P8:       # %bb.0: # %entry
1145; CHECK-LE-P8-NEXT:    lfdx f0, 0, r3
1146; CHECK-LE-P8-NEXT:    lfdx f1, 0, r3
1147; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs1, vs0
1148; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
1149; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
1150; CHECK-LE-P8-NEXT:    blr
1151;
1152; CHECK-LE-P9-LABEL: test_v2i64_v2i64:
1153; CHECK-LE-P9:       # %bb.0: # %entry
1154; CHECK-LE-P9-NEXT:    lfd f0, 0(r3)
1155; CHECK-LE-P9-NEXT:    lfd f1, 0(r3)
1156; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs1, vs0
1157; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
1158; CHECK-LE-P9-NEXT:    blr
1159;
1160; CHECK-BE-P8-LABEL: test_v2i64_v2i64:
1161; CHECK-BE-P8:       # %bb.0: # %entry
1162; CHECK-BE-P8-NEXT:    lfdx f0, 0, r3
1163; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
1164; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs0, vs1
1165; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
1166; CHECK-BE-P8-NEXT:    blr
1167;
1168; CHECK-BE-P9-LABEL: test_v2i64_v2i64:
1169; CHECK-BE-P9:       # %bb.0: # %entry
1170; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
1171; CHECK-BE-P9-NEXT:    lfd f1, 0(r3)
1172; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs0, vs1
1173; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
1174; CHECK-BE-P9-NEXT:    blr
1175;
1176; CHECK-AIX-64-P8-LABEL: test_v2i64_v2i64:
1177; CHECK-AIX-64-P8:       # %bb.0: # %entry
1178; CHECK-AIX-64-P8-NEXT:    lfdx f0, 0, r3
1179; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
1180; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs0, vs1
1181; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
1182; CHECK-AIX-64-P8-NEXT:    blr
1183;
1184; CHECK-AIX-64-P9-LABEL: test_v2i64_v2i64:
1185; CHECK-AIX-64-P9:       # %bb.0: # %entry
1186; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
1187; CHECK-AIX-64-P9-NEXT:    lfd f1, 0(r3)
1188; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs0, vs1
1189; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
1190; CHECK-AIX-64-P9-NEXT:    blr
1191;
1192; CHECK-AIX-32-P8-LABEL: test_v2i64_v2i64:
1193; CHECK-AIX-32-P8:       # %bb.0: # %entry
1194; CHECK-AIX-32-P8-NEXT:    li r4, 4
1195; CHECK-AIX-32-P8-NEXT:    lfiwzx f1, 0, r3
1196; CHECK-AIX-32-P8-NEXT:    lfiwzx f0, r3, r4
1197; CHECK-AIX-32-P8-NEXT:    xxspltw vs1, vs1, 1
1198; CHECK-AIX-32-P8-NEXT:    xxspltw vs0, vs0, 1
1199; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs1, vs0
1200; CHECK-AIX-32-P8-NEXT:    lfiwzx f1, 0, r3
1201; CHECK-AIX-32-P8-NEXT:    xxspltw vs1, vs1, 1
1202; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs1, vs0
1203; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r3
1204; CHECK-AIX-32-P8-NEXT:    blr
1205;
1206; CHECK-AIX-32-P9-LABEL: test_v2i64_v2i64:
1207; CHECK-AIX-32-P9:       # %bb.0: # %entry
1208; CHECK-AIX-32-P9-NEXT:    li r4, 4
1209; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r3
1210; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, r3, r4
1211; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1212; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r3
1213; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1214; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
1215; CHECK-AIX-32-P9-NEXT:    blr
1216entry:
1217  %0 = load <2 x i32>, ptr undef, align 4
1218  %1 = load <2 x i32>, ptr %a, align 4
1219  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
1220  store <4 x i32> %2, ptr undef, align 4
1221  ret void
1222}
1223
1224define void @test_v2i64_v4i32(ptr %a) {
1225; CHECK-LE-P8-LABEL: test_v2i64_v4i32:
1226; CHECK-LE-P8:       # %bb.0: # %entry
1227; CHECK-LE-P8-NEXT:    lfdx f0, 0, r3
1228; CHECK-LE-P8-NEXT:    lfiwzx f1, 0, r3
1229; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs1, vs0
1230; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
1231; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
1232; CHECK-LE-P8-NEXT:    blr
1233;
1234; CHECK-LE-P9-LABEL: test_v2i64_v4i32:
1235; CHECK-LE-P9:       # %bb.0: # %entry
1236; CHECK-LE-P9-NEXT:    lfd f0, 0(r3)
1237; CHECK-LE-P9-NEXT:    lfiwzx f1, 0, r3
1238; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs1, vs0
1239; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
1240; CHECK-LE-P9-NEXT:    blr
1241;
1242; CHECK-BE-P8-LABEL: test_v2i64_v4i32:
1243; CHECK-BE-P8:       # %bb.0: # %entry
1244; CHECK-BE-P8-NEXT:    lfiwzx f0, 0, r3
1245; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
1246; CHECK-BE-P8-NEXT:    xxsldwi vs0, f0, f0, 1
1247; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs1, vs0
1248; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
1249; CHECK-BE-P8-NEXT:    blr
1250;
1251; CHECK-BE-P9-LABEL: test_v2i64_v4i32:
1252; CHECK-BE-P9:       # %bb.0: # %entry
1253; CHECK-BE-P9-NEXT:    lfiwzx f1, 0, r3
1254; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
1255; CHECK-BE-P9-NEXT:    xxsldwi vs1, f1, f1, 1
1256; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs0, vs1
1257; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
1258; CHECK-BE-P9-NEXT:    blr
1259;
1260; CHECK-AIX-64-P8-LABEL: test_v2i64_v4i32:
1261; CHECK-AIX-64-P8:       # %bb.0: # %entry
1262; CHECK-AIX-64-P8-NEXT:    lfiwzx f0, 0, r3
1263; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
1264; CHECK-AIX-64-P8-NEXT:    xxsldwi vs0, f0, f0, 1
1265; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs1, vs0
1266; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
1267; CHECK-AIX-64-P8-NEXT:    blr
1268;
1269; CHECK-AIX-64-P9-LABEL: test_v2i64_v4i32:
1270; CHECK-AIX-64-P9:       # %bb.0: # %entry
1271; CHECK-AIX-64-P9-NEXT:    lfiwzx f1, 0, r3
1272; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
1273; CHECK-AIX-64-P9-NEXT:    xxsldwi vs1, f1, f1, 1
1274; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs0, vs1
1275; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
1276; CHECK-AIX-64-P9-NEXT:    blr
1277;
1278; CHECK-AIX-32-P8-LABEL: test_v2i64_v4i32:
1279; CHECK-AIX-32-P8:       # %bb.0: # %entry
1280; CHECK-AIX-32-P8-NEXT:    lfiwzx f0, 0, r3
1281; CHECK-AIX-32-P8-NEXT:    lfiwzx f1, 0, r3
1282; CHECK-AIX-32-P8-NEXT:    xxspltw vs0, vs0, 1
1283; CHECK-AIX-32-P8-NEXT:    xxspltw vs1, vs1, 1
1284; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs1, vs0
1285; CHECK-AIX-32-P8-NEXT:    stxvw4x vs0, 0, r3
1286; CHECK-AIX-32-P8-NEXT:    blr
1287;
1288; CHECK-AIX-32-P9-LABEL: test_v2i64_v4i32:
1289; CHECK-AIX-32-P9:       # %bb.0: # %entry
1290; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, 0, r3
1291; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r3
1292; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1293; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
1294; CHECK-AIX-32-P9-NEXT:    blr
1295entry:
1296  %0 = load <2 x i16>, ptr undef, align 8
1297  %tmp0_1 = bitcast <2 x i16> %0 to i32
1298  %tmp0_2 = insertelement <4 x i32> undef, i32 %tmp0_1, i32 0
1299  %1 = load <2 x i16>, ptr %a, align 4
1300  %tmp1_1 = bitcast <2 x i16> %1 to i32
1301  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
1302  %2 = shufflevector <4 x i32> %tmp0_2, <4 x i32> %tmp1_2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1303  store <4 x i32> %2, ptr undef, align 4
1304  ret void
1305}
1306
1307define void @test_v2i64_v8i16(ptr %a) {
1308; CHECK-LE-P8-LABEL: test_v2i64_v8i16:
1309; CHECK-LE-P8:       # %bb.0: # %entry
1310; CHECK-LE-P8-NEXT:    lhz r4, 0(r3)
1311; CHECK-LE-P8-NEXT:    lfdx f1, 0, r3
1312; CHECK-LE-P8-NEXT:    mtfprd f0, r4
1313; CHECK-LE-P8-NEXT:    xxmrghw vs0, vs0, vs1
1314; CHECK-LE-P8-NEXT:    xxswapd vs0, vs0
1315; CHECK-LE-P8-NEXT:    stxvd2x vs0, 0, r3
1316; CHECK-LE-P8-NEXT:    blr
1317;
1318; CHECK-LE-P9-LABEL: test_v2i64_v8i16:
1319; CHECK-LE-P9:       # %bb.0: # %entry
1320; CHECK-LE-P9-NEXT:    lxsihzx f0, 0, r3
1321; CHECK-LE-P9-NEXT:    lfd f1, 0(r3)
1322; CHECK-LE-P9-NEXT:    xxmrghw vs0, vs0, vs1
1323; CHECK-LE-P9-NEXT:    stxv vs0, 0(r3)
1324; CHECK-LE-P9-NEXT:    blr
1325;
1326; CHECK-BE-P8-LABEL: test_v2i64_v8i16:
1327; CHECK-BE-P8:       # %bb.0: # %entry
1328; CHECK-BE-P8-NEXT:    lhz r4, 0(r3)
1329; CHECK-BE-P8-NEXT:    lfdx f1, 0, r3
1330; CHECK-BE-P8-NEXT:    sldi r4, r4, 48
1331; CHECK-BE-P8-NEXT:    mtfprd f0, r4
1332; CHECK-BE-P8-NEXT:    xxmrghw vs0, vs1, vs0
1333; CHECK-BE-P8-NEXT:    stxvw4x vs0, 0, r3
1334; CHECK-BE-P8-NEXT:    blr
1335;
1336; CHECK-BE-P9-LABEL: test_v2i64_v8i16:
1337; CHECK-BE-P9:       # %bb.0: # %entry
1338; CHECK-BE-P9-NEXT:    lxsihzx v2, 0, r3
1339; CHECK-BE-P9-NEXT:    lfd f0, 0(r3)
1340; CHECK-BE-P9-NEXT:    vsplth v2, v2, 3
1341; CHECK-BE-P9-NEXT:    xxmrghw vs0, vs0, v2
1342; CHECK-BE-P9-NEXT:    stxv vs0, 0(r3)
1343; CHECK-BE-P9-NEXT:    blr
1344;
1345; CHECK-AIX-64-P8-LABEL: test_v2i64_v8i16:
1346; CHECK-AIX-64-P8:       # %bb.0: # %entry
1347; CHECK-AIX-64-P8-NEXT:    lhz r4, 0(r3)
1348; CHECK-AIX-64-P8-NEXT:    lfdx f1, 0, r3
1349; CHECK-AIX-64-P8-NEXT:    sldi r4, r4, 48
1350; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
1351; CHECK-AIX-64-P8-NEXT:    xxmrghw vs0, vs1, vs0
1352; CHECK-AIX-64-P8-NEXT:    stxvw4x vs0, 0, r3
1353; CHECK-AIX-64-P8-NEXT:    blr
1354;
1355; CHECK-AIX-64-P9-LABEL: test_v2i64_v8i16:
1356; CHECK-AIX-64-P9:       # %bb.0: # %entry
1357; CHECK-AIX-64-P9-NEXT:    lxsihzx v2, 0, r3
1358; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r3)
1359; CHECK-AIX-64-P9-NEXT:    vsplth v2, v2, 3
1360; CHECK-AIX-64-P9-NEXT:    xxmrghw vs0, vs0, v2
1361; CHECK-AIX-64-P9-NEXT:    stxv vs0, 0(r3)
1362; CHECK-AIX-64-P9-NEXT:    blr
1363;
1364; CHECK-AIX-32-P8-LABEL: test_v2i64_v8i16:
1365; CHECK-AIX-32-P8:       # %bb.0: # %entry
1366; CHECK-AIX-32-P8-NEXT:    lhz r4, 0(r3)
1367; CHECK-AIX-32-P8-NEXT:    lxsiwzx v3, 0, r3
1368; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C9(r2) # %const.0
1369; CHECK-AIX-32-P8-NEXT:    mtvsrwz v2, r4
1370; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1371; CHECK-AIX-32-P8-NEXT:    vperm v2, v3, v2, v4
1372; CHECK-AIX-32-P8-NEXT:    stxvw4x v2, 0, r3
1373; CHECK-AIX-32-P8-NEXT:    blr
1374;
1375; CHECK-AIX-32-P9-LABEL: test_v2i64_v8i16:
1376; CHECK-AIX-32-P9:       # %bb.0: # %entry
1377; CHECK-AIX-32-P9-NEXT:    lxsihzx f0, 0, r3
1378; CHECK-AIX-32-P9-NEXT:    lfiwzx f1, 0, r3
1379; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C8(r2) # %const.0
1380; CHECK-AIX-32-P9-NEXT:    lxv vs2, 0(r3)
1381; CHECK-AIX-32-P9-NEXT:    xxperm vs0, vs1, vs2
1382; CHECK-AIX-32-P9-NEXT:    stxv vs0, 0(r3)
1383; CHECK-AIX-32-P9-NEXT:    blr
1384entry:
1385  %0 = load <2 x i8>, ptr undef, align 1
1386  %tmp0_1 = bitcast <2 x i8> %0 to i16
1387  %tmp0_2 = insertelement <8 x i16> undef, i16 %tmp0_1, i32 0
1388  %tmp0_3 = bitcast <8 x i16> %tmp0_2 to <4 x i32>
1389  %1 = load <2 x i16>, ptr %a, align 8
1390  %tmp1_1 = bitcast <2 x i16> %1 to i32
1391  %tmp1_2 = insertelement <4 x i32> undef, i32 %tmp1_1, i32 0
1392  %2 = shufflevector <4 x i32> %tmp1_2, <4 x i32> %tmp0_3, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1393  store <4 x i32> %2, ptr undef, align 4
1394  ret void
1395}
1396