xref: /llvm-project/llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll (revision 4981f8cb72ea7d04da601c868763b38bdc11e74e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
3; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
5; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
6; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
7; RUN: FileCheck %s --check-prefix=CHECK-LE-P9
8; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
9; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
10; RUN: FileCheck %s --check-prefix=CHECK-BE-P8
11; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
12; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
13; RUN: FileCheck %s --check-prefix=CHECK-BE-P9
14
15; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
16; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
17; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P8
18; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
19; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
20; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9
21; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
22; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
23; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P8
24; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
25; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
26; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P9
27
28define <2 x i64> @test_v16i8_v16i8(i8 %arg1, i8 %arg) {
29; CHECK-LE-P8-LABEL: test_v16i8_v16i8:
30; CHECK-LE-P8:       # %bb.0: # %entry
31; CHECK-LE-P8-NEXT:    mtfprd f0, r3
32; CHECK-LE-P8-NEXT:    mtfprd f1, r4
33; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
34; CHECK-LE-P8-NEXT:    blr
35;
36; CHECK-LE-P9-LABEL: test_v16i8_v16i8:
37; CHECK-LE-P9:       # %bb.0: # %entry
38; CHECK-LE-P9-NEXT:    mtfprd f0, r3
39; CHECK-LE-P9-NEXT:    mtfprd f1, r4
40; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
41; CHECK-LE-P9-NEXT:    blr
42;
43; CHECK-BE-P8-LABEL: test_v16i8_v16i8:
44; CHECK-BE-P8:       # %bb.0: # %entry
45; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
46; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
47; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
48; CHECK-BE-P8-NEXT:    blr
49;
50; CHECK-BE-P9-LABEL: test_v16i8_v16i8:
51; CHECK-BE-P9:       # %bb.0: # %entry
52; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
53; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
54; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
55; CHECK-BE-P9-NEXT:    blr
56;
57; CHECK-AIX-64-P8-LABEL: test_v16i8_v16i8:
58; CHECK-AIX-64-P8:       # %bb.0: # %entry
59; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
60; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
61; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
62; CHECK-AIX-64-P8-NEXT:    blr
63;
64; CHECK-AIX-64-P9-LABEL: test_v16i8_v16i8:
65; CHECK-AIX-64-P9:       # %bb.0: # %entry
66; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
67; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
68; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
69; CHECK-AIX-64-P9-NEXT:    blr
70;
71; CHECK-AIX-32-P8-LABEL: test_v16i8_v16i8:
72; CHECK-AIX-32-P8:       # %bb.0: # %entry
73; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
74; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
75; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
76; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
77; CHECK-AIX-32-P8-NEXT:    stb r4, -32(r1)
78; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
79; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
80; CHECK-AIX-32-P8-NEXT:    blr
81;
82; CHECK-AIX-32-P9-LABEL: test_v16i8_v16i8:
83; CHECK-AIX-32-P9:       # %bb.0: # %entry
84; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
85; CHECK-AIX-32-P9-NEXT:    stb r4, -32(r1)
86; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
87; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
88; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
89; CHECK-AIX-32-P9-NEXT:    blr
90entry:
91  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
92  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
93  %rhs.tmp = insertelement <16 x i8> undef, i8 %arg, i32 0
94  %rhs = bitcast <16 x i8> %rhs.tmp to <2 x i64>
95  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
96  ret <2 x i64> %shuffle
97}
98
99define <2 x i64> @test_none_v16i8(i8 %arg1, ptr nocapture noundef readonly %b) {
100; CHECK-LE-P8-LABEL: test_none_v16i8:
101; CHECK-LE-P8:       # %bb.0: # %entry
102; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
103; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
104; CHECK-LE-P8-NEXT:    mtfprd f0, r3
105; CHECK-LE-P8-NEXT:    xxpermdi v2, vs0, v2, 1
106; CHECK-LE-P8-NEXT:    blr
107;
108; CHECK-LE-P9-LABEL: test_none_v16i8:
109; CHECK-LE-P9:       # %bb.0: # %entry
110; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
111; CHECK-LE-P9-NEXT:    mtfprd f0, r3
112; CHECK-LE-P9-NEXT:    xxpermdi v2, vs0, v2, 1
113; CHECK-LE-P9-NEXT:    blr
114;
115; CHECK-BE-P8-LABEL: test_none_v16i8:
116; CHECK-BE-P8:       # %bb.0: # %entry
117; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
118; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
119; CHECK-BE-P8-NEXT:    xxpermdi v2, v2, vs0, 1
120; CHECK-BE-P8-NEXT:    blr
121;
122; CHECK-BE-P9-LABEL: test_none_v16i8:
123; CHECK-BE-P9:       # %bb.0: # %entry
124; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
125; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
126; CHECK-BE-P9-NEXT:    xxpermdi v2, v2, vs0, 1
127; CHECK-BE-P9-NEXT:    blr
128;
129; CHECK-AIX-64-P8-LABEL: test_none_v16i8:
130; CHECK-AIX-64-P8:       # %bb.0: # %entry
131; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
132; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
133; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, v2, vs0, 1
134; CHECK-AIX-64-P8-NEXT:    blr
135;
136; CHECK-AIX-64-P9-LABEL: test_none_v16i8:
137; CHECK-AIX-64-P9:       # %bb.0: # %entry
138; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
139; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
140; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, v2, vs0, 1
141; CHECK-AIX-64-P9-NEXT:    blr
142;
143; CHECK-AIX-32-P8-LABEL: test_none_v16i8:
144; CHECK-AIX-32-P8:       # %bb.0: # %entry
145; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
146; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
147; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
148; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
149; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, v2, vs0
150; CHECK-AIX-32-P8-NEXT:    blr
151;
152; CHECK-AIX-32-P9-LABEL: test_none_v16i8:
153; CHECK-AIX-32-P9:       # %bb.0: # %entry
154; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
155; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
156; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
157; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, v2, vs0
158; CHECK-AIX-32-P9-NEXT:    blr
159entry:
160  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
161  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
162  %rhs = load <2 x i64>, ptr %b, align 4
163  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
164  ret <2 x i64> %shuffle
165}
166
167define <2 x i64> @test_v16i8_none(i8 %arg1, ptr nocapture noundef readonly %b) {
168; CHECK-LE-P8-LABEL: test_v16i8_none:
169; CHECK-LE-P8:       # %bb.0: # %entry
170; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
171; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
172; CHECK-LE-P8-NEXT:    mtfprd f0, r3
173; CHECK-LE-P8-NEXT:    xxpermdi v2, v2, vs0, 2
174; CHECK-LE-P8-NEXT:    blr
175;
176; CHECK-LE-P9-LABEL: test_v16i8_none:
177; CHECK-LE-P9:       # %bb.0: # %entry
178; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
179; CHECK-LE-P9-NEXT:    mtfprd f0, r3
180; CHECK-LE-P9-NEXT:    xxpermdi v2, v2, vs0, 2
181; CHECK-LE-P9-NEXT:    blr
182;
183; CHECK-BE-P8-LABEL: test_v16i8_none:
184; CHECK-BE-P8:       # %bb.0: # %entry
185; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
186; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
187; CHECK-BE-P8-NEXT:    xxpermdi v2, vs0, v2, 2
188; CHECK-BE-P8-NEXT:    blr
189;
190; CHECK-BE-P9-LABEL: test_v16i8_none:
191; CHECK-BE-P9:       # %bb.0: # %entry
192; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
193; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
194; CHECK-BE-P9-NEXT:    xxpermdi v2, vs0, v2, 2
195; CHECK-BE-P9-NEXT:    blr
196;
197; CHECK-AIX-64-P8-LABEL: test_v16i8_none:
198; CHECK-AIX-64-P8:       # %bb.0: # %entry
199; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
200; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
201; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, vs0, v2, 2
202; CHECK-AIX-64-P8-NEXT:    blr
203;
204; CHECK-AIX-64-P9-LABEL: test_v16i8_none:
205; CHECK-AIX-64-P9:       # %bb.0: # %entry
206; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
207; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
208; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, vs0, v2, 2
209; CHECK-AIX-64-P9-NEXT:    blr
210;
211; CHECK-AIX-32-P8-LABEL: test_v16i8_none:
212; CHECK-AIX-32-P8:       # %bb.0: # %entry
213; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
214; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
215; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
216; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
217; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, v2
218; CHECK-AIX-32-P8-NEXT:    blr
219;
220; CHECK-AIX-32-P9-LABEL: test_v16i8_none:
221; CHECK-AIX-32-P9:       # %bb.0: # %entry
222; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
223; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
224; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
225; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, v2
226; CHECK-AIX-32-P9-NEXT:    blr
227entry:
228  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
229  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
230  %rhs = load <2 x i64>, ptr %b, align 4
231  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
232  ret <2 x i64> %shuffle
233}
234
235define <2 x i64> @test_v16i8_v8i16(i8 %arg1, i16 %arg) {
236; CHECK-LE-P8-LABEL: test_v16i8_v8i16:
237; CHECK-LE-P8:       # %bb.0: # %entry
238; CHECK-LE-P8-NEXT:    mtfprd f0, r3
239; CHECK-LE-P8-NEXT:    mtfprd f1, r4
240; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
241; CHECK-LE-P8-NEXT:    blr
242;
243; CHECK-LE-P9-LABEL: test_v16i8_v8i16:
244; CHECK-LE-P9:       # %bb.0: # %entry
245; CHECK-LE-P9-NEXT:    mtfprd f0, r3
246; CHECK-LE-P9-NEXT:    mtfprd f1, r4
247; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
248; CHECK-LE-P9-NEXT:    blr
249;
250; CHECK-BE-P8-LABEL: test_v16i8_v8i16:
251; CHECK-BE-P8:       # %bb.0: # %entry
252; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
253; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
254; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
255; CHECK-BE-P8-NEXT:    blr
256;
257; CHECK-BE-P9-LABEL: test_v16i8_v8i16:
258; CHECK-BE-P9:       # %bb.0: # %entry
259; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
260; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
261; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
262; CHECK-BE-P9-NEXT:    blr
263;
264; CHECK-AIX-64-P8-LABEL: test_v16i8_v8i16:
265; CHECK-AIX-64-P8:       # %bb.0: # %entry
266; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
267; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
268; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
269; CHECK-AIX-64-P8-NEXT:    blr
270;
271; CHECK-AIX-64-P9-LABEL: test_v16i8_v8i16:
272; CHECK-AIX-64-P9:       # %bb.0: # %entry
273; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
274; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
275; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
276; CHECK-AIX-64-P9-NEXT:    blr
277;
278; CHECK-AIX-32-P8-LABEL: test_v16i8_v8i16:
279; CHECK-AIX-32-P8:       # %bb.0: # %entry
280; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
281; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
282; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
283; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
284; CHECK-AIX-32-P8-NEXT:    sth r4, -32(r1)
285; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
286; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
287; CHECK-AIX-32-P8-NEXT:    blr
288;
289; CHECK-AIX-32-P9-LABEL: test_v16i8_v8i16:
290; CHECK-AIX-32-P9:       # %bb.0: # %entry
291; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
292; CHECK-AIX-32-P9-NEXT:    sth r4, -32(r1)
293; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
294; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
295; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
296; CHECK-AIX-32-P9-NEXT:    blr
297entry:
298  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
299  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
300  %rhs.tmp = insertelement <8 x i16> undef, i16 %arg, i32 0
301  %rhs = bitcast <8 x i16> %rhs.tmp to <2 x i64>
302  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
303  ret <2 x i64> %shuffle
304}
305
306define <2 x i64> @test_v8i16_v16i8(i8 %arg1, i16 %arg) {
307; CHECK-LE-P8-LABEL: test_v8i16_v16i8:
308; CHECK-LE-P8:       # %bb.0: # %entry
309; CHECK-LE-P8-NEXT:    mtfprd f0, r3
310; CHECK-LE-P8-NEXT:    mtfprd f1, r4
311; CHECK-LE-P8-NEXT:    xxmrghd v2, vs0, vs1
312; CHECK-LE-P8-NEXT:    blr
313;
314; CHECK-LE-P9-LABEL: test_v8i16_v16i8:
315; CHECK-LE-P9:       # %bb.0: # %entry
316; CHECK-LE-P9-NEXT:    mtfprd f0, r3
317; CHECK-LE-P9-NEXT:    mtfprd f1, r4
318; CHECK-LE-P9-NEXT:    xxmrghd v2, vs0, vs1
319; CHECK-LE-P9-NEXT:    blr
320;
321; CHECK-BE-P8-LABEL: test_v8i16_v16i8:
322; CHECK-BE-P8:       # %bb.0: # %entry
323; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
324; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
325; CHECK-BE-P8-NEXT:    xxmrgld v2, vs1, vs0
326; CHECK-BE-P8-NEXT:    blr
327;
328; CHECK-BE-P9-LABEL: test_v8i16_v16i8:
329; CHECK-BE-P9:       # %bb.0: # %entry
330; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
331; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
332; CHECK-BE-P9-NEXT:    xxmrgld v2, vs1, vs0
333; CHECK-BE-P9-NEXT:    blr
334;
335; CHECK-AIX-64-P8-LABEL: test_v8i16_v16i8:
336; CHECK-AIX-64-P8:       # %bb.0: # %entry
337; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
338; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
339; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs1, vs0
340; CHECK-AIX-64-P8-NEXT:    blr
341;
342; CHECK-AIX-64-P9-LABEL: test_v8i16_v16i8:
343; CHECK-AIX-64-P9:       # %bb.0: # %entry
344; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
345; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
346; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs1, vs0
347; CHECK-AIX-64-P9-NEXT:    blr
348;
349; CHECK-AIX-32-P8-LABEL: test_v8i16_v16i8:
350; CHECK-AIX-32-P8:       # %bb.0: # %entry
351; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
352; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
353; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
354; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
355; CHECK-AIX-32-P8-NEXT:    sth r4, -32(r1)
356; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
357; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs1, vs0
358; CHECK-AIX-32-P8-NEXT:    blr
359;
360; CHECK-AIX-32-P9-LABEL: test_v8i16_v16i8:
361; CHECK-AIX-32-P9:       # %bb.0: # %entry
362; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
363; CHECK-AIX-32-P9-NEXT:    sth r4, -32(r1)
364; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
365; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
366; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs1, vs0
367; CHECK-AIX-32-P9-NEXT:    blr
368entry:
369  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
370  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
371  %rhs.tmp = insertelement <8 x i16> undef, i16 %arg, i32 0
372  %rhs = bitcast <8 x i16> %rhs.tmp to <2 x i64>
373  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
374  ret <2 x i64> %shuffle
375}
376
377define <2 x i64> @test_v8i16_none(i16 %arg1, ptr nocapture noundef readonly %b) {
378; CHECK-LE-P8-LABEL: test_v8i16_none:
379; CHECK-LE-P8:       # %bb.0: # %entry
380; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
381; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
382; CHECK-LE-P8-NEXT:    mtfprd f0, r3
383; CHECK-LE-P8-NEXT:    xxpermdi v2, v2, vs0, 2
384; CHECK-LE-P8-NEXT:    blr
385;
386; CHECK-LE-P9-LABEL: test_v8i16_none:
387; CHECK-LE-P9:       # %bb.0: # %entry
388; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
389; CHECK-LE-P9-NEXT:    mtfprd f0, r3
390; CHECK-LE-P9-NEXT:    xxpermdi v2, v2, vs0, 2
391; CHECK-LE-P9-NEXT:    blr
392;
393; CHECK-BE-P8-LABEL: test_v8i16_none:
394; CHECK-BE-P8:       # %bb.0: # %entry
395; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
396; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
397; CHECK-BE-P8-NEXT:    xxpermdi v2, vs0, v2, 2
398; CHECK-BE-P8-NEXT:    blr
399;
400; CHECK-BE-P9-LABEL: test_v8i16_none:
401; CHECK-BE-P9:       # %bb.0: # %entry
402; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
403; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
404; CHECK-BE-P9-NEXT:    xxpermdi v2, vs0, v2, 2
405; CHECK-BE-P9-NEXT:    blr
406;
407; CHECK-AIX-64-P8-LABEL: test_v8i16_none:
408; CHECK-AIX-64-P8:       # %bb.0: # %entry
409; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
410; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
411; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, vs0, v2, 2
412; CHECK-AIX-64-P8-NEXT:    blr
413;
414; CHECK-AIX-64-P9-LABEL: test_v8i16_none:
415; CHECK-AIX-64-P9:       # %bb.0: # %entry
416; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
417; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
418; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, vs0, v2, 2
419; CHECK-AIX-64-P9-NEXT:    blr
420;
421; CHECK-AIX-32-P8-LABEL: test_v8i16_none:
422; CHECK-AIX-32-P8:       # %bb.0: # %entry
423; CHECK-AIX-32-P8-NEXT:    sth r3, -16(r1)
424; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
425; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
426; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
427; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, v2
428; CHECK-AIX-32-P8-NEXT:    blr
429;
430; CHECK-AIX-32-P9-LABEL: test_v8i16_none:
431; CHECK-AIX-32-P9:       # %bb.0: # %entry
432; CHECK-AIX-32-P9-NEXT:    sth r3, -16(r1)
433; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
434; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
435; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, v2
436; CHECK-AIX-32-P9-NEXT:    blr
437entry:
438  %lhs.tmp = insertelement <8 x i16> undef, i16 %arg1, i32 0
439  %lhs = bitcast <8 x i16> %lhs.tmp to <2 x i64>
440  %rhs = load <2 x i64>, ptr %b, align 4
441  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
442  ret <2 x i64> %shuffle
443}
444
445define <2 x i64> @test_none_v8i16(i16 %arg1, ptr nocapture noundef readonly %b) {
446; CHECK-LE-P8-LABEL: test_none_v8i16:
447; CHECK-LE-P8:       # %bb.0: # %entry
448; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
449; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
450; CHECK-LE-P8-NEXT:    mtfprd f0, r3
451; CHECK-LE-P8-NEXT:    xxpermdi v2, vs0, v2, 1
452; CHECK-LE-P8-NEXT:    blr
453;
454; CHECK-LE-P9-LABEL: test_none_v8i16:
455; CHECK-LE-P9:       # %bb.0: # %entry
456; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
457; CHECK-LE-P9-NEXT:    mtfprd f0, r3
458; CHECK-LE-P9-NEXT:    xxpermdi v2, vs0, v2, 1
459; CHECK-LE-P9-NEXT:    blr
460;
461; CHECK-BE-P8-LABEL: test_none_v8i16:
462; CHECK-BE-P8:       # %bb.0: # %entry
463; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
464; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
465; CHECK-BE-P8-NEXT:    xxpermdi v2, v2, vs0, 1
466; CHECK-BE-P8-NEXT:    blr
467;
468; CHECK-BE-P9-LABEL: test_none_v8i16:
469; CHECK-BE-P9:       # %bb.0: # %entry
470; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
471; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
472; CHECK-BE-P9-NEXT:    xxpermdi v2, v2, vs0, 1
473; CHECK-BE-P9-NEXT:    blr
474;
475; CHECK-AIX-64-P8-LABEL: test_none_v8i16:
476; CHECK-AIX-64-P8:       # %bb.0: # %entry
477; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
478; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
479; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, v2, vs0, 1
480; CHECK-AIX-64-P8-NEXT:    blr
481;
482; CHECK-AIX-64-P9-LABEL: test_none_v8i16:
483; CHECK-AIX-64-P9:       # %bb.0: # %entry
484; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
485; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
486; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, v2, vs0, 1
487; CHECK-AIX-64-P9-NEXT:    blr
488;
489; CHECK-AIX-32-P8-LABEL: test_none_v8i16:
490; CHECK-AIX-32-P8:       # %bb.0: # %entry
491; CHECK-AIX-32-P8-NEXT:    sth r3, -16(r1)
492; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
493; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
494; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
495; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, v2, vs0
496; CHECK-AIX-32-P8-NEXT:    blr
497;
498; CHECK-AIX-32-P9-LABEL: test_none_v8i16:
499; CHECK-AIX-32-P9:       # %bb.0: # %entry
500; CHECK-AIX-32-P9-NEXT:    sth r3, -16(r1)
501; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
502; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
503; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, v2, vs0
504; CHECK-AIX-32-P9-NEXT:    blr
505entry:
506  %lhs.tmp = insertelement <8 x i16> undef, i16 %arg1, i32 0
507  %lhs = bitcast <8 x i16> %lhs.tmp to <2 x i64>
508  %rhs = load <2 x i64>, ptr %b, align 4
509  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
510  ret <2 x i64> %shuffle
511}
512
513define <2 x i64> @test_v16i8_v4i32(i8 %arg1, i32 %arg) {
514; CHECK-LE-P8-LABEL: test_v16i8_v4i32:
515; CHECK-LE-P8:       # %bb.0: # %entry
516; CHECK-LE-P8-NEXT:    mtfprd f0, r3
517; CHECK-LE-P8-NEXT:    mtfprwz f1, r4
518; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
519; CHECK-LE-P8-NEXT:    blr
520;
521; CHECK-LE-P9-LABEL: test_v16i8_v4i32:
522; CHECK-LE-P9:       # %bb.0: # %entry
523; CHECK-LE-P9-NEXT:    mtfprd f0, r3
524; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
525; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
526; CHECK-LE-P9-NEXT:    blr
527;
528; CHECK-BE-P8-LABEL: test_v16i8_v4i32:
529; CHECK-BE-P8:       # %bb.0: # %entry
530; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
531; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
532; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
533; CHECK-BE-P8-NEXT:    blr
534;
535; CHECK-BE-P9-LABEL: test_v16i8_v4i32:
536; CHECK-BE-P9:       # %bb.0: # %entry
537; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
538; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
539; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
540; CHECK-BE-P9-NEXT:    blr
541;
542; CHECK-AIX-64-P8-LABEL: test_v16i8_v4i32:
543; CHECK-AIX-64-P8:       # %bb.0: # %entry
544; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
545; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
546; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
547; CHECK-AIX-64-P8-NEXT:    blr
548;
549; CHECK-AIX-64-P9-LABEL: test_v16i8_v4i32:
550; CHECK-AIX-64-P9:       # %bb.0: # %entry
551; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
552; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
553; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
554; CHECK-AIX-64-P9-NEXT:    blr
555;
556; CHECK-AIX-32-P8-LABEL: test_v16i8_v4i32:
557; CHECK-AIX-32-P8:       # %bb.0: # %entry
558; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
559; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
560; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
561; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
562; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
563; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
564; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
565; CHECK-AIX-32-P8-NEXT:    blr
566;
567; CHECK-AIX-32-P9-LABEL: test_v16i8_v4i32:
568; CHECK-AIX-32-P9:       # %bb.0: # %entry
569; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
570; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
571; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
572; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
573; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
574; CHECK-AIX-32-P9-NEXT:    blr
575entry:
576  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
577  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
578  %rhs.tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
579  %rhs = bitcast <4 x i32> %rhs.tmp to <2 x i64>
580  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
581  ret <2 x i64> %shuffle
582}
583
584define <2 x i64> @test_v4i32_v16i8(i8 %arg1, i32 %arg) {
585; CHECK-LE-P8-LABEL: test_v4i32_v16i8:
586; CHECK-LE-P8:       # %bb.0: # %entry
587; CHECK-LE-P8-NEXT:    mtfprd f0, r3
588; CHECK-LE-P8-NEXT:    mtfprwz f1, r4
589; CHECK-LE-P8-NEXT:    xxmrghd v2, vs0, vs1
590; CHECK-LE-P8-NEXT:    blr
591;
592; CHECK-LE-P9-LABEL: test_v4i32_v16i8:
593; CHECK-LE-P9:       # %bb.0: # %entry
594; CHECK-LE-P9-NEXT:    mtfprd f0, r3
595; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
596; CHECK-LE-P9-NEXT:    xxmrghd v2, vs0, vs1
597; CHECK-LE-P9-NEXT:    blr
598;
599; CHECK-BE-P8-LABEL: test_v4i32_v16i8:
600; CHECK-BE-P8:       # %bb.0: # %entry
601; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
602; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
603; CHECK-BE-P8-NEXT:    xxmrgld v2, vs1, vs0
604; CHECK-BE-P8-NEXT:    blr
605;
606; CHECK-BE-P9-LABEL: test_v4i32_v16i8:
607; CHECK-BE-P9:       # %bb.0: # %entry
608; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
609; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
610; CHECK-BE-P9-NEXT:    xxmrgld v2, vs1, vs0
611; CHECK-BE-P9-NEXT:    blr
612;
613; CHECK-AIX-64-P8-LABEL: test_v4i32_v16i8:
614; CHECK-AIX-64-P8:       # %bb.0: # %entry
615; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
616; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
617; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs1, vs0
618; CHECK-AIX-64-P8-NEXT:    blr
619;
620; CHECK-AIX-64-P9-LABEL: test_v4i32_v16i8:
621; CHECK-AIX-64-P9:       # %bb.0: # %entry
622; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
623; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
624; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs1, vs0
625; CHECK-AIX-64-P9-NEXT:    blr
626;
627; CHECK-AIX-32-P8-LABEL: test_v4i32_v16i8:
628; CHECK-AIX-32-P8:       # %bb.0: # %entry
629; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
630; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
631; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
632; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
633; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
634; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
635; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs1, vs0
636; CHECK-AIX-32-P8-NEXT:    blr
637;
638; CHECK-AIX-32-P9-LABEL: test_v4i32_v16i8:
639; CHECK-AIX-32-P9:       # %bb.0: # %entry
640; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
641; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
642; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
643; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
644; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs1, vs0
645; CHECK-AIX-32-P9-NEXT:    blr
646entry:
647  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
648  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
649  %rhs.tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
650  %rhs = bitcast <4 x i32> %rhs.tmp to <2 x i64>
651  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
652  ret <2 x i64> %shuffle
653}
654
655define <2 x i64> @test_none_v4i32(i32 %arg1, ptr nocapture noundef readonly %b) {
656; CHECK-LE-P8-LABEL: test_none_v4i32:
657; CHECK-LE-P8:       # %bb.0: # %entry
658; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
659; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
660; CHECK-LE-P8-NEXT:    mtfprwz f0, r3
661; CHECK-LE-P8-NEXT:    xxpermdi v2, vs0, v2, 1
662; CHECK-LE-P8-NEXT:    blr
663;
664; CHECK-LE-P9-LABEL: test_none_v4i32:
665; CHECK-LE-P9:       # %bb.0: # %entry
666; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
667; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
668; CHECK-LE-P9-NEXT:    xxpermdi v2, vs0, v2, 1
669; CHECK-LE-P9-NEXT:    blr
670;
671; CHECK-BE-P8-LABEL: test_none_v4i32:
672; CHECK-BE-P8:       # %bb.0: # %entry
673; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
674; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
675; CHECK-BE-P8-NEXT:    xxpermdi v2, v2, vs0, 1
676; CHECK-BE-P8-NEXT:    blr
677;
678; CHECK-BE-P9-LABEL: test_none_v4i32:
679; CHECK-BE-P9:       # %bb.0: # %entry
680; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
681; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
682; CHECK-BE-P9-NEXT:    xxpermdi v2, v2, vs0, 1
683; CHECK-BE-P9-NEXT:    blr
684;
685; CHECK-AIX-64-P8-LABEL: test_none_v4i32:
686; CHECK-AIX-64-P8:       # %bb.0: # %entry
687; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
688; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
689; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, v2, vs0, 1
690; CHECK-AIX-64-P8-NEXT:    blr
691;
692; CHECK-AIX-64-P9-LABEL: test_none_v4i32:
693; CHECK-AIX-64-P9:       # %bb.0: # %entry
694; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
695; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
696; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, v2, vs0, 1
697; CHECK-AIX-64-P9-NEXT:    blr
698;
699; CHECK-AIX-32-P8-LABEL: test_none_v4i32:
700; CHECK-AIX-32-P8:       # %bb.0: # %entry
701; CHECK-AIX-32-P8-NEXT:    stw r3, -16(r1)
702; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
703; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
704; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
705; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, v2, vs0
706; CHECK-AIX-32-P8-NEXT:    blr
707;
708; CHECK-AIX-32-P9-LABEL: test_none_v4i32:
709; CHECK-AIX-32-P9:       # %bb.0: # %entry
710; CHECK-AIX-32-P9-NEXT:    stw r3, -16(r1)
711; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
712; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
713; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, v2, vs0
714; CHECK-AIX-32-P9-NEXT:    blr
715entry:
716  %lhs.tmp = insertelement <4 x i32> undef, i32 %arg1, i32 0
717  %lhs = bitcast <4 x i32> %lhs.tmp to <2 x i64>
718  %rhs = load <2 x i64>, ptr %b, align 4
719  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
720  ret <2 x i64> %shuffle
721}
722
723define <2 x i64> @test_v4i32_none(i32 %arg1, ptr nocapture noundef readonly %b) {
724; CHECK-LE-P8-LABEL: test_v4i32_none:
725; CHECK-LE-P8:       # %bb.0: # %entry
726; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r4
727; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
728; CHECK-LE-P8-NEXT:    mtfprwz f0, r3
729; CHECK-LE-P8-NEXT:    xxpermdi v2, v2, vs0, 2
730; CHECK-LE-P8-NEXT:    blr
731;
732; CHECK-LE-P9-LABEL: test_v4i32_none:
733; CHECK-LE-P9:       # %bb.0: # %entry
734; CHECK-LE-P9-NEXT:    lxv v2, 0(r4)
735; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
736; CHECK-LE-P9-NEXT:    xxpermdi v2, v2, vs0, 2
737; CHECK-LE-P9-NEXT:    blr
738;
739; CHECK-BE-P8-LABEL: test_v4i32_none:
740; CHECK-BE-P8:       # %bb.0: # %entry
741; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
742; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r4
743; CHECK-BE-P8-NEXT:    xxpermdi v2, vs0, v2, 2
744; CHECK-BE-P8-NEXT:    blr
745;
746; CHECK-BE-P9-LABEL: test_v4i32_none:
747; CHECK-BE-P9:       # %bb.0: # %entry
748; CHECK-BE-P9-NEXT:    lxv v2, 0(r4)
749; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
750; CHECK-BE-P9-NEXT:    xxpermdi v2, vs0, v2, 2
751; CHECK-BE-P9-NEXT:    blr
752;
753; CHECK-AIX-64-P8-LABEL: test_v4i32_none:
754; CHECK-AIX-64-P8:       # %bb.0: # %entry
755; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
756; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r4
757; CHECK-AIX-64-P8-NEXT:    xxpermdi v2, vs0, v2, 2
758; CHECK-AIX-64-P8-NEXT:    blr
759;
760; CHECK-AIX-64-P9-LABEL: test_v4i32_none:
761; CHECK-AIX-64-P9:       # %bb.0: # %entry
762; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r4)
763; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
764; CHECK-AIX-64-P9-NEXT:    xxpermdi v2, vs0, v2, 2
765; CHECK-AIX-64-P9-NEXT:    blr
766;
767; CHECK-AIX-32-P8-LABEL: test_v4i32_none:
768; CHECK-AIX-32-P8:       # %bb.0: # %entry
769; CHECK-AIX-32-P8-NEXT:    stw r3, -16(r1)
770; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
771; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r4
772; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
773; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, v2
774; CHECK-AIX-32-P8-NEXT:    blr
775;
776; CHECK-AIX-32-P9-LABEL: test_v4i32_none:
777; CHECK-AIX-32-P9:       # %bb.0: # %entry
778; CHECK-AIX-32-P9-NEXT:    stw r3, -16(r1)
779; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
780; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r4)
781; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, v2
782; CHECK-AIX-32-P9-NEXT:    blr
783entry:
784  %lhs.tmp = insertelement <4 x i32> undef, i32 %arg1, i32 0
785  %lhs = bitcast <4 x i32> %lhs.tmp to <2 x i64>
786  %rhs = load <2 x i64>, ptr %b, align 4
787  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
788  ret <2 x i64> %shuffle
789}
790
791define <2 x i64> @test_v16i8_v2i64(i8 %arg1, i64 %arg) {
792; CHECK-LE-P8-LABEL: test_v16i8_v2i64:
793; CHECK-LE-P8:       # %bb.0: # %entry
794; CHECK-LE-P8-NEXT:    mtfprd f0, r3
795; CHECK-LE-P8-NEXT:    mtfprd f1, r4
796; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
797; CHECK-LE-P8-NEXT:    blr
798;
799; CHECK-LE-P9-LABEL: test_v16i8_v2i64:
800; CHECK-LE-P9:       # %bb.0: # %entry
801; CHECK-LE-P9-NEXT:    mtfprd f0, r3
802; CHECK-LE-P9-NEXT:    mtfprd f1, r4
803; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
804; CHECK-LE-P9-NEXT:    blr
805;
806; CHECK-BE-P8-LABEL: test_v16i8_v2i64:
807; CHECK-BE-P8:       # %bb.0: # %entry
808; CHECK-BE-P8-NEXT:    sldi r3, r3, 56
809; CHECK-BE-P8-NEXT:    mtfprd f1, r4
810; CHECK-BE-P8-NEXT:    mtfprd f0, r3
811; CHECK-BE-P8-NEXT:    xxmrghd v2, vs0, vs1
812; CHECK-BE-P8-NEXT:    blr
813;
814; CHECK-BE-P9-LABEL: test_v16i8_v2i64:
815; CHECK-BE-P9:       # %bb.0: # %entry
816; CHECK-BE-P9-NEXT:    sldi r3, r3, 56
817; CHECK-BE-P9-NEXT:    mtfprd f1, r4
818; CHECK-BE-P9-NEXT:    mtfprd f0, r3
819; CHECK-BE-P9-NEXT:    xxmrghd v2, vs0, vs1
820; CHECK-BE-P9-NEXT:    blr
821;
822; CHECK-AIX-64-P8-LABEL: test_v16i8_v2i64:
823; CHECK-AIX-64-P8:       # %bb.0: # %entry
824; CHECK-AIX-64-P8-NEXT:    sldi r3, r3, 56
825; CHECK-AIX-64-P8-NEXT:    mtfprd f1, r4
826; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r3
827; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs1
828; CHECK-AIX-64-P8-NEXT:    blr
829;
830; CHECK-AIX-64-P9-LABEL: test_v16i8_v2i64:
831; CHECK-AIX-64-P9:       # %bb.0: # %entry
832; CHECK-AIX-64-P9-NEXT:    sldi r3, r3, 56
833; CHECK-AIX-64-P9-NEXT:    mtfprd f1, r4
834; CHECK-AIX-64-P9-NEXT:    mtfprd f0, r3
835; CHECK-AIX-64-P9-NEXT:    xxmrghd v2, vs0, vs1
836; CHECK-AIX-64-P9-NEXT:    blr
837;
838; CHECK-AIX-32-P8-LABEL: test_v16i8_v2i64:
839; CHECK-AIX-32-P8:       # %bb.0: # %entry
840; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
841; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
842; CHECK-AIX-32-P8-NEXT:    lxvw4x v2, 0, r3
843; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C0(r2) # %const.0
844; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
845; CHECK-AIX-32-P8-NEXT:    stw r5, -48(r1)
846; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
847; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
848; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
849; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C1(r2) # %const.1
850; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
851; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
852; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -48
853; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
854; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
855; CHECK-AIX-32-P8-NEXT:    blr
856;
857; CHECK-AIX-32-P9-LABEL: test_v16i8_v2i64:
858; CHECK-AIX-32-P9:       # %bb.0: # %entry
859; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
860; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r4
861; CHECK-AIX-32-P9-NEXT:    lxv v2, -16(r1)
862; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 8
863; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r5
864; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 12
865; CHECK-AIX-32-P9-NEXT:    blr
866entry:
867  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
868  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
869  %rhs.tmp = insertelement <2 x i64> undef, i64 %arg, i32 0
870  %rhs = bitcast <2 x i64> %rhs.tmp to <2 x i64>
871  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
872  ret <2 x i64> %shuffle
873}
874
875define <2 x i64> @test_v2i64_v16i8(i8 %arg1, i64 %arg) {
876; CHECK-LE-P8-LABEL: test_v2i64_v16i8:
877; CHECK-LE-P8:       # %bb.0: # %entry
878; CHECK-LE-P8-NEXT:    mtfprd f0, r3
879; CHECK-LE-P8-NEXT:    mtfprd f1, r4
880; CHECK-LE-P8-NEXT:    xxmrghd v2, vs0, vs1
881; CHECK-LE-P8-NEXT:    blr
882;
883; CHECK-LE-P9-LABEL: test_v2i64_v16i8:
884; CHECK-LE-P9:       # %bb.0: # %entry
885; CHECK-LE-P9-NEXT:    mtfprd f0, r3
886; CHECK-LE-P9-NEXT:    mtfprd f1, r4
887; CHECK-LE-P9-NEXT:    xxmrghd v2, vs0, vs1
888; CHECK-LE-P9-NEXT:    blr
889;
890; CHECK-BE-P8-LABEL: test_v2i64_v16i8:
891; CHECK-BE-P8:       # %bb.0: # %entry
892; CHECK-BE-P8-NEXT:    mtfprd f0, r4
893; CHECK-BE-P8-NEXT:    xxspltd v2, vs0, 0
894; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
895; CHECK-BE-P8-NEXT:    xxmrgld v2, v2, vs0
896; CHECK-BE-P8-NEXT:    blr
897;
898; CHECK-BE-P9-LABEL: test_v2i64_v16i8:
899; CHECK-BE-P9:       # %bb.0: # %entry
900; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
901; CHECK-BE-P9-NEXT:    mtvsrdd v2, r4, r4
902; CHECK-BE-P9-NEXT:    xxmrgld v2, v2, vs0
903; CHECK-BE-P9-NEXT:    blr
904;
905; CHECK-AIX-64-P8-LABEL: test_v2i64_v16i8:
906; CHECK-AIX-64-P8:       # %bb.0: # %entry
907; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
908; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs0
909; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
910; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, v2, vs0
911; CHECK-AIX-64-P8-NEXT:    blr
912;
913; CHECK-AIX-64-P9-LABEL: test_v2i64_v16i8:
914; CHECK-AIX-64-P9:       # %bb.0: # %entry
915; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
916; CHECK-AIX-64-P9-NEXT:    mtvsrdd v2, r4, r4
917; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, v2, vs0
918; CHECK-AIX-64-P9-NEXT:    blr
919;
920; CHECK-AIX-32-P8-LABEL: test_v2i64_v16i8:
921; CHECK-AIX-32-P8:       # %bb.0: # %entry
922; CHECK-AIX-32-P8-NEXT:    stb r3, -16(r1)
923; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
924; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
925; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
926; CHECK-AIX-32-P8-NEXT:    stw r5, -32(r1)
927; CHECK-AIX-32-P8-NEXT:    stw r4, -48(r1)
928; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
929; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -48
930; CHECK-AIX-32-P8-NEXT:    lxvw4x vs2, 0, r3
931; CHECK-AIX-32-P8-NEXT:    xxmrghw vs1, vs2, vs1
932; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs1, vs0
933; CHECK-AIX-32-P8-NEXT:    blr
934;
935; CHECK-AIX-32-P9-LABEL: test_v2i64_v16i8:
936; CHECK-AIX-32-P9:       # %bb.0: # %entry
937; CHECK-AIX-32-P9-NEXT:    stw r5, -32(r1)
938; CHECK-AIX-32-P9-NEXT:    stw r4, -48(r1)
939; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
940; CHECK-AIX-32-P9-NEXT:    lxv vs2, -48(r1)
941; CHECK-AIX-32-P9-NEXT:    stb r3, -16(r1)
942; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
943; CHECK-AIX-32-P9-NEXT:    xxmrghw vs1, vs2, vs1
944; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs1, vs0
945; CHECK-AIX-32-P9-NEXT:    blr
946entry:
947  %lhs.tmp = insertelement <16 x i8> undef, i8 %arg1, i32 0
948  %lhs = bitcast <16 x i8> %lhs.tmp to <2 x i64>
949  %rhs.tmp = insertelement <2 x i64> undef, i64 %arg, i32 0
950  %rhs = bitcast <2 x i64> %rhs.tmp to <2 x i64>
951  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
952  ret <2 x i64> %shuffle
953}
954
955define <2 x i64> @test_none_v2i64(ptr nocapture noundef readonly %b, i64 %arg) {
956; CHECK-LE-P8-LABEL: test_none_v2i64:
957; CHECK-LE-P8:       # %bb.0: # %entry
958; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
959; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
960; CHECK-LE-P8-NEXT:    mtfprd f0, r4
961; CHECK-LE-P8-NEXT:    xxpermdi v2, vs0, v2, 1
962; CHECK-LE-P8-NEXT:    blr
963;
964; CHECK-LE-P9-LABEL: test_none_v2i64:
965; CHECK-LE-P9:       # %bb.0: # %entry
966; CHECK-LE-P9-NEXT:    lxv v2, 0(r3)
967; CHECK-LE-P9-NEXT:    mtfprd f0, r4
968; CHECK-LE-P9-NEXT:    xxpermdi v2, vs0, v2, 1
969; CHECK-LE-P9-NEXT:    blr
970;
971; CHECK-BE-P8-LABEL: test_none_v2i64:
972; CHECK-BE-P8:       # %bb.0: # %entry
973; CHECK-BE-P8-NEXT:    lxvd2x v2, 0, r3
974; CHECK-BE-P8-NEXT:    mtfprd f0, r4
975; CHECK-BE-P8-NEXT:    xxmrghd v2, v2, vs0
976; CHECK-BE-P8-NEXT:    blr
977;
978; CHECK-BE-P9-LABEL: test_none_v2i64:
979; CHECK-BE-P9:       # %bb.0: # %entry
980; CHECK-BE-P9-NEXT:    lxv v2, 0(r3)
981; CHECK-BE-P9-NEXT:    mtfprd f0, r4
982; CHECK-BE-P9-NEXT:    xxmrghd v2, v2, vs0
983; CHECK-BE-P9-NEXT:    blr
984;
985; CHECK-AIX-64-P8-LABEL: test_none_v2i64:
986; CHECK-AIX-64-P8:       # %bb.0: # %entry
987; CHECK-AIX-64-P8-NEXT:    lxvd2x v2, 0, r3
988; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
989; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, v2, vs0
990; CHECK-AIX-64-P8-NEXT:    blr
991;
992; CHECK-AIX-64-P9-LABEL: test_none_v2i64:
993; CHECK-AIX-64-P9:       # %bb.0: # %entry
994; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r3)
995; CHECK-AIX-64-P9-NEXT:    mtfprd f0, r4
996; CHECK-AIX-64-P9-NEXT:    xxmrghd v2, v2, vs0
997; CHECK-AIX-64-P9-NEXT:    blr
998;
999; CHECK-AIX-32-P8-LABEL: test_none_v2i64:
1000; CHECK-AIX-32-P8:       # %bb.0: # %entry
1001; CHECK-AIX-32-P8-NEXT:    stw r4, -16(r1)
1002; CHECK-AIX-32-P8-NEXT:    stw r5, -32(r1)
1003; CHECK-AIX-32-P8-NEXT:    lwz r4, L..C2(r2) # %const.0
1004; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
1005; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1006; CHECK-AIX-32-P8-NEXT:    lxvw4x v2, 0, r4
1007; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1008; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C3(r2) # %const.1
1009; CHECK-AIX-32-P8-NEXT:    vperm v2, v3, v4, v2
1010; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
1011; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1012; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1013; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
1014; CHECK-AIX-32-P8-NEXT:    blr
1015;
1016; CHECK-AIX-32-P9-LABEL: test_none_v2i64:
1017; CHECK-AIX-32-P9:       # %bb.0: # %entry
1018; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r3)
1019; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r4
1020; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 8
1021; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r5
1022; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 12
1023; CHECK-AIX-32-P9-NEXT:    blr
1024entry:
1025  %lhs = load <2 x i64>, ptr %b, align 4
1026  %rhs = insertelement <2 x i64> undef, i64 %arg, i32 0
1027  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1028  ret <2 x i64> %shuffle
1029}
1030
1031define <2 x i64> @test_v2i64_none(ptr nocapture noundef readonly %b, i64 %arg) {
1032; CHECK-LE-P8-LABEL: test_v2i64_none:
1033; CHECK-LE-P8:       # %bb.0: # %entry
1034; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
1035; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
1036; CHECK-LE-P8-NEXT:    mtfprd f0, r4
1037; CHECK-LE-P8-NEXT:    xxpermdi v2, v2, vs0, 2
1038; CHECK-LE-P8-NEXT:    blr
1039;
1040; CHECK-LE-P9-LABEL: test_v2i64_none:
1041; CHECK-LE-P9:       # %bb.0: # %entry
1042; CHECK-LE-P9-NEXT:    lxv v2, 0(r3)
1043; CHECK-LE-P9-NEXT:    mtfprd f0, r4
1044; CHECK-LE-P9-NEXT:    xxpermdi v2, v2, vs0, 2
1045; CHECK-LE-P9-NEXT:    blr
1046;
1047; CHECK-BE-P8-LABEL: test_v2i64_none:
1048; CHECK-BE-P8:       # %bb.0: # %entry
1049; CHECK-BE-P8-NEXT:    mtfprd f0, r4
1050; CHECK-BE-P8-NEXT:    lxvd2x v3, 0, r3
1051; CHECK-BE-P8-NEXT:    xxspltd v2, vs0, 0
1052; CHECK-BE-P8-NEXT:    xxmrghd v2, v2, v3
1053; CHECK-BE-P8-NEXT:    blr
1054;
1055; CHECK-BE-P9-LABEL: test_v2i64_none:
1056; CHECK-BE-P9:       # %bb.0: # %entry
1057; CHECK-BE-P9-NEXT:    lxv v2, 0(r3)
1058; CHECK-BE-P9-NEXT:    mtvsrdd v3, r4, r4
1059; CHECK-BE-P9-NEXT:    xxmrghd v2, v3, v2
1060; CHECK-BE-P9-NEXT:    blr
1061;
1062; CHECK-AIX-64-P8-LABEL: test_v2i64_none:
1063; CHECK-AIX-64-P8:       # %bb.0: # %entry
1064; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r4
1065; CHECK-AIX-64-P8-NEXT:    lxvd2x v3, 0, r3
1066; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs0
1067; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, v2, v3
1068; CHECK-AIX-64-P8-NEXT:    blr
1069;
1070; CHECK-AIX-64-P9-LABEL: test_v2i64_none:
1071; CHECK-AIX-64-P9:       # %bb.0: # %entry
1072; CHECK-AIX-64-P9-NEXT:    lxv v2, 0(r3)
1073; CHECK-AIX-64-P9-NEXT:    mtvsrdd v3, r4, r4
1074; CHECK-AIX-64-P9-NEXT:    xxmrghd v2, v3, v2
1075; CHECK-AIX-64-P9-NEXT:    blr
1076;
1077; CHECK-AIX-32-P8-LABEL: test_v2i64_none:
1078; CHECK-AIX-32-P8:       # %bb.0: # %entry
1079; CHECK-AIX-32-P8-NEXT:    lxvd2x v2, 0, r3
1080; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1081; CHECK-AIX-32-P8-NEXT:    stw r5, -16(r1)
1082; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
1083; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1084; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1085; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1086; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs1, vs0
1087; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, v2
1088; CHECK-AIX-32-P8-NEXT:    blr
1089;
1090; CHECK-AIX-32-P9-LABEL: test_v2i64_none:
1091; CHECK-AIX-32-P9:       # %bb.0: # %entry
1092; CHECK-AIX-32-P9-NEXT:    lxv v2, 0(r3)
1093; CHECK-AIX-32-P9-NEXT:    stw r5, -16(r1)
1094; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
1095; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
1096; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
1097; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1098; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, v2
1099; CHECK-AIX-32-P9-NEXT:    blr
1100entry:
1101  %lhs = load <2 x i64>, ptr %b, align 4
1102  %rhs = insertelement <2 x i64> undef, i64 %arg, i32 0
1103  %shuffle = shufflevector <2 x i64> %rhs, <2 x i64> %lhs, <2 x i32> <i32 0, i32 2>
1104  ret <2 x i64> %shuffle
1105}
1106
1107define <2 x i64> @test_v8i16_v8i16(i16 %arg1, i16 %arg) {
1108; CHECK-LE-P8-LABEL: test_v8i16_v8i16:
1109; CHECK-LE-P8:       # %bb.0: # %entry
1110; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1111; CHECK-LE-P8-NEXT:    mtfprd f1, r4
1112; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1113; CHECK-LE-P8-NEXT:    blr
1114;
1115; CHECK-LE-P9-LABEL: test_v8i16_v8i16:
1116; CHECK-LE-P9:       # %bb.0: # %entry
1117; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1118; CHECK-LE-P9-NEXT:    mtfprd f1, r4
1119; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1120; CHECK-LE-P9-NEXT:    blr
1121;
1122; CHECK-BE-P8-LABEL: test_v8i16_v8i16:
1123; CHECK-BE-P8:       # %bb.0: # %entry
1124; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
1125; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
1126; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
1127; CHECK-BE-P8-NEXT:    blr
1128;
1129; CHECK-BE-P9-LABEL: test_v8i16_v8i16:
1130; CHECK-BE-P9:       # %bb.0: # %entry
1131; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
1132; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
1133; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
1134; CHECK-BE-P9-NEXT:    blr
1135;
1136; CHECK-AIX-64-P8-LABEL: test_v8i16_v8i16:
1137; CHECK-AIX-64-P8:       # %bb.0: # %entry
1138; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
1139; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
1140; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
1141; CHECK-AIX-64-P8-NEXT:    blr
1142;
1143; CHECK-AIX-64-P9-LABEL: test_v8i16_v8i16:
1144; CHECK-AIX-64-P9:       # %bb.0: # %entry
1145; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
1146; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
1147; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
1148; CHECK-AIX-64-P9-NEXT:    blr
1149;
1150; CHECK-AIX-32-P8-LABEL: test_v8i16_v8i16:
1151; CHECK-AIX-32-P8:       # %bb.0: # %entry
1152; CHECK-AIX-32-P8-NEXT:    sth r3, -16(r1)
1153; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1154; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1155; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1156; CHECK-AIX-32-P8-NEXT:    sth r4, -32(r1)
1157; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1158; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
1159; CHECK-AIX-32-P8-NEXT:    blr
1160;
1161; CHECK-AIX-32-P9-LABEL: test_v8i16_v8i16:
1162; CHECK-AIX-32-P9:       # %bb.0: # %entry
1163; CHECK-AIX-32-P9-NEXT:    sth r3, -16(r1)
1164; CHECK-AIX-32-P9-NEXT:    sth r4, -32(r1)
1165; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
1166; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
1167; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
1168; CHECK-AIX-32-P9-NEXT:    blr
1169entry:
1170  %lhs.tmp = insertelement <8 x i16> undef, i16 %arg1, i32 0
1171  %lhs = bitcast <8 x i16> %lhs.tmp to <2 x i64>
1172  %rhs.tmp = insertelement <8 x i16> undef, i16 %arg, i32 0
1173  %rhs = bitcast <8 x i16> %rhs.tmp to <2 x i64>
1174  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1175  ret <2 x i64> %shuffle
1176}
1177
1178define <2 x i64> @test_v8i16_v4i32(i16 %arg1, i32 %arg) {
1179; CHECK-LE-P8-LABEL: test_v8i16_v4i32:
1180; CHECK-LE-P8:       # %bb.0: # %entry
1181; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1182; CHECK-LE-P8-NEXT:    mtfprwz f1, r4
1183; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1184; CHECK-LE-P8-NEXT:    blr
1185;
1186; CHECK-LE-P9-LABEL: test_v8i16_v4i32:
1187; CHECK-LE-P9:       # %bb.0: # %entry
1188; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1189; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
1190; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1191; CHECK-LE-P9-NEXT:    blr
1192;
1193; CHECK-BE-P8-LABEL: test_v8i16_v4i32:
1194; CHECK-BE-P8:       # %bb.0: # %entry
1195; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
1196; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
1197; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
1198; CHECK-BE-P8-NEXT:    blr
1199;
1200; CHECK-BE-P9-LABEL: test_v8i16_v4i32:
1201; CHECK-BE-P9:       # %bb.0: # %entry
1202; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
1203; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
1204; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
1205; CHECK-BE-P9-NEXT:    blr
1206;
1207; CHECK-AIX-64-P8-LABEL: test_v8i16_v4i32:
1208; CHECK-AIX-64-P8:       # %bb.0: # %entry
1209; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
1210; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
1211; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
1212; CHECK-AIX-64-P8-NEXT:    blr
1213;
1214; CHECK-AIX-64-P9-LABEL: test_v8i16_v4i32:
1215; CHECK-AIX-64-P9:       # %bb.0: # %entry
1216; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
1217; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
1218; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
1219; CHECK-AIX-64-P9-NEXT:    blr
1220;
1221; CHECK-AIX-32-P8-LABEL: test_v8i16_v4i32:
1222; CHECK-AIX-32-P8:       # %bb.0: # %entry
1223; CHECK-AIX-32-P8-NEXT:    sth r3, -16(r1)
1224; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1225; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1226; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1227; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
1228; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1229; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
1230; CHECK-AIX-32-P8-NEXT:    blr
1231;
1232; CHECK-AIX-32-P9-LABEL: test_v8i16_v4i32:
1233; CHECK-AIX-32-P9:       # %bb.0: # %entry
1234; CHECK-AIX-32-P9-NEXT:    sth r3, -16(r1)
1235; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
1236; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
1237; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
1238; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
1239; CHECK-AIX-32-P9-NEXT:    blr
1240entry:
1241  %lhs.tmp = insertelement <8 x i16> undef, i16 %arg1, i32 0
1242  %lhs = bitcast <8 x i16> %lhs.tmp to <2 x i64>
1243  %rhs.tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
1244  %rhs = bitcast <4 x i32> %rhs.tmp to <2 x i64>
1245  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1246  ret <2 x i64> %shuffle
1247}
1248
1249define <2 x i64> @test_v8i16_v2i64(i16 %arg1, i64 %arg) {
1250; CHECK-LE-P8-LABEL: test_v8i16_v2i64:
1251; CHECK-LE-P8:       # %bb.0: # %entry
1252; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1253; CHECK-LE-P8-NEXT:    mtfprd f1, r4
1254; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1255; CHECK-LE-P8-NEXT:    blr
1256;
1257; CHECK-LE-P9-LABEL: test_v8i16_v2i64:
1258; CHECK-LE-P9:       # %bb.0: # %entry
1259; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1260; CHECK-LE-P9-NEXT:    mtfprd f1, r4
1261; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1262; CHECK-LE-P9-NEXT:    blr
1263;
1264; CHECK-BE-P8-LABEL: test_v8i16_v2i64:
1265; CHECK-BE-P8:       # %bb.0: # %entry
1266; CHECK-BE-P8-NEXT:    sldi r3, r3, 48
1267; CHECK-BE-P8-NEXT:    mtfprd f1, r4
1268; CHECK-BE-P8-NEXT:    mtfprd f0, r3
1269; CHECK-BE-P8-NEXT:    xxmrghd v2, vs0, vs1
1270; CHECK-BE-P8-NEXT:    blr
1271;
1272; CHECK-BE-P9-LABEL: test_v8i16_v2i64:
1273; CHECK-BE-P9:       # %bb.0: # %entry
1274; CHECK-BE-P9-NEXT:    sldi r3, r3, 48
1275; CHECK-BE-P9-NEXT:    mtfprd f1, r4
1276; CHECK-BE-P9-NEXT:    mtfprd f0, r3
1277; CHECK-BE-P9-NEXT:    xxmrghd v2, vs0, vs1
1278; CHECK-BE-P9-NEXT:    blr
1279;
1280; CHECK-AIX-64-P8-LABEL: test_v8i16_v2i64:
1281; CHECK-AIX-64-P8:       # %bb.0: # %entry
1282; CHECK-AIX-64-P8-NEXT:    sldi r3, r3, 48
1283; CHECK-AIX-64-P8-NEXT:    mtfprd f1, r4
1284; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r3
1285; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs1
1286; CHECK-AIX-64-P8-NEXT:    blr
1287;
1288; CHECK-AIX-64-P9-LABEL: test_v8i16_v2i64:
1289; CHECK-AIX-64-P9:       # %bb.0: # %entry
1290; CHECK-AIX-64-P9-NEXT:    sldi r3, r3, 48
1291; CHECK-AIX-64-P9-NEXT:    mtfprd f1, r4
1292; CHECK-AIX-64-P9-NEXT:    mtfprd f0, r3
1293; CHECK-AIX-64-P9-NEXT:    xxmrghd v2, vs0, vs1
1294; CHECK-AIX-64-P9-NEXT:    blr
1295;
1296; CHECK-AIX-32-P8-LABEL: test_v8i16_v2i64:
1297; CHECK-AIX-32-P8:       # %bb.0: # %entry
1298; CHECK-AIX-32-P8-NEXT:    sth r3, -16(r1)
1299; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1300; CHECK-AIX-32-P8-NEXT:    lxvw4x v2, 0, r3
1301; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C4(r2) # %const.0
1302; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
1303; CHECK-AIX-32-P8-NEXT:    stw r5, -48(r1)
1304; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
1305; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1306; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1307; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C5(r2) # %const.1
1308; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
1309; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
1310; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -48
1311; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1312; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
1313; CHECK-AIX-32-P8-NEXT:    blr
1314;
1315; CHECK-AIX-32-P9-LABEL: test_v8i16_v2i64:
1316; CHECK-AIX-32-P9:       # %bb.0: # %entry
1317; CHECK-AIX-32-P9-NEXT:    sth r3, -16(r1)
1318; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r4
1319; CHECK-AIX-32-P9-NEXT:    lxv v2, -16(r1)
1320; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 8
1321; CHECK-AIX-32-P9-NEXT:    mtfprwz f0, r5
1322; CHECK-AIX-32-P9-NEXT:    xxinsertw v2, vs0, 12
1323; CHECK-AIX-32-P9-NEXT:    blr
1324entry:
1325  %lhs.tmp = insertelement <8 x i16> undef, i16 %arg1, i32 0
1326  %lhs = bitcast <8 x i16> %lhs.tmp to <2 x i64>
1327  %rhs.tmp = insertelement <2 x i64> undef, i64 %arg, i32 0
1328  %rhs = bitcast <2 x i64> %rhs.tmp to <2 x i64>
1329  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1330  ret <2 x i64> %shuffle
1331}
1332
1333define <2 x i64> @test_v4i32_v4i32(i32 %arg1, i32 %arg) {
1334; CHECK-LE-P8-LABEL: test_v4i32_v4i32:
1335; CHECK-LE-P8:       # %bb.0: # %entry
1336; CHECK-LE-P8-NEXT:    mtfprwz f0, r3
1337; CHECK-LE-P8-NEXT:    mtfprwz f1, r4
1338; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1339; CHECK-LE-P8-NEXT:    blr
1340;
1341; CHECK-LE-P9-LABEL: test_v4i32_v4i32:
1342; CHECK-LE-P9:       # %bb.0: # %entry
1343; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
1344; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
1345; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1346; CHECK-LE-P9-NEXT:    blr
1347;
1348; CHECK-BE-P8-LABEL: test_v4i32_v4i32:
1349; CHECK-BE-P8:       # %bb.0: # %entry
1350; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
1351; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
1352; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
1353; CHECK-BE-P8-NEXT:    blr
1354;
1355; CHECK-BE-P9-LABEL: test_v4i32_v4i32:
1356; CHECK-BE-P9:       # %bb.0: # %entry
1357; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
1358; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
1359; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
1360; CHECK-BE-P9-NEXT:    blr
1361;
1362; CHECK-AIX-64-P8-LABEL: test_v4i32_v4i32:
1363; CHECK-AIX-64-P8:       # %bb.0: # %entry
1364; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
1365; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
1366; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
1367; CHECK-AIX-64-P8-NEXT:    blr
1368;
1369; CHECK-AIX-64-P9-LABEL: test_v4i32_v4i32:
1370; CHECK-AIX-64-P9:       # %bb.0: # %entry
1371; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
1372; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
1373; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
1374; CHECK-AIX-64-P9-NEXT:    blr
1375;
1376; CHECK-AIX-32-P8-LABEL: test_v4i32_v4i32:
1377; CHECK-AIX-32-P8:       # %bb.0: # %entry
1378; CHECK-AIX-32-P8-NEXT:    stw r3, -16(r1)
1379; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1380; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1381; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1382; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
1383; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1384; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
1385; CHECK-AIX-32-P8-NEXT:    blr
1386;
1387; CHECK-AIX-32-P9-LABEL: test_v4i32_v4i32:
1388; CHECK-AIX-32-P9:       # %bb.0: # %entry
1389; CHECK-AIX-32-P9-NEXT:    stw r3, -16(r1)
1390; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
1391; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
1392; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
1393; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
1394; CHECK-AIX-32-P9-NEXT:    blr
1395entry:
1396  %lhs.tmp = insertelement <4 x i32> undef, i32 %arg1, i32 0
1397  %lhs = bitcast <4 x i32> %lhs.tmp to <2 x i64>
1398  %rhs.tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
1399  %rhs = bitcast <4 x i32> %rhs.tmp to <2 x i64>
1400  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1401  ret <2 x i64> %shuffle
1402}
1403
1404define <2 x i64> @test_v4i32_v8i16(i32 %arg1, i16 %arg) {
1405; CHECK-LE-P8-LABEL: test_v4i32_v8i16:
1406; CHECK-LE-P8:       # %bb.0: # %entry
1407; CHECK-LE-P8-NEXT:    mtfprwz f0, r3
1408; CHECK-LE-P8-NEXT:    mtfprd f1, r4
1409; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1410; CHECK-LE-P8-NEXT:    blr
1411;
1412; CHECK-LE-P9-LABEL: test_v4i32_v8i16:
1413; CHECK-LE-P9:       # %bb.0: # %entry
1414; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
1415; CHECK-LE-P9-NEXT:    mtfprd f1, r4
1416; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1417; CHECK-LE-P9-NEXT:    blr
1418;
1419; CHECK-BE-P8-LABEL: test_v4i32_v8i16:
1420; CHECK-BE-P8:       # %bb.0: # %entry
1421; CHECK-BE-P8-NEXT:    mtfprwz f0, r3
1422; CHECK-BE-P8-NEXT:    mtfprwz f1, r4
1423; CHECK-BE-P8-NEXT:    xxmrgld v2, vs0, vs1
1424; CHECK-BE-P8-NEXT:    blr
1425;
1426; CHECK-BE-P9-LABEL: test_v4i32_v8i16:
1427; CHECK-BE-P9:       # %bb.0: # %entry
1428; CHECK-BE-P9-NEXT:    mtfprwz f0, r3
1429; CHECK-BE-P9-NEXT:    mtfprwz f1, r4
1430; CHECK-BE-P9-NEXT:    xxmrgld v2, vs0, vs1
1431; CHECK-BE-P9-NEXT:    blr
1432;
1433; CHECK-AIX-64-P8-LABEL: test_v4i32_v8i16:
1434; CHECK-AIX-64-P8:       # %bb.0: # %entry
1435; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r3
1436; CHECK-AIX-64-P8-NEXT:    mtfprwz f1, r4
1437; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, vs0, vs1
1438; CHECK-AIX-64-P8-NEXT:    blr
1439;
1440; CHECK-AIX-64-P9-LABEL: test_v4i32_v8i16:
1441; CHECK-AIX-64-P9:       # %bb.0: # %entry
1442; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r3
1443; CHECK-AIX-64-P9-NEXT:    mtfprwz f1, r4
1444; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, vs0, vs1
1445; CHECK-AIX-64-P9-NEXT:    blr
1446;
1447; CHECK-AIX-32-P8-LABEL: test_v4i32_v8i16:
1448; CHECK-AIX-32-P8:       # %bb.0: # %entry
1449; CHECK-AIX-32-P8-NEXT:    stw r3, -16(r1)
1450; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1451; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1452; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1453; CHECK-AIX-32-P8-NEXT:    sth r4, -32(r1)
1454; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1455; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs0, vs1
1456; CHECK-AIX-32-P8-NEXT:    blr
1457;
1458; CHECK-AIX-32-P9-LABEL: test_v4i32_v8i16:
1459; CHECK-AIX-32-P9:       # %bb.0: # %entry
1460; CHECK-AIX-32-P9-NEXT:    stw r3, -16(r1)
1461; CHECK-AIX-32-P9-NEXT:    sth r4, -32(r1)
1462; CHECK-AIX-32-P9-NEXT:    lxv vs0, -16(r1)
1463; CHECK-AIX-32-P9-NEXT:    lxv vs1, -32(r1)
1464; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs0, vs1
1465; CHECK-AIX-32-P9-NEXT:    blr
1466entry:
1467  %lhs.tmp = insertelement <4 x i32> undef, i32 %arg1, i32 0
1468  %lhs = bitcast <4 x i32> %lhs.tmp to <2 x i64>
1469  %rhs.tmp = insertelement <8 x i16> undef, i16 %arg, i32 0
1470  %rhs = bitcast <8 x i16> %rhs.tmp to <2 x i64>
1471  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1472  ret <2 x i64> %shuffle
1473}
1474
1475define <2 x i64> @test_v4i32_v2i64(i32 %arg1, i64 %arg) {
1476; CHECK-LE-P8-LABEL: test_v4i32_v2i64:
1477; CHECK-LE-P8:       # %bb.0: # %entry
1478; CHECK-LE-P8-NEXT:    mtfprwz f0, r3
1479; CHECK-LE-P8-NEXT:    mtfprd f1, r4
1480; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1481; CHECK-LE-P8-NEXT:    blr
1482;
1483; CHECK-LE-P9-LABEL: test_v4i32_v2i64:
1484; CHECK-LE-P9:       # %bb.0: # %entry
1485; CHECK-LE-P9-NEXT:    mtfprwz f0, r3
1486; CHECK-LE-P9-NEXT:    mtfprd f1, r4
1487; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1488; CHECK-LE-P9-NEXT:    blr
1489;
1490; CHECK-BE-P8-LABEL: test_v4i32_v2i64:
1491; CHECK-BE-P8:       # %bb.0: # %entry
1492; CHECK-BE-P8-NEXT:    sldi r3, r3, 32
1493; CHECK-BE-P8-NEXT:    mtfprd f1, r4
1494; CHECK-BE-P8-NEXT:    mtfprd f0, r3
1495; CHECK-BE-P8-NEXT:    xxmrghd v2, vs0, vs1
1496; CHECK-BE-P8-NEXT:    blr
1497;
1498; CHECK-BE-P9-LABEL: test_v4i32_v2i64:
1499; CHECK-BE-P9:       # %bb.0: # %entry
1500; CHECK-BE-P9-NEXT:    mtvsrws vs0, r3
1501; CHECK-BE-P9-NEXT:    mtfprd f1, r4
1502; CHECK-BE-P9-NEXT:    xxmrghd v2, vs0, vs1
1503; CHECK-BE-P9-NEXT:    blr
1504;
1505; CHECK-AIX-64-P8-LABEL: test_v4i32_v2i64:
1506; CHECK-AIX-64-P8:       # %bb.0: # %entry
1507; CHECK-AIX-64-P8-NEXT:    sldi r3, r3, 32
1508; CHECK-AIX-64-P8-NEXT:    mtfprd f1, r4
1509; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r3
1510; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs1
1511; CHECK-AIX-64-P8-NEXT:    blr
1512;
1513; CHECK-AIX-64-P9-LABEL: test_v4i32_v2i64:
1514; CHECK-AIX-64-P9:       # %bb.0: # %entry
1515; CHECK-AIX-64-P9-NEXT:    mtvsrws vs0, r3
1516; CHECK-AIX-64-P9-NEXT:    mtfprd f1, r4
1517; CHECK-AIX-64-P9-NEXT:    xxmrghd v2, vs0, vs1
1518; CHECK-AIX-64-P9-NEXT:    blr
1519;
1520; CHECK-AIX-32-P8-LABEL: test_v4i32_v2i64:
1521; CHECK-AIX-32-P8:       # %bb.0: # %entry
1522; CHECK-AIX-32-P8-NEXT:    stw r3, -48(r1)
1523; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1524; CHECK-AIX-32-P8-NEXT:    stw r4, -32(r1)
1525; CHECK-AIX-32-P8-NEXT:    stw r5, -16(r1)
1526; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r3
1527; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -48
1528; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1529; CHECK-AIX-32-P8-NEXT:    lwz r3, L..C6(r2) # %const.0
1530; CHECK-AIX-32-P8-NEXT:    lxvw4x v3, 0, r3
1531; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1532; CHECK-AIX-32-P8-NEXT:    lxvw4x v4, 0, r3
1533; CHECK-AIX-32-P8-NEXT:    xxmrghw v2, vs1, vs0
1534; CHECK-AIX-32-P8-NEXT:    vperm v2, v2, v4, v3
1535; CHECK-AIX-32-P8-NEXT:    blr
1536;
1537; CHECK-AIX-32-P9-LABEL: test_v4i32_v2i64:
1538; CHECK-AIX-32-P9:       # %bb.0: # %entry
1539; CHECK-AIX-32-P9-NEXT:    stw r4, -32(r1)
1540; CHECK-AIX-32-P9-NEXT:    stw r3, -48(r1)
1541; CHECK-AIX-32-P9-NEXT:    lwz r3, L..C0(r2) # %const.0
1542; CHECK-AIX-32-P9-NEXT:    lxv vs0, -32(r1)
1543; CHECK-AIX-32-P9-NEXT:    lxv vs1, -48(r1)
1544; CHECK-AIX-32-P9-NEXT:    stw r5, -16(r1)
1545; CHECK-AIX-32-P9-NEXT:    lxv v2, -16(r1)
1546; CHECK-AIX-32-P9-NEXT:    xxmrghw v3, vs1, vs0
1547; CHECK-AIX-32-P9-NEXT:    lxv vs0, 0(r3)
1548; CHECK-AIX-32-P9-NEXT:    xxperm v2, v3, vs0
1549; CHECK-AIX-32-P9-NEXT:    blr
1550entry:
1551  %lhs.tmp = insertelement <4 x i32> undef, i32 %arg1, i32 0
1552  %lhs = bitcast <4 x i32> %lhs.tmp to <2 x i64>
1553  %rhs = insertelement <2 x i64> undef, i64 %arg, i32 0
1554  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1555  ret <2 x i64> %shuffle
1556}
1557
1558define <2 x i64> @test_v2i64_v2i64(ptr nocapture noundef readonly %a, ptr nocapture noundef readonly %b) {
1559; CHECK-LE-P8-LABEL: test_v2i64_v2i64:
1560; CHECK-LE-P8:       # %bb.0: # %entry
1561; CHECK-LE-P8-NEXT:    ld r3, 0(r3)
1562; CHECK-LE-P8-NEXT:    lfdx f1, 0, r4
1563; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1564; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
1565; CHECK-LE-P8-NEXT:    xxmrghd v3, vs1, vs0
1566; CHECK-LE-P8-NEXT:    vaddudm v2, v3, v2
1567; CHECK-LE-P8-NEXT:    blr
1568;
1569; CHECK-LE-P9-LABEL: test_v2i64_v2i64:
1570; CHECK-LE-P9:       # %bb.0: # %entry
1571; CHECK-LE-P9-NEXT:    ld r3, 0(r3)
1572; CHECK-LE-P9-NEXT:    lfd f1, 0(r4)
1573; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1574; CHECK-LE-P9-NEXT:    xxswapd v2, vs0
1575; CHECK-LE-P9-NEXT:    xxmrghd v3, vs1, vs0
1576; CHECK-LE-P9-NEXT:    vaddudm v2, v3, v2
1577; CHECK-LE-P9-NEXT:    blr
1578;
1579; CHECK-BE-P8-LABEL: test_v2i64_v2i64:
1580; CHECK-BE-P8:       # %bb.0: # %entry
1581; CHECK-BE-P8-NEXT:    lxsdx v2, 0, r3
1582; CHECK-BE-P8-NEXT:    lfdx f0, 0, r4
1583; CHECK-BE-P8-NEXT:    xxmrghd v3, v2, vs0
1584; CHECK-BE-P8-NEXT:    vaddudm v2, v3, v2
1585; CHECK-BE-P8-NEXT:    blr
1586;
1587; CHECK-BE-P9-LABEL: test_v2i64_v2i64:
1588; CHECK-BE-P9:       # %bb.0: # %entry
1589; CHECK-BE-P9-NEXT:    lxsd v2, 0(r3)
1590; CHECK-BE-P9-NEXT:    lfd f0, 0(r4)
1591; CHECK-BE-P9-NEXT:    xxmrghd v3, v2, vs0
1592; CHECK-BE-P9-NEXT:    vaddudm v2, v3, v2
1593; CHECK-BE-P9-NEXT:    blr
1594;
1595; CHECK-AIX-64-P8-LABEL: test_v2i64_v2i64:
1596; CHECK-AIX-64-P8:       # %bb.0: # %entry
1597; CHECK-AIX-64-P8-NEXT:    lxsdx v2, 0, r3
1598; CHECK-AIX-64-P8-NEXT:    lfdx f0, 0, r4
1599; CHECK-AIX-64-P8-NEXT:    xxmrghd v3, v2, vs0
1600; CHECK-AIX-64-P8-NEXT:    vaddudm v2, v3, v2
1601; CHECK-AIX-64-P8-NEXT:    blr
1602;
1603; CHECK-AIX-64-P9-LABEL: test_v2i64_v2i64:
1604; CHECK-AIX-64-P9:       # %bb.0: # %entry
1605; CHECK-AIX-64-P9-NEXT:    lxsd v2, 0(r3)
1606; CHECK-AIX-64-P9-NEXT:    lfd f0, 0(r4)
1607; CHECK-AIX-64-P9-NEXT:    xxmrghd v3, v2, vs0
1608; CHECK-AIX-64-P9-NEXT:    vaddudm v2, v3, v2
1609; CHECK-AIX-64-P9-NEXT:    blr
1610;
1611; CHECK-AIX-32-P8-LABEL: test_v2i64_v2i64:
1612; CHECK-AIX-32-P8:       # %bb.0: # %entry
1613; CHECK-AIX-32-P8-NEXT:    li r5, 4
1614; CHECK-AIX-32-P8-NEXT:    lfiwzx f1, 0, r3
1615; CHECK-AIX-32-P8-NEXT:    lfiwzx f3, 0, r4
1616; CHECK-AIX-32-P8-NEXT:    lfiwzx f0, r3, r5
1617; CHECK-AIX-32-P8-NEXT:    lfiwzx f2, r4, r5
1618; CHECK-AIX-32-P8-NEXT:    xxspltw vs1, vs1, 1
1619; CHECK-AIX-32-P8-NEXT:    xxspltw vs3, vs3, 1
1620; CHECK-AIX-32-P8-NEXT:    xxspltw vs0, vs0, 1
1621; CHECK-AIX-32-P8-NEXT:    xxspltw vs2, vs2, 1
1622; CHECK-AIX-32-P8-NEXT:    xxmrghw v2, vs1, vs0
1623; CHECK-AIX-32-P8-NEXT:    xxmrghw vs0, vs3, vs2
1624; CHECK-AIX-32-P8-NEXT:    xxmrghd v3, v2, vs0
1625; CHECK-AIX-32-P8-NEXT:    vaddudm v2, v3, v2
1626; CHECK-AIX-32-P8-NEXT:    blr
1627;
1628; CHECK-AIX-32-P9-LABEL: test_v2i64_v2i64:
1629; CHECK-AIX-32-P9:       # %bb.0: # %entry
1630; CHECK-AIX-32-P9-NEXT:    li r5, 4
1631; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r3
1632; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, r3, r5
1633; CHECK-AIX-32-P9-NEXT:    xxmrghw v2, vs1, vs0
1634; CHECK-AIX-32-P9-NEXT:    lxvwsx vs0, r4, r5
1635; CHECK-AIX-32-P9-NEXT:    lxvwsx vs1, 0, r4
1636; CHECK-AIX-32-P9-NEXT:    xxmrghw vs0, vs1, vs0
1637; CHECK-AIX-32-P9-NEXT:    xxmrghd v3, v2, vs0
1638; CHECK-AIX-32-P9-NEXT:    vaddudm v2, v3, v2
1639; CHECK-AIX-32-P9-NEXT:    blr
1640entry:
1641  %0 = load <8 x i8>, ptr %a, align 8
1642  %bc1 = bitcast <8 x i8> %0 to i64
1643  %vecinit3 = insertelement <2 x i64> poison, i64 %bc1, i64 0
1644  %1 = load <8 x i8>, ptr %b, align 8
1645  %bc2 = bitcast <8 x i8> %1 to i64
1646  %vecinit6 = insertelement <2 x i64> undef, i64 %bc2, i64 0
1647  %2 = bitcast <2 x i64> %vecinit3 to <2 x i64>
1648  %3 = bitcast <2 x i64> %vecinit6 to <2 x i64>
1649  %shuffle = shufflevector <2 x i64> %2, <2 x i64> %3, <2 x i32> <i32 0, i32 2>
1650  %4 = add <2 x i64> %shuffle, %2
1651  ret <2 x i64> %4
1652}
1653
1654define <2 x i64> @test_v2i64_v4i32(i64 %arg1, i32 %arg) {
1655; CHECK-LE-P8-LABEL: test_v2i64_v4i32:
1656; CHECK-LE-P8:       # %bb.0: # %entry
1657; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1658; CHECK-LE-P8-NEXT:    mtfprwz f1, r4
1659; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1660; CHECK-LE-P8-NEXT:    blr
1661;
1662; CHECK-LE-P9-LABEL: test_v2i64_v4i32:
1663; CHECK-LE-P9:       # %bb.0: # %entry
1664; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1665; CHECK-LE-P9-NEXT:    mtfprwz f1, r4
1666; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1667; CHECK-LE-P9-NEXT:    blr
1668;
1669; CHECK-BE-P8-LABEL: test_v2i64_v4i32:
1670; CHECK-BE-P8:       # %bb.0: # %entry
1671; CHECK-BE-P8-NEXT:    mtfprd f0, r3
1672; CHECK-BE-P8-NEXT:    xxspltd v2, vs0, 0
1673; CHECK-BE-P8-NEXT:    mtfprwz f0, r4
1674; CHECK-BE-P8-NEXT:    xxmrgld v2, v2, vs0
1675; CHECK-BE-P8-NEXT:    blr
1676;
1677; CHECK-BE-P9-LABEL: test_v2i64_v4i32:
1678; CHECK-BE-P9:       # %bb.0: # %entry
1679; CHECK-BE-P9-NEXT:    mtfprwz f0, r4
1680; CHECK-BE-P9-NEXT:    mtvsrdd v2, r3, r3
1681; CHECK-BE-P9-NEXT:    xxmrgld v2, v2, vs0
1682; CHECK-BE-P9-NEXT:    blr
1683;
1684; CHECK-AIX-64-P8-LABEL: test_v2i64_v4i32:
1685; CHECK-AIX-64-P8:       # %bb.0: # %entry
1686; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r3
1687; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs0
1688; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r4
1689; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, v2, vs0
1690; CHECK-AIX-64-P8-NEXT:    blr
1691;
1692; CHECK-AIX-64-P9-LABEL: test_v2i64_v4i32:
1693; CHECK-AIX-64-P9:       # %bb.0: # %entry
1694; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r4
1695; CHECK-AIX-64-P9-NEXT:    mtvsrdd v2, r3, r3
1696; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, v2, vs0
1697; CHECK-AIX-64-P9-NEXT:    blr
1698;
1699; CHECK-AIX-32-P8-LABEL: test_v2i64_v4i32:
1700; CHECK-AIX-32-P8:       # %bb.0: # %entry
1701; CHECK-AIX-32-P8-NEXT:    stw r5, -48(r1)
1702; CHECK-AIX-32-P8-NEXT:    addi r5, r1, -48
1703; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r5
1704; CHECK-AIX-32-P8-NEXT:    stw r3, -32(r1)
1705; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1706; CHECK-AIX-32-P8-NEXT:    stw r4, -16(r1)
1707; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1708; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1709; CHECK-AIX-32-P8-NEXT:    lxvw4x vs2, 0, r3
1710; CHECK-AIX-32-P8-NEXT:    xxmrghw vs1, vs2, vs1
1711; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs1, vs0
1712; CHECK-AIX-32-P8-NEXT:    blr
1713;
1714; CHECK-AIX-32-P9-LABEL: test_v2i64_v4i32:
1715; CHECK-AIX-32-P9:       # %bb.0: # %entry
1716; CHECK-AIX-32-P9-NEXT:    stw r4, -16(r1)
1717; CHECK-AIX-32-P9-NEXT:    stw r3, -32(r1)
1718; CHECK-AIX-32-P9-NEXT:    lxv vs1, -16(r1)
1719; CHECK-AIX-32-P9-NEXT:    lxv vs2, -32(r1)
1720; CHECK-AIX-32-P9-NEXT:    stw r5, -48(r1)
1721; CHECK-AIX-32-P9-NEXT:    lxv vs0, -48(r1)
1722; CHECK-AIX-32-P9-NEXT:    xxmrghw vs1, vs2, vs1
1723; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs1, vs0
1724; CHECK-AIX-32-P9-NEXT:    blr
1725entry:
1726  %lhs.tmp = insertelement <2 x i64> undef, i64 %arg1, i32 0
1727  %lhs = bitcast <2 x i64> %lhs.tmp to <2 x i64>
1728  %rhs.tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
1729  %rhs = bitcast <4 x i32> %rhs.tmp to <2 x i64>
1730  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1731  ret <2 x i64> %shuffle
1732}
1733
1734define <2 x i64> @test_v2i64_v8i16(i64 %arg1, i16 %arg) {
1735; CHECK-LE-P8-LABEL: test_v2i64_v8i16:
1736; CHECK-LE-P8:       # %bb.0: # %entry
1737; CHECK-LE-P8-NEXT:    mtfprd f0, r3
1738; CHECK-LE-P8-NEXT:    mtfprd f1, r4
1739; CHECK-LE-P8-NEXT:    xxmrghd v2, vs1, vs0
1740; CHECK-LE-P8-NEXT:    blr
1741;
1742; CHECK-LE-P9-LABEL: test_v2i64_v8i16:
1743; CHECK-LE-P9:       # %bb.0: # %entry
1744; CHECK-LE-P9-NEXT:    mtfprd f0, r3
1745; CHECK-LE-P9-NEXT:    mtfprd f1, r4
1746; CHECK-LE-P9-NEXT:    xxmrghd v2, vs1, vs0
1747; CHECK-LE-P9-NEXT:    blr
1748;
1749; CHECK-BE-P8-LABEL: test_v2i64_v8i16:
1750; CHECK-BE-P8:       # %bb.0: # %entry
1751; CHECK-BE-P8-NEXT:    mtfprd f0, r3
1752; CHECK-BE-P8-NEXT:    xxspltd v2, vs0, 0
1753; CHECK-BE-P8-NEXT:    mtfprwz f0, r4
1754; CHECK-BE-P8-NEXT:    xxmrgld v2, v2, vs0
1755; CHECK-BE-P8-NEXT:    blr
1756;
1757; CHECK-BE-P9-LABEL: test_v2i64_v8i16:
1758; CHECK-BE-P9:       # %bb.0: # %entry
1759; CHECK-BE-P9-NEXT:    mtfprwz f0, r4
1760; CHECK-BE-P9-NEXT:    mtvsrdd v2, r3, r3
1761; CHECK-BE-P9-NEXT:    xxmrgld v2, v2, vs0
1762; CHECK-BE-P9-NEXT:    blr
1763;
1764; CHECK-AIX-64-P8-LABEL: test_v2i64_v8i16:
1765; CHECK-AIX-64-P8:       # %bb.0: # %entry
1766; CHECK-AIX-64-P8-NEXT:    mtfprd f0, r3
1767; CHECK-AIX-64-P8-NEXT:    xxmrghd v2, vs0, vs0
1768; CHECK-AIX-64-P8-NEXT:    mtfprwz f0, r4
1769; CHECK-AIX-64-P8-NEXT:    xxmrgld v2, v2, vs0
1770; CHECK-AIX-64-P8-NEXT:    blr
1771;
1772; CHECK-AIX-64-P9-LABEL: test_v2i64_v8i16:
1773; CHECK-AIX-64-P9:       # %bb.0: # %entry
1774; CHECK-AIX-64-P9-NEXT:    mtfprwz f0, r4
1775; CHECK-AIX-64-P9-NEXT:    mtvsrdd v2, r3, r3
1776; CHECK-AIX-64-P9-NEXT:    xxmrgld v2, v2, vs0
1777; CHECK-AIX-64-P9-NEXT:    blr
1778;
1779; CHECK-AIX-32-P8-LABEL: test_v2i64_v8i16:
1780; CHECK-AIX-32-P8:       # %bb.0: # %entry
1781; CHECK-AIX-32-P8-NEXT:    sth r5, -48(r1)
1782; CHECK-AIX-32-P8-NEXT:    addi r5, r1, -48
1783; CHECK-AIX-32-P8-NEXT:    lxvw4x vs0, 0, r5
1784; CHECK-AIX-32-P8-NEXT:    stw r3, -32(r1)
1785; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -16
1786; CHECK-AIX-32-P8-NEXT:    stw r4, -16(r1)
1787; CHECK-AIX-32-P8-NEXT:    lxvw4x vs1, 0, r3
1788; CHECK-AIX-32-P8-NEXT:    addi r3, r1, -32
1789; CHECK-AIX-32-P8-NEXT:    lxvw4x vs2, 0, r3
1790; CHECK-AIX-32-P8-NEXT:    xxmrghw vs1, vs2, vs1
1791; CHECK-AIX-32-P8-NEXT:    xxmrghd v2, vs1, vs0
1792; CHECK-AIX-32-P8-NEXT:    blr
1793;
1794; CHECK-AIX-32-P9-LABEL: test_v2i64_v8i16:
1795; CHECK-AIX-32-P9:       # %bb.0: # %entry
1796; CHECK-AIX-32-P9-NEXT:    stw r4, -16(r1)
1797; CHECK-AIX-32-P9-NEXT:    stw r3, -32(r1)
1798; CHECK-AIX-32-P9-NEXT:    lxv vs1, -16(r1)
1799; CHECK-AIX-32-P9-NEXT:    lxv vs2, -32(r1)
1800; CHECK-AIX-32-P9-NEXT:    sth r5, -48(r1)
1801; CHECK-AIX-32-P9-NEXT:    lxv vs0, -48(r1)
1802; CHECK-AIX-32-P9-NEXT:    xxmrghw vs1, vs2, vs1
1803; CHECK-AIX-32-P9-NEXT:    xxmrghd v2, vs1, vs0
1804; CHECK-AIX-32-P9-NEXT:    blr
1805entry:
1806  %lhs.tmp = insertelement <2 x i64> undef, i64 %arg1, i32 0
1807  %lhs = bitcast <2 x i64> %lhs.tmp to <2 x i64>
1808  %rhs.tmp = insertelement <8 x i16> undef, i16 %arg, i32 0
1809  %rhs = bitcast <8 x i16> %rhs.tmp to <2 x i64>
1810  %shuffle = shufflevector <2 x i64> %lhs, <2 x i64> %rhs, <2 x i32> <i32 0, i32 2>
1811  ret <2 x i64> %shuffle
1812}
1813
1814