xref: /llvm-project/llvm/test/CodeGen/PowerPC/unaligned-dqform-ld.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN:   FileCheck %s --check-prefix=CHECK-P9-LE
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
6; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7; RUN:   FileCheck %s --check-prefix=CHECK-P9-BE
8
9%0 = type { %1 }
10%1 = type { %2, %6 }
11%2 = type { %3 }
12%3 = type { %4 }
13%4 = type { %5 }
14%5 = type { ptr, i32, i32 }
15%6 = type { [160 x i8] }
16%7 = type { %8, i32, %8 }
17%8 = type { ptr, i64 }
18
19$abc = comdat any
20
21; This test checks that X-Form load, lxvx, is being produced here instead of
22; the DQ-Form, lxv. We should not be producing lxv here as the frame index
23; value is unaligned (not a multiple of 16).
24define void @abc(ptr %arg, [5 x i64] %arg1, [5 x i64] %arg2, [5 x i64] %arg3, [5 x i64] %arg4) local_unnamed_addr #0 comdat {
25; CHECK-P9-LE-LABEL: abc:
26; CHECK-P9-LE:       # %bb.0: # %bb
27; CHECK-P9-LE-NEXT:    addi r6, r1, 120
28; CHECK-P9-LE-NEXT:    addi r11, r1, 104
29; CHECK-P9-LE-NEXT:    ld r0, 136(r1)
30; CHECK-P9-LE-NEXT:    ld r12, 144(r1)
31; CHECK-P9-LE-NEXT:    std r4, 0(r3)
32; CHECK-P9-LE-NEXT:    addi r4, r1, -160
33; CHECK-P9-LE-NEXT:    lxvx vs0, 0, r6
34; CHECK-P9-LE-NEXT:    lxvx vs1, 0, r11
35; CHECK-P9-LE-NEXT:    ld r6, 192(r1)
36; CHECK-P9-LE-NEXT:    ld r11, 160(r1)
37; CHECK-P9-LE-NEXT:    std r8, 0(r3)
38; CHECK-P9-LE-NEXT:    std r10, 0(r3)
39; CHECK-P9-LE-NEXT:    stxv vs1, 64(r4)
40; CHECK-P9-LE-NEXT:    std r0, 0(r3)
41; CHECK-P9-LE-NEXT:    std r11, 0(r3)
42; CHECK-P9-LE-NEXT:    std r6, 0(r3)
43; CHECK-P9-LE-NEXT:    addi r3, r3, 16
44; CHECK-P9-LE-NEXT:    std r5, 0(0)
45; CHECK-P9-LE-NEXT:    std r7, -136(r1)
46; CHECK-P9-LE-NEXT:    std r9, 0(0)
47; CHECK-P9-LE-NEXT:    stxv vs0, 80(r4)
48; CHECK-P9-LE-NEXT:    std r12, 0(0)
49; CHECK-P9-LE-NEXT:    std r3, 0(r3)
50; CHECK-P9-LE-NEXT:    blr
51;
52; CHECK-P9-BE-LABEL: abc:
53; CHECK-P9-BE:       # %bb.0: # %bb
54; CHECK-P9-BE-NEXT:    addi r6, r1, 136
55; CHECK-P9-BE-NEXT:    addi r11, r1, 120
56; CHECK-P9-BE-NEXT:    ld r0, 152(r1)
57; CHECK-P9-BE-NEXT:    ld r12, 160(r1)
58; CHECK-P9-BE-NEXT:    std r4, 0(r3)
59; CHECK-P9-BE-NEXT:    addi r4, r1, -160
60; CHECK-P9-BE-NEXT:    lxvx vs0, 0, r6
61; CHECK-P9-BE-NEXT:    lxvx vs1, 0, r11
62; CHECK-P9-BE-NEXT:    ld r6, 208(r1)
63; CHECK-P9-BE-NEXT:    ld r11, 176(r1)
64; CHECK-P9-BE-NEXT:    std r8, 0(r3)
65; CHECK-P9-BE-NEXT:    std r10, 0(r3)
66; CHECK-P9-BE-NEXT:    stxv vs1, 64(r4)
67; CHECK-P9-BE-NEXT:    std r0, 0(r3)
68; CHECK-P9-BE-NEXT:    std r11, 0(r3)
69; CHECK-P9-BE-NEXT:    std r6, 0(r3)
70; CHECK-P9-BE-NEXT:    addi r3, r3, 16
71; CHECK-P9-BE-NEXT:    std r5, 0(0)
72; CHECK-P9-BE-NEXT:    std r7, -136(r1)
73; CHECK-P9-BE-NEXT:    std r9, 0(0)
74; CHECK-P9-BE-NEXT:    stxv vs0, 80(r4)
75; CHECK-P9-BE-NEXT:    std r12, 0(0)
76; CHECK-P9-BE-NEXT:    std r3, 0(r3)
77; CHECK-P9-BE-NEXT:    blr
78bb:
79  %i = alloca [4 x %7], align 8
80  %i5 = extractvalue [5 x i64] %arg1, 0
81  %i6 = extractvalue [5 x i64] %arg1, 1
82  %i7 = extractvalue [5 x i64] %arg1, 3
83  %i8 = extractvalue [5 x i64] %arg1, 4
84  %i9 = extractvalue [5 x i64] %arg2, 0
85  %i10 = extractvalue [5 x i64] %arg2, 1
86  %i11 = extractvalue [5 x i64] %arg2, 3
87  %i12 = extractvalue [5 x i64] %arg2, 4
88  %i13 = extractvalue [5 x i64] %arg3, 0
89  %i14 = extractvalue [5 x i64] %arg3, 1
90  %i15 = extractvalue [5 x i64] %arg3, 2
91  %i16 = extractvalue [5 x i64] %arg3, 3
92  %i17 = extractvalue [5 x i64] %arg4, 0
93  %i18 = extractvalue [5 x i64] %arg4, 4
94  store i64 %i5, ptr undef, align 8
95  store i64 %i6, ptr null, align 8
96  %i19 = getelementptr inbounds [4 x %7], ptr %i, i64 0, i64 0, i32 2
97  store i64 %i7, ptr %i19, align 8
98  store i64 %i8, ptr undef, align 8
99  store i64 %i9, ptr null, align 8
100  store i64 %i10, ptr undef, align 8
101  %i21 = getelementptr inbounds [4 x %7], ptr %i, i64 0, i64 1, i32 2
102  store i64 %i11, ptr %i21, align 8
103  %i23 = getelementptr inbounds [4 x %7], ptr %i, i64 0, i64 1, i32 2, i32 1
104  store i64 %i12, ptr %i23, align 8
105  %i24 = getelementptr inbounds [4 x %7], ptr %i, i64 0, i64 2
106  store i64 %i13, ptr %i24, align 8
107  %i26 = getelementptr inbounds [4 x %7], ptr %i, i64 0, i64 2, i32 0, i32 1
108  store i64 %i14, ptr %i26, align 8
109  store i64 %i15, ptr undef, align 8
110  store i64 %i16, ptr null, align 8
111  store i64 %i17, ptr undef, align 8
112  store i64 undef, ptr null, align 8
113  store i64 %i18, ptr undef, align 8
114  %i28 = getelementptr inbounds %3, ptr %arg, i64 1, i32 0
115  store ptr %i28, ptr undef, align 8
116  ret void
117}
118