1; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s 2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 3target triple = "powerpc64-unknown-linux-gnu" 4 5declare <4 x i32> @llvm.ppc.altivec.lvx(ptr) #1 6 7define <4 x i32> @test1(ptr %h) #0 { 8entry: 9 %h1 = getelementptr <4 x i32>, ptr %h, i64 1 10 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(ptr %h1) 11 12 %v0 = load <4 x i32>, ptr %h, align 8 13 14 %a = add <4 x i32> %v0, %vl 15 ret <4 x i32> %a 16 17; CHECK-LABEL: @test1 18; CHECK: li [[REG:[0-9]+]], 16 19; CHECK-NOT: li {{[0-9]+}}, 15 20; CHECK-DAG: lvx {{[0-9]+}}, 0, 3 21; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]] 22; CHECK: blr 23} 24 25declare void @llvm.ppc.altivec.stvx(<4 x i32>, ptr) #0 26 27define <4 x i32> @test2(ptr %h, <4 x i32> %d) #0 { 28entry: 29 %h1 = getelementptr <4 x i32>, ptr %h, i64 1 30 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, ptr %h1) 31 32 %v0 = load <4 x i32>, ptr %h, align 8 33 34 ret <4 x i32> %v0 35 36; CHECK-LABEL: @test2 37; CHECK: li [[REG:[0-9]+]], 16 38; CHECK-NOT: li {{[0-9]+}}, 15 39; CHECK-DAG: lvx {{[0-9]+}}, 0, 3 40; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]] 41; CHECK: blr 42} 43 44attributes #0 = { nounwind } 45attributes #1 = { nounwind readonly } 46 47