xref: /llvm-project/llvm/test/CodeGen/PowerPC/two-address-crash.mir (revision 1b873e565eea97d02cdb2375c50ceea89a818e5b) 
1# RUN: llc -mtriple=ppc32-- %s -run-pass=phi-node-elimination \
2# RUN:   -verify-machineinstrs -o /dev/null 2>&1
3# RUN: llc -mtriple=ppc32-- %s --passes=phi-node-elimination -o /dev/null 2>&1
4# RUN: llc -mtriple=ppc32-- %s -start-before=phi-node-elimination \
5# RUN:   -verify-machineinstrs -o /dev/null 2>&1
6
7--- |
8  define void @VerifyTwoAddressCrash(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, ptr %P) {
9    %X = shl i16 %div.0.i.i.i.i, 1
10    %tmp28.i.i.i.i = shl i32 %L_num.0.i.i.i.i, 1
11    %tmp31.i.i.i.i = icmp slt i32 %tmp28.i.i.i.i, %tmp1.i.i206.i.i
12    %tmp31.i.i.i.i.upgrd.1 = zext i1 %tmp31.i.i.i.i to i16
13    %tmp371.i.i.i.i1 = or i16 %tmp31.i.i.i.i.upgrd.1, %X
14    %div.0.be.i.i.i.i = xor i16 %tmp371.i.i.i.i1, 1
15    store i16 %div.0.be.i.i.i.i, ptr %P, align 2
16    ret void
17  }
18
19...
20---
21name:            VerifyTwoAddressCrash
22alignment:       4
23exposesReturnsTwice: false
24legalized:       false
25regBankSelected: false
26selected:        false
27failedISel:      false
28tracksRegLiveness: true
29hasWinCFI:       false
30registers:
31  - { id: 0, class: gprc, preferred-register: '' }
32  - { id: 1, class: gprc, preferred-register: '' }
33  - { id: 2, class: gprc, preferred-register: '' }
34  - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' }
35  - { id: 4, class: gprc, preferred-register: '' }
36  - { id: 5, class: crrc, preferred-register: '' }
37  - { id: 6, class: crbitrc, preferred-register: '' }
38  - { id: 7, class: gprc_and_gprc_nor0, preferred-register: '' }
39  - { id: 8, class: gprc_and_gprc_nor0, preferred-register: '' }
40  - { id: 9, class: gprc, preferred-register: '' }
41  - { id: 10, class: gprc, preferred-register: '' }
42  - { id: 11, class: gprc, preferred-register: '' }
43liveins:
44  - { reg: '$r3', virtual-reg: '%0' }
45  - { reg: '$r4', virtual-reg: '%1' }
46  - { reg: '$r5', virtual-reg: '%2' }
47  - { reg: '$r6', virtual-reg: '%3' }
48frameInfo:
49  isFrameAddressTaken: false
50  isReturnAddressTaken: false
51  hasStackMap:     false
52  hasPatchPoint:   false
53  stackSize:       0
54  offsetAdjustment: 0
55  maxAlignment:    4
56  adjustsStack:    false
57  hasCalls:        false
58  stackProtector:  ''
59  maxCallFrameSize: 4294967295
60  cvBytesOfCalleeSavedRegisters: 0
61  hasOpaqueSPAdjustment: false
62  hasVAStart:      false
63  hasMustTailInVarArgFunc: false
64  localFrameSize:  0
65  savePoint:       ''
66  restorePoint:    ''
67fixedStack:      []
68stack:           []
69callSites:       []
70constants:       []
71machineFunctionInfo: {}
72body:             |
73  bb.0 (%ir-block.0):
74    liveins: $r3, $r4, $r5, $r6
75
76    %3:gprc_and_gprc_nor0 = COPY killed $r6
77    %2:gprc = COPY killed $r5
78    %1:gprc = COPY killed $r4
79    %0:gprc = COPY killed $r3
80    %4:gprc = RLWINM killed %1, 1, 0, 30
81    %5:crrc = CMPW killed %4, killed %2
82    %6:crbitrc = COPY killed %5.sub_lt
83    %7:gprc_and_gprc_nor0 = LI 0
84    %8:gprc_and_gprc_nor0 = LI 1
85    %9:gprc = ISEL killed %8, killed %7, killed %6
86    %10:gprc = RLWIMI killed %9, killed %0, 1, 0, 30
87    %11:gprc = XORI killed %10, 1
88    STH killed %11, 0, killed %3 :: (store (s16) into %ir.P)
89    BLR implicit $lr, implicit $rm
90
91...
92
93# Used to result in
94#
95# Bad machine code: Two-address instruction operands must be identical
96# - function:    VerifyTwoAddressCrash
97# - basic block: %bb.0
98# - instruction: %10:gprc = RLWIMI killed %9:gprc(tied-def 0), killed %0:gprc, 1, 0, 30
99# - operand 1:   killed %9:gprc(tied-def 0)
100# LLVM ERROR: Found 1 machine code errors.
101# Just verify that we do not crash (or get verifier error).
102