xref: /llvm-project/llvm/test/CodeGen/PowerPC/tls-store2.ll (revision 69b056d5638bbe3c8098b5d3a4980eb9929b9bbe)
1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O2 -relocation-model=pic < %s | FileCheck %s
2
3target datalayout = "e-m:e-i64:64-n32:64"
4target triple = "powerpc64le-unknown-linux-gnu"
5
6; Test back-to-back stores of TLS variables to ensure call sequences no
7; longer overlap.
8
9@__once_callable = external thread_local global ptr
10@__once_call = external thread_local global ptr
11
12define i64 @call_once(i64 %flag, ptr %ptr) {
13entry:
14  %var = alloca ptr, align 8
15  store ptr %ptr, ptr %var, align 8
16  store ptr %var, ptr @__once_callable, align 8
17  store ptr @__once_call_impl, ptr @__once_call, align 8
18  ret i64 %flag
19}
20
21; CHECK-LABEL: call_once:
22; CHECK: addi 3, {{[0-9]+}}, __once_callable@got@tlsgd@l
23; CHECK: bl __tls_get_addr(__once_callable@tlsgd)
24; CHECK-NEXT: nop
25; FIXME: We could check here for 'std {{[0-9]+}}, 0(3)', but that no longer
26; works because, with new scheduling freedom, we create a copy of R3 based on the
27; initial scheduling, but don't coalesce it again after we move the instructions
28; so that the copy is no longer necessary.
29; CHECK: addi 3, {{[0-9]+}}, __once_call@got@tlsgd@l
30; CHECK: bl __tls_get_addr(__once_call@tlsgd)
31; CHECK-NEXT: nop
32; CHECK: std {{[0-9]+}}, 0(3)
33; CHECK: mr 3, 30
34
35declare void @__once_call_impl()
36