1# RUN: llc -run-pass=stack-coloring %s -o - | FileCheck %s 2 3## Test %stack.1 is merged into %stack.0 and there is no MemoryMemOperand 4## referencing %stack.1. This regression test is sensitive to the StackColoring 5## algorithm. Please adjust or delete this test if the merging strategy 6## changes. 7 8# CHECK: {{^}}stack: 9# CHECK-NEXT: - { id: 0, 10# CHECK-NOT: - { id: 1, 11# CHECK: - { id: 2, 12# CHECK-NOT: %stack.1 13 14--- | 15 ; ModuleID = '<stdin>' 16 source_filename = "<stdin>" 17 target datalayout = "E-m:e-p:32:32-i64:64-n32" 18 target triple = "powerpc-unknown-freebsd13.0" 19 20 %struct.__va_list_tag = type { i8, i8, i16, ptr, ptr } 21 ; Function Attrs: argmemonly nounwind willreturn 22 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0 23 define dso_local void @atf_tc_fail_nonfatal(ptr %fmt, ...) !dbg !3 { 24 entry: 25 %buf.i.i = alloca [1024 x i8], align 1 26 %ap2.i.i = alloca [1 x %struct.__va_list_tag], align 4 27 br i1 undef, label %format_reason_ap.exit.i, label %if.then6.i.i 28 29 if.then6.i.i: ; preds = %entry 30 %0 = bitcast ptr %ap2.i.i to ptr 31 call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %0) 32 call void @llvm.va_copy(ptr nonnull %0, ptr nonnull null) 33 ret void 34 35 format_reason_ap.exit.i: ; preds = %entry 36 %1 = bitcast ptr %buf.i.i to ptr 37 call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %1) 38 call void @fprintf(ptr nonnull %1) 39 ret void 40 } 41 declare void @fprintf(ptr) 42 ; Function Attrs: nounwind 43 declare void @llvm.va_copy(ptr, ptr) #1 44 45 attributes #0 = { argmemonly nounwind willreturn } 46 attributes #1 = { nounwind } 47 48 !llvm.dbg.cu = !{!0} 49 !llvm.module.flags = !{!2} 50 51 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, splitDebugInlining: false, nameTableKind: None) 52 !1 = !DIFile(filename: "tc.c", directory: "") 53 !2 = !{i32 2, !"Debug Info Version", i32 3} 54 !3 = distinct !DISubprogram(name: "atf_tc_fail_nonfatal", scope: !1, file: !1, line: 1067, type: !4, scopeLine: 1068, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0) 55 !4 = !DISubroutineType(types: !5) 56 !5 = !{} 57 58... 59--- 60name: atf_tc_fail_nonfatal 61alignment: 4 62tracksRegLiveness: true 63registers: 64 - { id: 0, class: gprc } 65 - { id: 1, class: gprc } 66 - { id: 2, class: gprc } 67 - { id: 3, class: gprc } 68 - { id: 4, class: gprc } 69 - { id: 5, class: gprc } 70 - { id: 6, class: gprc } 71 - { id: 7, class: gprc } 72 - { id: 8, class: f8rc } 73 - { id: 9, class: f8rc } 74 - { id: 10, class: f8rc } 75 - { id: 11, class: f8rc } 76 - { id: 12, class: f8rc } 77 - { id: 13, class: f8rc } 78 - { id: 14, class: f8rc } 79 - { id: 15, class: f8rc } 80 - { id: 16, class: crbitrc } 81 - { id: 17, class: gprc } 82 - { id: 18, class: gprc } 83 - { id: 19, class: gprc } 84 - { id: 20, class: gprc } 85liveins: 86 - { reg: '$r3', virtual-reg: '%0' } 87 - { reg: '$r4', virtual-reg: '%1' } 88 - { reg: '$r5', virtual-reg: '%2' } 89 - { reg: '$r6', virtual-reg: '%3' } 90 - { reg: '$r7', virtual-reg: '%4' } 91 - { reg: '$r8', virtual-reg: '%5' } 92 - { reg: '$r9', virtual-reg: '%6' } 93 - { reg: '$r10', virtual-reg: '%7' } 94 - { reg: '$f1', virtual-reg: '%8' } 95 - { reg: '$f2', virtual-reg: '%9' } 96 - { reg: '$f3', virtual-reg: '%10' } 97 - { reg: '$f4', virtual-reg: '%11' } 98 - { reg: '$f5', virtual-reg: '%12' } 99 - { reg: '$f6', virtual-reg: '%13' } 100 - { reg: '$f7', virtual-reg: '%14' } 101 - { reg: '$f8', virtual-reg: '%15' } 102frameInfo: 103 maxAlignment: 8 104 hasCalls: true 105fixedStack: 106 - { id: 0, offset: 8, size: 4, alignment: 8, isImmutable: true } 107stack: 108 - { id: 0, name: buf.i.i, size: 1024, alignment: 1 } 109 - { id: 1, name: ap2.i.i, size: 12, alignment: 8 } 110 - { id: 2, size: 96, alignment: 8 } 111machineFunctionInfo: {} 112body: | 113 bb.0.entry: 114 liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8 115 116 %15:f8rc = COPY $f8 117 %14:f8rc = COPY $f7 118 %13:f8rc = COPY $f6 119 %12:f8rc = COPY $f5 120 %11:f8rc = COPY $f4 121 %10:f8rc = COPY $f3 122 %9:f8rc = COPY $f2 123 %8:f8rc = COPY $f1 124 %7:gprc = COPY $r10 125 %6:gprc = COPY $r9 126 %5:gprc = COPY $r8 127 %4:gprc = COPY $r7 128 %3:gprc = COPY $r6 129 %2:gprc = COPY $r5 130 %1:gprc = COPY $r4 131 %0:gprc = COPY $r3 132 STW %0, 0, %stack.2 :: (store (s32) into %stack.2, align 8) 133 STW %1, 4, %stack.2 :: (store (s32) into %stack.2 + 4) 134 STW %2, 8, %stack.2 :: (store (s32) into %stack.2 + 8, align 8) 135 STW %3, 12, %stack.2 :: (store (s32)) 136 STW %4, 16, %stack.2 :: (store (s32) into %stack.2 + 16, align 8) 137 STW %5, 20, %stack.2 :: (store (s32)) 138 STW %6, 24, %stack.2 :: (store (s32) into %stack.2 + 24, align 8) 139 STW %7, 28, %stack.2 :: (store (s32)) 140 STFD %8, 32, %stack.2 :: (store (s64)) 141 STFD %9, 40, %stack.2 :: (store (s64)) 142 STFD %10, 48, %stack.2 :: (store (s64)) 143 STFD %11, 56, %stack.2 :: (store (s64)) 144 STFD %12, 64, %stack.2 :: (store (s64)) 145 STFD %13, 72, %stack.2 :: (store (s64)) 146 STFD %14, 80, %stack.2 :: (store (s64)) 147 STFD %15, 88, %stack.2 :: (store (s64)) 148 %16:crbitrc = IMPLICIT_DEF 149 BC killed %16, %bb.2 150 B %bb.1 151 152 bb.1.if.then6.i.i: 153 LIFETIME_START %stack.1.ap2.i.i 154 %17:gprc = LWZ 8, $zero :: (load (s32), align 8) 155 STW killed %17, 8, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 8, basealign 8) 156 %18:gprc = LWZ 4, $zero :: (load (s32)) 157 STW killed %18, 4, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 4, basealign 8) 158 %19:gprc = LWZ 0, $zero :: (load (s32), align 8) 159 STW killed %19, 0, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i, basealign 8) 160 BLR implicit $lr, implicit $rm 161 162 bb.2.format_reason_ap.exit.i: 163 LIFETIME_START %stack.0.buf.i.i 164 ADJCALLSTACKDOWN 8, 0, implicit-def dead $r1, implicit $r1 165 %20:gprc = ADDI %stack.0.buf.i.i, 0 166 $r3 = COPY %20 167 BL @fprintf, csr_svr432, implicit-def dead $lr, implicit $rm, implicit $r3, implicit-def $r1 168 ADJCALLSTACKUP 8, 0, implicit-def dead $r1, implicit $r1 169 BLR implicit $lr, implicit $rm 170 171... 172