1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -O1 -mtriple ppc32le -o - %s | FileCheck --check-prefix CHECK-LE %s 3; RUN: llc -O1 -mtriple ppc32 -o - %s | FileCheck --check-prefix CHECK-BE %s 4 5; A collection of regression tests to verify the load-narrowing part of 6; TargetLowering::SimplifySetCC (and/or other similar rewrites such as 7; combining AND+LOAD into ZEXTLOAD). 8 9 10;-------------------------------------------------------------------------- 11; Test non byte-sized types. 12; 13; As long as LLVM IR isn't defining where the padding goes we can't really 14; optimize these (without adding a target lowering hook that can inform 15; ISel about which bits are padding). 16; -------------------------------------------------------------------------- 17 18define i1 @test_129_15_0(ptr %y) { 19; CHECK-LE-LABEL: test_129_15_0: 20; CHECK-LE: # %bb.0: 21; CHECK-LE-NEXT: lhz 3, 0(3) 22; CHECK-LE-NEXT: clrlwi 3, 3, 17 23; CHECK-LE-NEXT: addic 4, 3, -1 24; CHECK-LE-NEXT: subfe 3, 4, 3 25; CHECK-LE-NEXT: blr 26; 27; CHECK-BE-LABEL: test_129_15_0: 28; CHECK-BE: # %bb.0: 29; CHECK-BE-NEXT: lhz 3, 15(3) 30; CHECK-BE-NEXT: clrlwi 3, 3, 17 31; CHECK-BE-NEXT: addic 4, 3, -1 32; CHECK-BE-NEXT: subfe 3, 4, 3 33; CHECK-BE-NEXT: blr 34 %a = load i129, ptr %y 35 %b = and i129 %a, u0x7fff 36 %cmp = icmp ne i129 %b, 0 37 ret i1 %cmp 38} 39 40define i1 @test_126_20_4(ptr %y) { 41; CHECK-LE-LABEL: test_126_20_4: 42; CHECK-LE: # %bb.0: 43; CHECK-LE-NEXT: lwz 3, 0(3) 44; CHECK-LE-NEXT: rlwinm 3, 3, 0, 8, 27 45; CHECK-LE-NEXT: addic 4, 3, -1 46; CHECK-LE-NEXT: subfe 3, 4, 3 47; CHECK-LE-NEXT: blr 48; 49; CHECK-BE-LABEL: test_126_20_4: 50; CHECK-BE: # %bb.0: 51; CHECK-BE-NEXT: lwz 3, 12(3) 52; CHECK-BE-NEXT: rlwinm 3, 3, 0, 8, 27 53; CHECK-BE-NEXT: addic 4, 3, -1 54; CHECK-BE-NEXT: subfe 3, 4, 3 55; CHECK-BE-NEXT: blr 56 %a = load i126, ptr %y 57 %b = and i126 %a, u0xfffff0 58 %cmp = icmp ne i126 %b, 0 59 ret i1 %cmp 60} 61 62define i1 @test_33_8_0(ptr %y) { 63; CHECK-LE-LABEL: test_33_8_0: 64; CHECK-LE: # %bb.0: 65; CHECK-LE-NEXT: lbz 3, 0(3) 66; CHECK-LE-NEXT: addic 4, 3, -1 67; CHECK-LE-NEXT: subfe 3, 4, 3 68; CHECK-LE-NEXT: blr 69; 70; CHECK-BE-LABEL: test_33_8_0: 71; CHECK-BE: # %bb.0: 72; CHECK-BE-NEXT: lbz 3, 4(3) 73; CHECK-BE-NEXT: addic 4, 3, -1 74; CHECK-BE-NEXT: subfe 3, 4, 3 75; CHECK-BE-NEXT: blr 76 %a = load i33, ptr %y 77 %b = and i33 %a, u0xff 78 %cmp = icmp ne i33 %b, 0 79 ret i1 %cmp 80} 81 82define i1 @test_33_1_32(ptr %y) { 83; CHECK-LE-LABEL: test_33_1_32: 84; CHECK-LE: # %bb.0: 85; CHECK-LE-NEXT: lbz 3, 4(3) 86; CHECK-LE-NEXT: blr 87; 88; CHECK-BE-LABEL: test_33_1_32: 89; CHECK-BE: # %bb.0: 90; CHECK-BE-NEXT: lwz 3, 0(3) 91; CHECK-BE-NEXT: srwi 3, 3, 24 92; CHECK-BE-NEXT: blr 93 %a = load i33, ptr %y 94 %b = and i33 %a, u0x100000000 95 %cmp = icmp ne i33 %b, 0 96 ret i1 %cmp 97} 98 99define i1 @test_33_1_31(ptr %y) { 100; CHECK-LE-LABEL: test_33_1_31: 101; CHECK-LE: # %bb.0: 102; CHECK-LE-NEXT: lbz 3, 3(3) 103; CHECK-LE-NEXT: srwi 3, 3, 7 104; CHECK-LE-NEXT: blr 105; 106; CHECK-BE-LABEL: test_33_1_31: 107; CHECK-BE: # %bb.0: 108; CHECK-BE-NEXT: lbz 3, 1(3) 109; CHECK-BE-NEXT: srwi 3, 3, 7 110; CHECK-BE-NEXT: blr 111 %a = load i33, ptr %y 112 %b = and i33 %a, u0x80000000 113 %cmp = icmp ne i33 %b, 0 114 ret i1 %cmp 115} 116 117define i1 @test_33_1_0(ptr %y) { 118; CHECK-LE-LABEL: test_33_1_0: 119; CHECK-LE: # %bb.0: 120; CHECK-LE-NEXT: lbz 3, 0(3) 121; CHECK-LE-NEXT: clrlwi 3, 3, 31 122; CHECK-LE-NEXT: blr 123; 124; CHECK-BE-LABEL: test_33_1_0: 125; CHECK-BE: # %bb.0: 126; CHECK-BE-NEXT: lbz 3, 4(3) 127; CHECK-BE-NEXT: clrlwi 3, 3, 31 128; CHECK-BE-NEXT: blr 129 %a = load i33, ptr %y 130 %b = and i33 %a, u0x1 131 %cmp = icmp ne i33 %b, 0 132 ret i1 %cmp 133} 134 135;-------------------------------------------------------------------------- 136; Test byte-sized types. 137;-------------------------------------------------------------------------- 138 139 140define i1 @test_128_20_4(ptr %y) { 141; CHECK-LE-LABEL: test_128_20_4: 142; CHECK-LE: # %bb.0: 143; CHECK-LE-NEXT: lwz 3, 0(3) 144; CHECK-LE-NEXT: rlwinm 3, 3, 0, 8, 27 145; CHECK-LE-NEXT: addic 4, 3, -1 146; CHECK-LE-NEXT: subfe 3, 4, 3 147; CHECK-LE-NEXT: blr 148; 149; CHECK-BE-LABEL: test_128_20_4: 150; CHECK-BE: # %bb.0: 151; CHECK-BE-NEXT: lwz 3, 12(3) 152; CHECK-BE-NEXT: rlwinm 3, 3, 0, 8, 27 153; CHECK-BE-NEXT: addic 4, 3, -1 154; CHECK-BE-NEXT: subfe 3, 4, 3 155; CHECK-BE-NEXT: blr 156 %a = load i128, ptr %y 157 %b = and i128 %a, u0xfffff0 158 %cmp = icmp ne i128 %b, 0 159 ret i1 %cmp 160} 161 162define i1 @test_48_16_0(ptr %y) { 163; CHECK-LE-LABEL: test_48_16_0: 164; CHECK-LE: # %bb.0: 165; CHECK-LE-NEXT: lhz 3, 0(3) 166; CHECK-LE-NEXT: addic 4, 3, -1 167; CHECK-LE-NEXT: subfe 3, 4, 3 168; CHECK-LE-NEXT: blr 169; 170; CHECK-BE-LABEL: test_48_16_0: 171; CHECK-BE: # %bb.0: 172; CHECK-BE-NEXT: lhz 3, 4(3) 173; CHECK-BE-NEXT: addic 4, 3, -1 174; CHECK-BE-NEXT: subfe 3, 4, 3 175; CHECK-BE-NEXT: blr 176 %a = load i48, ptr %y 177 %b = and i48 %a, u0xffff 178 %cmp = icmp ne i48 %b, 0 179 ret i1 %cmp 180} 181 182define i1 @test_48_16_8(ptr %y) { 183; CHECK-LE-LABEL: test_48_16_8: 184; CHECK-LE: # %bb.0: 185; CHECK-LE-NEXT: lhz 3, 1(3) 186; CHECK-LE-NEXT: addic 4, 3, -1 187; CHECK-LE-NEXT: subfe 3, 4, 3 188; CHECK-LE-NEXT: blr 189; 190; CHECK-BE-LABEL: test_48_16_8: 191; CHECK-BE: # %bb.0: 192; CHECK-BE-NEXT: lhz 3, 3(3) 193; CHECK-BE-NEXT: addic 4, 3, -1 194; CHECK-BE-NEXT: subfe 3, 4, 3 195; CHECK-BE-NEXT: blr 196 %a = load i48, ptr %y 197 %b = and i48 %a, u0xffff00 198 %cmp = icmp ne i48 %b, 0 199 ret i1 %cmp 200} 201 202define i1 @test_48_16_16(ptr %y) { 203; CHECK-LE-LABEL: test_48_16_16: 204; CHECK-LE: # %bb.0: 205; CHECK-LE-NEXT: lhz 3, 2(3) 206; CHECK-LE-NEXT: addic 4, 3, -1 207; CHECK-LE-NEXT: subfe 3, 4, 3 208; CHECK-LE-NEXT: blr 209; 210; CHECK-BE-LABEL: test_48_16_16: 211; CHECK-BE: # %bb.0: 212; CHECK-BE-NEXT: lhz 3, 2(3) 213; CHECK-BE-NEXT: addic 4, 3, -1 214; CHECK-BE-NEXT: subfe 3, 4, 3 215; CHECK-BE-NEXT: blr 216 %a = load i48, ptr %y 217 %b = and i48 %a, u0xffff0000 218 %cmp = icmp ne i48 %b, 0 219 ret i1 %cmp 220} 221 222define i1 @test_48_16_32(ptr %y) { 223; CHECK-LE-LABEL: test_48_16_32: 224; CHECK-LE: # %bb.0: 225; CHECK-LE-NEXT: lhz 3, 4(3) 226; CHECK-LE-NEXT: addic 4, 3, -1 227; CHECK-LE-NEXT: subfe 3, 4, 3 228; CHECK-LE-NEXT: blr 229; 230; CHECK-BE-LABEL: test_48_16_32: 231; CHECK-BE: # %bb.0: 232; CHECK-BE-NEXT: lhz 3, 0(3) 233; CHECK-BE-NEXT: addic 4, 3, -1 234; CHECK-BE-NEXT: subfe 3, 4, 3 235; CHECK-BE-NEXT: blr 236 %a = load i48, ptr %y 237 %b = and i48 %a, u0xffff00000000 238 %cmp = icmp ne i48 %b, 0 239 ret i1 %cmp 240} 241 242define i1 @test_48_17_0(ptr %y) { 243; CHECK-LE-LABEL: test_48_17_0: 244; CHECK-LE: # %bb.0: 245; CHECK-LE-NEXT: lwz 3, 0(3) 246; CHECK-LE-NEXT: clrlwi 3, 3, 15 247; CHECK-LE-NEXT: addic 4, 3, -1 248; CHECK-LE-NEXT: subfe 3, 4, 3 249; CHECK-LE-NEXT: blr 250; 251; CHECK-BE-LABEL: test_48_17_0: 252; CHECK-BE: # %bb.0: 253; CHECK-BE-NEXT: lwz 3, 2(3) 254; CHECK-BE-NEXT: clrlwi 3, 3, 15 255; CHECK-BE-NEXT: addic 4, 3, -1 256; CHECK-BE-NEXT: subfe 3, 4, 3 257; CHECK-BE-NEXT: blr 258 %a = load i48, ptr %y 259 %b = and i48 %a, u0x1ffff 260 %cmp = icmp ne i48 %b, 0 261 ret i1 %cmp 262} 263 264define i1 @test_40_16_0(ptr %y) { 265; CHECK-LE-LABEL: test_40_16_0: 266; CHECK-LE: # %bb.0: 267; CHECK-LE-NEXT: lhz 3, 0(3) 268; CHECK-LE-NEXT: addic 4, 3, -1 269; CHECK-LE-NEXT: subfe 3, 4, 3 270; CHECK-LE-NEXT: blr 271; 272; CHECK-BE-LABEL: test_40_16_0: 273; CHECK-BE: # %bb.0: 274; CHECK-BE-NEXT: lhz 3, 3(3) 275; CHECK-BE-NEXT: addic 4, 3, -1 276; CHECK-BE-NEXT: subfe 3, 4, 3 277; CHECK-BE-NEXT: blr 278 %a = load i40, ptr %y 279 %b = and i40 %a, u0xffff 280 %cmp = icmp ne i40 %b, 0 281 ret i1 %cmp 282} 283 284define i1 @test_40_1_32(ptr %y) { 285; CHECK-LE-LABEL: test_40_1_32: 286; CHECK-LE: # %bb.0: 287; CHECK-LE-NEXT: lbz 3, 4(3) 288; CHECK-LE-NEXT: clrlwi 3, 3, 31 289; CHECK-LE-NEXT: blr 290; 291; CHECK-BE-LABEL: test_40_1_32: 292; CHECK-BE: # %bb.0: 293; CHECK-BE-NEXT: lbz 3, 0(3) 294; CHECK-BE-NEXT: clrlwi 3, 3, 31 295; CHECK-BE-NEXT: blr 296 %a = load i40, ptr %y 297 %b = and i40 %a, u0x100000000 298 %cmp = icmp ne i40 %b, 0 299 ret i1 %cmp 300} 301 302define i1 @test_24_16_0(ptr %y) { 303; CHECK-LE-LABEL: test_24_16_0: 304; CHECK-LE: # %bb.0: 305; CHECK-LE-NEXT: lhz 3, 0(3) 306; CHECK-LE-NEXT: addic 4, 3, -1 307; CHECK-LE-NEXT: subfe 3, 4, 3 308; CHECK-LE-NEXT: blr 309; 310; CHECK-BE-LABEL: test_24_16_0: 311; CHECK-BE: # %bb.0: 312; CHECK-BE-NEXT: lhz 3, 1(3) 313; CHECK-BE-NEXT: addic 4, 3, -1 314; CHECK-BE-NEXT: subfe 3, 4, 3 315; CHECK-BE-NEXT: blr 316 %a = load i24, ptr %y 317 %b = and i24 %a, u0xffff 318 %cmp = icmp ne i24 %b, 0 319 ret i1 %cmp 320} 321 322define i1 @test_24_8_8(ptr %y) { 323; CHECK-LE-LABEL: test_24_8_8: 324; CHECK-LE: # %bb.0: 325; CHECK-LE-NEXT: lbz 3, 1(3) 326; CHECK-LE-NEXT: addic 4, 3, -1 327; CHECK-LE-NEXT: subfe 3, 4, 3 328; CHECK-LE-NEXT: blr 329; 330; CHECK-BE-LABEL: test_24_8_8: 331; CHECK-BE: # %bb.0: 332; CHECK-BE-NEXT: lbz 3, 1(3) 333; CHECK-BE-NEXT: addic 4, 3, -1 334; CHECK-BE-NEXT: subfe 3, 4, 3 335; CHECK-BE-NEXT: blr 336 %a = load i24, ptr %y 337 %b = and i24 %a, u0xff00 338 %cmp = icmp ne i24 %b, 0 339 ret i1 %cmp 340} 341 342define i1 @test_24_8_12(ptr %y) { 343; CHECK-LE-LABEL: test_24_8_12: 344; CHECK-LE: # %bb.0: 345; CHECK-LE-NEXT: lhz 3, 1(3) 346; CHECK-LE-NEXT: rlwinm 3, 3, 0, 20, 27 347; CHECK-LE-NEXT: addic 4, 3, -1 348; CHECK-LE-NEXT: subfe 3, 4, 3 349; CHECK-LE-NEXT: blr 350; 351; CHECK-BE-LABEL: test_24_8_12: 352; CHECK-BE: # %bb.0: 353; CHECK-BE-NEXT: lhz 3, 0(3) 354; CHECK-BE-NEXT: rlwinm 3, 3, 0, 20, 27 355; CHECK-BE-NEXT: addic 4, 3, -1 356; CHECK-BE-NEXT: subfe 3, 4, 3 357; CHECK-BE-NEXT: blr 358 %a = load i24, ptr %y 359 %b = and i24 %a, u0xff000 360 %cmp = icmp ne i24 %b, 0 361 ret i1 %cmp 362} 363 364define i1 @test_24_8_16(ptr %y) { 365; CHECK-LE-LABEL: test_24_8_16: 366; CHECK-LE: # %bb.0: 367; CHECK-LE-NEXT: lbz 3, 2(3) 368; CHECK-LE-NEXT: addic 4, 3, -1 369; CHECK-LE-NEXT: subfe 3, 4, 3 370; CHECK-LE-NEXT: blr 371; 372; CHECK-BE-LABEL: test_24_8_16: 373; CHECK-BE: # %bb.0: 374; CHECK-BE-NEXT: lbz 3, 0(3) 375; CHECK-BE-NEXT: addic 4, 3, -1 376; CHECK-BE-NEXT: subfe 3, 4, 3 377; CHECK-BE-NEXT: blr 378 %a = load i24, ptr %y 379 %b = and i24 %a, u0xff0000 380 %cmp = icmp ne i24 %b, 0 381 ret i1 %cmp 382} 383