1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s 3define i16 @SEXTParam(i16 signext %0) #0 { 4; CHECK-LABEL: SEXTParam: 5; CHECK: # %bb.0: # %top 6; CHECK-NEXT: li 4, 0 7; CHECK-NEXT: sth 4, -4(1) 8; CHECK-NEXT: addi 4, 1, -4 9; CHECK-NEXT: lwsync 10; CHECK-NEXT: .LBB0_1: # %top 11; CHECK-NEXT: # 12; CHECK-NEXT: lharx 5, 0, 4 13; CHECK-NEXT: extsh 5, 5 14; CHECK-NEXT: cmpw 5, 3 15; CHECK-NEXT: blt 0, .LBB0_3 16; CHECK-NEXT: # %bb.2: # %top 17; CHECK-NEXT: # 18; CHECK-NEXT: sthcx. 3, 0, 4 19; CHECK-NEXT: bne 0, .LBB0_1 20; CHECK-NEXT: .LBB0_3: # %top 21; CHECK-NEXT: lwsync 22; CHECK-NEXT: lhz 3, -4(1) 23; CHECK-NEXT: cmpd 7, 3, 3 24; CHECK-NEXT: bne- 7, .+4 25; CHECK-NEXT: isync 26; CHECK-NEXT: blr 27top: 28 %1 = alloca i16, align 4 29 store i16 0, ptr %1, align 4 30 %rv.i = atomicrmw min ptr %1, i16 %0 acq_rel 31 %rv.i2 = load atomic i16, ptr %1 acquire, align 16 32 ret i16 %rv.i2 33} 34 35define i16 @noSEXTParam(i16 %0) #0 { 36; CHECK-LABEL: noSEXTParam: 37; CHECK: # %bb.0: # %top 38; CHECK-NEXT: li 4, 0 39; CHECK-NEXT: extsh 3, 3 40; CHECK-NEXT: sth 4, -4(1) 41; CHECK-NEXT: addi 4, 1, -4 42; CHECK-NEXT: lwsync 43; CHECK-NEXT: .LBB1_1: # %top 44; CHECK-NEXT: # 45; CHECK-NEXT: lharx 5, 0, 4 46; CHECK-NEXT: extsh 5, 5 47; CHECK-NEXT: cmpw 5, 3 48; CHECK-NEXT: blt 0, .LBB1_3 49; CHECK-NEXT: # %bb.2: # %top 50; CHECK-NEXT: # 51; CHECK-NEXT: sthcx. 3, 0, 4 52; CHECK-NEXT: bne 0, .LBB1_1 53; CHECK-NEXT: .LBB1_3: # %top 54; CHECK-NEXT: lwsync 55; CHECK-NEXT: lhz 3, -4(1) 56; CHECK-NEXT: cmpd 7, 3, 3 57; CHECK-NEXT: bne- 7, .+4 58; CHECK-NEXT: isync 59; CHECK-NEXT: blr 60top: 61 %1 = alloca i16, align 4 62 store i16 0, ptr %1, align 4 63 %rv.i = atomicrmw min ptr %1, i16 %0 acq_rel 64 %rv.i2 = load atomic i16, ptr %1 acquire, align 16 65 ret i16 %rv.i2 66} 67 68define i16 @noSEXTLoad(ptr %p) #0 { 69; CHECK-LABEL: noSEXTLoad: 70; CHECK: # %bb.0: # %top 71; CHECK-NEXT: li 4, 0 72; CHECK-NEXT: lha 3, 0(3) 73; CHECK-NEXT: sth 4, -4(1) 74; CHECK-NEXT: addi 4, 1, -4 75; CHECK-NEXT: lwsync 76; CHECK-NEXT: .LBB2_1: # %top 77; CHECK-NEXT: # 78; CHECK-NEXT: lharx 5, 0, 4 79; CHECK-NEXT: extsh 5, 5 80; CHECK-NEXT: cmpw 5, 3 81; CHECK-NEXT: blt 0, .LBB2_3 82; CHECK-NEXT: # %bb.2: # %top 83; CHECK-NEXT: # 84; CHECK-NEXT: sthcx. 3, 0, 4 85; CHECK-NEXT: bne 0, .LBB2_1 86; CHECK-NEXT: .LBB2_3: # %top 87; CHECK-NEXT: lwsync 88; CHECK-NEXT: lhz 3, -4(1) 89; CHECK-NEXT: cmpd 7, 3, 3 90; CHECK-NEXT: bne- 7, .+4 91; CHECK-NEXT: isync 92; CHECK-NEXT: blr 93top: 94 %0 = load i16, ptr %p, align 2 95 %1 = alloca i16, align 4 96 store i16 0, ptr %1, align 4 97 %rv.i = atomicrmw min ptr %1, i16 %0 acq_rel 98 %rv.i2 = load atomic i16, ptr %1 acquire, align 16 99 ret i16 %rv.i2 100} 101attributes #0 = { nounwind } 102