xref: /llvm-project/llvm/test/CodeGen/PowerPC/scmp.ll (revision e094abde42634e38cda85a6024792f681fc58f32) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=ppc64le-unknown-unknown %s -o - | FileCheck %s
3
4define i8 @scmp_8_8(i8 signext %x, i8 signext %y) nounwind {
5; CHECK-LABEL: scmp_8_8:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    cmpw 3, 4
8; CHECK-NEXT:    sub 5, 4, 3
9; CHECK-NEXT:    li 3, -1
10; CHECK-NEXT:    rldicl 5, 5, 1, 63
11; CHECK-NEXT:    isellt 3, 3, 5
12; CHECK-NEXT:    blr
13  %1 = call i8 @llvm.scmp(i8 %x, i8 %y)
14  ret i8 %1
15}
16
17define i8 @scmp_8_16(i16 signext %x, i16 signext %y) nounwind {
18; CHECK-LABEL: scmp_8_16:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    cmpw 3, 4
21; CHECK-NEXT:    sub 5, 4, 3
22; CHECK-NEXT:    li 3, -1
23; CHECK-NEXT:    rldicl 5, 5, 1, 63
24; CHECK-NEXT:    isellt 3, 3, 5
25; CHECK-NEXT:    blr
26  %1 = call i8 @llvm.scmp(i16 %x, i16 %y)
27  ret i8 %1
28}
29
30define i8 @scmp_8_32(i32 %x, i32 %y) nounwind {
31; CHECK-LABEL: scmp_8_32:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    extsw 4, 4
34; CHECK-NEXT:    extsw 3, 3
35; CHECK-NEXT:    cmpw 3, 4
36; CHECK-NEXT:    sub 3, 4, 3
37; CHECK-NEXT:    li 4, -1
38; CHECK-NEXT:    rldicl 3, 3, 1, 63
39; CHECK-NEXT:    isellt 3, 4, 3
40; CHECK-NEXT:    blr
41  %1 = call i8 @llvm.scmp(i32 %x, i32 %y)
42  ret i8 %1
43}
44
45define i8 @scmp_8_64(i64 %x, i64 %y) nounwind {
46; CHECK-LABEL: scmp_8_64:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    sradi 5, 4, 63
49; CHECK-NEXT:    rldicl 6, 3, 1, 63
50; CHECK-NEXT:    subc 7, 4, 3
51; CHECK-NEXT:    adde 5, 6, 5
52; CHECK-NEXT:    cmpd 3, 4
53; CHECK-NEXT:    li 3, -1
54; CHECK-NEXT:    xori 5, 5, 1
55; CHECK-NEXT:    isellt 3, 3, 5
56; CHECK-NEXT:    blr
57  %1 = call i8 @llvm.scmp(i64 %x, i64 %y)
58  ret i8 %1
59}
60
61define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
62; CHECK-LABEL: scmp_8_128:
63; CHECK:       # %bb.0:
64; CHECK-NEXT:    cmpld 4, 6
65; CHECK-NEXT:    cmpd 1, 4, 6
66; CHECK-NEXT:    li 4, -1
67; CHECK-NEXT:    cmpld 5, 3, 5
68; CHECK-NEXT:    li 3, 1
69; CHECK-NEXT:    crandc 22, 5, 2
70; CHECK-NEXT:    crand 21, 2, 21
71; CHECK-NEXT:    crand 20, 2, 20
72; CHECK-NEXT:    crnor 21, 21, 22
73; CHECK-NEXT:    isel 3, 0, 3, 21
74; CHECK-NEXT:    crandc 21, 4, 2
75; CHECK-NEXT:    cror 20, 20, 21
76; CHECK-NEXT:    isel 3, 4, 3, 20
77; CHECK-NEXT:    blr
78  %1 = call i8 @llvm.scmp(i128 %x, i128 %y)
79  ret i8 %1
80}
81
82define i32 @scmp_32_32(i32 %x, i32 %y) nounwind {
83; CHECK-LABEL: scmp_32_32:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    extsw 4, 4
86; CHECK-NEXT:    extsw 3, 3
87; CHECK-NEXT:    cmpw 3, 4
88; CHECK-NEXT:    sub 3, 4, 3
89; CHECK-NEXT:    li 4, -1
90; CHECK-NEXT:    rldicl 3, 3, 1, 63
91; CHECK-NEXT:    isellt 3, 4, 3
92; CHECK-NEXT:    blr
93  %1 = call i32 @llvm.scmp(i32 %x, i32 %y)
94  ret i32 %1
95}
96
97define i32 @scmp_32_64(i64 %x, i64 %y) nounwind {
98; CHECK-LABEL: scmp_32_64:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    sradi 5, 4, 63
101; CHECK-NEXT:    rldicl 6, 3, 1, 63
102; CHECK-NEXT:    subc 7, 4, 3
103; CHECK-NEXT:    adde 5, 6, 5
104; CHECK-NEXT:    cmpd 3, 4
105; CHECK-NEXT:    li 3, -1
106; CHECK-NEXT:    xori 5, 5, 1
107; CHECK-NEXT:    isellt 3, 3, 5
108; CHECK-NEXT:    blr
109  %1 = call i32 @llvm.scmp(i64 %x, i64 %y)
110  ret i32 %1
111}
112
113define i64 @scmp_64_64(i64 %x, i64 %y) nounwind {
114; CHECK-LABEL: scmp_64_64:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    sradi 5, 4, 63
117; CHECK-NEXT:    rldicl 6, 3, 1, 63
118; CHECK-NEXT:    subc 7, 4, 3
119; CHECK-NEXT:    adde 5, 6, 5
120; CHECK-NEXT:    cmpd 3, 4
121; CHECK-NEXT:    li 3, -1
122; CHECK-NEXT:    xori 5, 5, 1
123; CHECK-NEXT:    isellt 3, 3, 5
124; CHECK-NEXT:    blr
125  %1 = call i64 @llvm.scmp(i64 %x, i64 %y)
126  ret i64 %1
127}
128