1# RUN: llc -mcpu=pwr9 -mtriple powerpc64le-unknown-linux-gnu -start-before machine-scheduler -stop-after machine-scheduler -verify-machineinstrs %s -o - | FileCheck %s 2# RUN: llc -mcpu=pwr9 -mtriple powerpc64le-unknown-linux-gnu -disable-ppc-sched-addi-load -start-before machine-scheduler -stop-after machine-scheduler \ 3# RUN: -verify-machineinstrs %s -o - | FileCheck --check-prefix=CHECK-DISABLE %s 4# RUN: llc -mcpu=pwr8 -mtriple powerpc64le-unknown-linux-gnu -start-before machine-scheduler -stop-after machine-scheduler -verify-machineinstrs %s -o - | FileCheck --check-prefix=CHECK-P8 %s 5 6# Test that if the scheduler moves the addi before the load. 7--- | 8 target datalayout = "e-m:e-i64:64-n32:64" 9 10 define i64 @foo(ptr %p, ptr %q) { 11 entry: 12 br label %while.cond6.i 13 14 while.cond6.i: 15 %n.0 = phi i64 [ 0, %entry ], [ %n.1, %while.cond6.i ] 16 %conv = and i64 %n.0, 4294967295 17 %arrayidx = getelementptr inbounds i8, ptr %p, i64 %conv 18 %0 = load i8, ptr %arrayidx, align 1 19 %arrayidx4 = getelementptr inbounds i8, ptr %q, i64 %conv 20 %1 = load i8, ptr %arrayidx4, align 1 21 %cmp = icmp eq i8 %0, %1 22 %n.1 = add i64 %conv, 1 23 br i1 %cmp, label %while.cond6.i, label %while.end 24 25 while.end: 26 ret i64 %n.0 27 } 28 29... 30--- 31name: foo 32alignment: 16 33exposesReturnsTwice: false 34legalized: false 35regBankSelected: false 36selected: false 37failedISel: false 38tracksRegLiveness: true 39hasWinCFI: false 40registers: 41 - { id: 0, class: g8rc, preferred-register: '' } 42 - { id: 1, class: g8rc, preferred-register: '' } 43 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 44 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 45 - { id: 4, class: g8rc, preferred-register: '' } 46 - { id: 5, class: g8rc_and_g8rc_nox0, preferred-register: '' } 47 - { id: 6, class: gprc, preferred-register: '' } 48 - { id: 7, class: gprc, preferred-register: '' } 49 - { id: 8, class: crrc, preferred-register: '' } 50 - { id: 9, class: g8rc, preferred-register: '' } 51liveins: 52 - { reg: '$x3', virtual-reg: '%2' } 53 - { reg: '$x4', virtual-reg: '%3' } 54frameInfo: 55 isFrameAddressTaken: false 56 isReturnAddressTaken: false 57 hasStackMap: false 58 hasPatchPoint: false 59 stackSize: 0 60 offsetAdjustment: 0 61 maxAlignment: 0 62 adjustsStack: false 63 hasCalls: false 64 stackProtector: '' 65 maxCallFrameSize: 4294967295 66 cvBytesOfCalleeSavedRegisters: 0 67 hasOpaqueSPAdjustment: false 68 hasVAStart: false 69 hasMustTailInVarArgFunc: false 70 localFrameSize: 0 71 savePoint: '' 72 restorePoint: '' 73fixedStack: [] 74stack: [] 75constants: [] 76machineFunctionInfo: {} 77body: | 78 bb.0.entry: 79 successors: %bb.1(0x80000000) 80 liveins: $x3, $x4 81 82 %3:g8rc_and_g8rc_nox0 = COPY $x4 83 %2:g8rc_and_g8rc_nox0 = COPY $x3 84 %9:g8rc = LI8 0 85 86 bb.1.while.cond6.i: 87 successors: %bb.1(0x7c000000), %bb.2(0x04000000) 88 89 %0:g8rc = COPY %9 90 %5:g8rc_and_g8rc_nox0 = RLDICL %0, 0, 32 91 %6:gprc = LBZX %2, %5 :: (load (s8) from %ir.arrayidx) 92 %7:gprc = LBZX %3, %5 :: (load (s8) from %ir.arrayidx4) 93 %9:g8rc = ADDI8 %5, 1 94 %8:crrc = CMPLW %6, %7 95 BCC 76, %8, %bb.1 96 B %bb.2 97 ; CHECK-LABEL: foo 98 ; CHECK: %5:g8rc_and_g8rc_nox0 = RLDICL %0, 0, 32 99 ; CHECK-NEXT: %9:g8rc = ADDI8 %5, 1 100 ; CHECK-NEXT: %6:gprc = LBZX %2, %5 :: (load (s8) from %ir.arrayidx) 101 ; CHECK-NEXT: %7:gprc = LBZX %3, %5 :: (load (s8) from %ir.arrayidx4) 102 ; CHECK-NEXT: %8:crrc = CMPLW %6, %7 103 ; CHECK-NEXT: BCC 76, %8 104 ; CHECK-DISABLE-LABEL: foo 105 ; CHECK-DISABLE: %5:g8rc_and_g8rc_nox0 = RLDICL %0, 0, 32 106 ; CHECK-DISABLE-NEXT: %6:gprc = LBZX %2, %5 :: (load (s8) from %ir.arrayidx) 107 ; CHECK-DISABLE-NEXT: %7:gprc = LBZX %3, %5 :: (load (s8) from %ir.arrayidx4) 108 ; CHECK-DISABLE-NEXT: %9:g8rc = ADDI8 %5, 1 109 ; CHECK-DISABLE-NEXT: %8:crrc = CMPLW %6, %7 110 ; CHECK-DISABLE-NEXT: BCC 76, %8 111 ; CHECK-P8-LABEL: foo 112 ; CHECK-P8: %5:g8rc_and_g8rc_nox0 = RLDICL %0, 0, 32 113 ; CHECK-P8-NEXT: %6:gprc = LBZX %2, %5 :: (load (s8) from %ir.arrayidx) 114 ; CHECK-P8-NEXT: %7:gprc = LBZX %3, %5 :: (load (s8) from %ir.arrayidx4) 115 ; CHECK-P8-NEXT: %9:g8rc = ADDI8 %5, 1 116 ; CHECK-P8-NEXT: %8:crrc = CMPLW %6, %7 117 ; CHECK-P8-NEXT: BCC 76, %8 118 119 bb.2.while.end: 120 $x3 = COPY %0 121 BLR8 implicit $lr8, implicit $rm, implicit $x3 122 123... 124