1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | FileCheck %s 3; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s 4 5define i32 @rotl32(i32 %A, i8 %Amt) nounwind { 6; CHECK-LABEL: rotl32: 7; CHECK: # %bb.0: 8; CHECK-NEXT: rotlw 3, 3, 4 9; CHECK-NEXT: blr 10 %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1] 11 %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1] 12 %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] 13 %shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1] 14 %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1] 15 %D = or i32 %B, %C ; <i32> [#uses=1] 16 ret i32 %D 17} 18 19define i32 @rotr32(i32 %A, i8 %Amt) nounwind { 20; CHECK-LABEL: rotr32: 21; CHECK: # %bb.0: 22; CHECK-NEXT: subfic 4, 4, 32 23; CHECK-NEXT: rotlw 3, 3, 4 24; CHECK-NEXT: blr 25 %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1] 26 %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1] 27 %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] 28 %shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1] 29 %C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1] 30 %D = or i32 %B, %C ; <i32> [#uses=1] 31 ret i32 %D 32} 33 34define i32 @rotli32(i32 %A) nounwind { 35; CHECK-LABEL: rotli32: 36; CHECK: # %bb.0: 37; CHECK-NEXT: rotlwi 3, 3, 5 38; CHECK-NEXT: blr 39 %B = shl i32 %A, 5 ; <i32> [#uses=1] 40 %C = lshr i32 %A, 27 ; <i32> [#uses=1] 41 %D = or i32 %B, %C ; <i32> [#uses=1] 42 ret i32 %D 43} 44 45define i32 @rotri32(i32 %A) nounwind { 46; CHECK-LABEL: rotri32: 47; CHECK: # %bb.0: 48; CHECK-NEXT: rotlwi 3, 3, 27 49; CHECK-NEXT: blr 50 %B = lshr i32 %A, 5 ; <i32> [#uses=1] 51 %C = shl i32 %A, 27 ; <i32> [#uses=1] 52 %D = or i32 %B, %C ; <i32> [#uses=1] 53 ret i32 %D 54} 55 56