xref: /llvm-project/llvm/test/CodeGen/PowerPC/retaddr_multi_levels.ll (revision eb7d16ea25649909373e324e6ebf36774cabdbfa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux \
3; RUN:   -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-64B-LE
4; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux \
5; RUN:   -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-64B-BE
6; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-aix \
7; RUN:   -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-64B-BE
8; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-aix \
9; RUN:   -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-32B-BE
10
11declare ptr @llvm.returnaddress(i32) nounwind readnone
12
13define ptr @test0() nounwind readnone {
14; CHECK-64B-LE-LABEL: test0:
15; CHECK-64B-LE:       # %bb.0: # %entry
16; CHECK-64B-LE-NEXT:    mflr 0
17; CHECK-64B-LE-NEXT:    stdu 1, -32(1)
18; CHECK-64B-LE-NEXT:    std 0, 48(1)
19; CHECK-64B-LE-NEXT:    ld 3, 48(1)
20; CHECK-64B-LE-NEXT:    addi 1, 1, 32
21; CHECK-64B-LE-NEXT:    ld 0, 16(1)
22; CHECK-64B-LE-NEXT:    mtlr 0
23; CHECK-64B-LE-NEXT:    blr
24;
25; CHECK-64B-BE-LABEL: test0:
26; CHECK-64B-BE:       # %bb.0: # %entry
27; CHECK-64B-BE-NEXT:    mflr 0
28; CHECK-64B-BE-NEXT:    stdu 1, -48(1)
29; CHECK-64B-BE-NEXT:    std 0, 64(1)
30; CHECK-64B-BE-NEXT:    ld 3, 64(1)
31; CHECK-64B-BE-NEXT:    addi 1, 1, 48
32; CHECK-64B-BE-NEXT:    ld 0, 16(1)
33; CHECK-64B-BE-NEXT:    mtlr 0
34; CHECK-64B-BE-NEXT:    blr
35;
36; CHECK-32B-BE-LABEL: test0:
37; CHECK-32B-BE:       # %bb.0: # %entry
38; CHECK-32B-BE-NEXT:    mflr 0
39; CHECK-32B-BE-NEXT:    stwu 1, -32(1)
40; CHECK-32B-BE-NEXT:    stw 0, 40(1)
41; CHECK-32B-BE-NEXT:    lwz 3, 40(1)
42; CHECK-32B-BE-NEXT:    addi 1, 1, 32
43; CHECK-32B-BE-NEXT:    lwz 0, 8(1)
44; CHECK-32B-BE-NEXT:    mtlr 0
45; CHECK-32B-BE-NEXT:    blr
46entry:
47  %0 = tail call ptr @llvm.returnaddress(i32 0);
48  ret ptr %0
49}
50
51define ptr @test1() nounwind readnone {
52; CHECK-64B-LE-LABEL: test1:
53; CHECK-64B-LE:       # %bb.0: # %entry
54; CHECK-64B-LE-NEXT:    mflr 0
55; CHECK-64B-LE-NEXT:    stdu 1, -32(1)
56; CHECK-64B-LE-NEXT:    std 0, 48(1)
57; CHECK-64B-LE-NEXT:    ld 3, 0(1)
58; CHECK-64B-LE-NEXT:    ld 3, 0(3)
59; CHECK-64B-LE-NEXT:    ld 3, 16(3)
60; CHECK-64B-LE-NEXT:    addi 1, 1, 32
61; CHECK-64B-LE-NEXT:    ld 0, 16(1)
62; CHECK-64B-LE-NEXT:    mtlr 0
63; CHECK-64B-LE-NEXT:    blr
64;
65; CHECK-64B-BE-LABEL: test1:
66; CHECK-64B-BE:       # %bb.0: # %entry
67; CHECK-64B-BE-NEXT:    mflr 0
68; CHECK-64B-BE-NEXT:    stdu 1, -48(1)
69; CHECK-64B-BE-NEXT:    std 0, 64(1)
70; CHECK-64B-BE-NEXT:    ld 3, 0(1)
71; CHECK-64B-BE-NEXT:    ld 3, 0(3)
72; CHECK-64B-BE-NEXT:    ld 3, 16(3)
73; CHECK-64B-BE-NEXT:    addi 1, 1, 48
74; CHECK-64B-BE-NEXT:    ld 0, 16(1)
75; CHECK-64B-BE-NEXT:    mtlr 0
76; CHECK-64B-BE-NEXT:    blr
77;
78; CHECK-32B-BE-LABEL: test1:
79; CHECK-32B-BE:       # %bb.0: # %entry
80; CHECK-32B-BE-NEXT:    mflr 0
81; CHECK-32B-BE-NEXT:    stwu 1, -32(1)
82; CHECK-32B-BE-NEXT:    stw 0, 40(1)
83; CHECK-32B-BE-NEXT:    lwz 3, 0(1)
84; CHECK-32B-BE-NEXT:    lwz 3, 0(3)
85; CHECK-32B-BE-NEXT:    lwz 3, 8(3)
86; CHECK-32B-BE-NEXT:    addi 1, 1, 32
87; CHECK-32B-BE-NEXT:    lwz 0, 8(1)
88; CHECK-32B-BE-NEXT:    mtlr 0
89; CHECK-32B-BE-NEXT:    blr
90entry:
91  %0 = tail call ptr @llvm.returnaddress(i32 1);
92  ret ptr %0
93}
94
95define ptr @test2() nounwind readnone {
96; CHECK-64B-LE-LABEL: test2:
97; CHECK-64B-LE:       # %bb.0: # %entry
98; CHECK-64B-LE-NEXT:    mflr 0
99; CHECK-64B-LE-NEXT:    stdu 1, -32(1)
100; CHECK-64B-LE-NEXT:    std 0, 48(1)
101; CHECK-64B-LE-NEXT:    ld 3, 0(1)
102; CHECK-64B-LE-NEXT:    ld 3, 0(3)
103; CHECK-64B-LE-NEXT:    ld 3, 0(3)
104; CHECK-64B-LE-NEXT:    ld 3, 16(3)
105; CHECK-64B-LE-NEXT:    addi 1, 1, 32
106; CHECK-64B-LE-NEXT:    ld 0, 16(1)
107; CHECK-64B-LE-NEXT:    mtlr 0
108; CHECK-64B-LE-NEXT:    blr
109;
110; CHECK-64B-BE-LABEL: test2:
111; CHECK-64B-BE:       # %bb.0: # %entry
112; CHECK-64B-BE-NEXT:    mflr 0
113; CHECK-64B-BE-NEXT:    stdu 1, -48(1)
114; CHECK-64B-BE-NEXT:    std 0, 64(1)
115; CHECK-64B-BE-NEXT:    ld 3, 0(1)
116; CHECK-64B-BE-NEXT:    ld 3, 0(3)
117; CHECK-64B-BE-NEXT:    ld 3, 0(3)
118; CHECK-64B-BE-NEXT:    ld 3, 16(3)
119; CHECK-64B-BE-NEXT:    addi 1, 1, 48
120; CHECK-64B-BE-NEXT:    ld 0, 16(1)
121; CHECK-64B-BE-NEXT:    mtlr 0
122; CHECK-64B-BE-NEXT:    blr
123;
124; CHECK-32B-BE-LABEL: test2:
125; CHECK-32B-BE:       # %bb.0: # %entry
126; CHECK-32B-BE-NEXT:    mflr 0
127; CHECK-32B-BE-NEXT:    stwu 1, -32(1)
128; CHECK-32B-BE-NEXT:    stw 0, 40(1)
129; CHECK-32B-BE-NEXT:    lwz 3, 0(1)
130; CHECK-32B-BE-NEXT:    lwz 3, 0(3)
131; CHECK-32B-BE-NEXT:    lwz 3, 0(3)
132; CHECK-32B-BE-NEXT:    lwz 3, 8(3)
133; CHECK-32B-BE-NEXT:    addi 1, 1, 32
134; CHECK-32B-BE-NEXT:    lwz 0, 8(1)
135; CHECK-32B-BE-NEXT:    mtlr 0
136; CHECK-32B-BE-NEXT:    blr
137entry:
138  %0 = tail call ptr @llvm.returnaddress(i32 2);
139  ret ptr %0
140}
141