1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -disable-ppc-instr-form-prep=true -mcpu=pwr9 < %s \ 3; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names | FileCheck %s -check-prefix=CHECK-P9 4; RUN: llc -verify-machineinstrs -disable-ppc-instr-form-prep=true -mcpu=pwr10 < %s \ 5; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names | FileCheck %s -check-prefix=CHECK-P10 6 7target triple = "powerpc64le-unknown-linux-gnu" 8 9%_elem_type_of_a = type <{ double }> 10%_elem_type_of_x = type <{ double }> 11%_elem_type_of_y = type <{ double }> 12 13define void @test(ptr dereferenceable(4) %.ial, ptr noalias dereferenceable(4) %.m, ptr noalias dereferenceable(4) %.n, ptr %.a, ptr noalias dereferenceable(4) %.lda, ptr noalias %.x, ptr noalias %.y) { 14; CHECK-P9-LABEL: test: 15; CHECK-P9: # %bb.0: # %test_entry 16; CHECK-P9-NEXT: andi. r3, r6, 15 17; CHECK-P9-NEXT: li r3, 2 18; CHECK-P9-NEXT: li r10, 1 19; CHECK-P9-NEXT: lwz r4, 0(r4) 20; CHECK-P9-NEXT: lwz r5, 0(r5) 21; CHECK-P9-NEXT: iseleq r3, r10, r3 22; CHECK-P9-NEXT: subfic r10, r3, 1 23; CHECK-P9-NEXT: add r4, r10, r4 24; CHECK-P9-NEXT: srawi r4, r4, 4 25; CHECK-P9-NEXT: addze r4, r4 26; CHECK-P9-NEXT: srawi r5, r5, 1 27; CHECK-P9-NEXT: slwi r4, r4, 4 28; CHECK-P9-NEXT: addze r5, r5 29; CHECK-P9-NEXT: sub r4, r4, r10 30; CHECK-P9-NEXT: cmpw r3, r4 31; CHECK-P9-NEXT: bgtlr cr0 32; CHECK-P9-NEXT: # %bb.1: # %_loop_2_do_.lr.ph 33; CHECK-P9-NEXT: extswsli r5, r5, 3 34; CHECK-P9-NEXT: add r5, r8, r5 35; CHECK-P9-NEXT: addi r8, r5, -8 36; CHECK-P9-NEXT: lwz r5, 0(r7) 37; CHECK-P9-NEXT: extsw r7, r4 38; CHECK-P9-NEXT: rldic r4, r3, 3, 29 39; CHECK-P9-NEXT: sub r3, r7, r3 40; CHECK-P9-NEXT: addi r10, r4, 8 41; CHECK-P9-NEXT: lxvdsx vs0, 0, r8 42; CHECK-P9-NEXT: rldicl r3, r3, 60, 4 43; CHECK-P9-NEXT: extswsli r5, r5, 3 44; CHECK-P9-NEXT: addi r3, r3, 1 45; CHECK-P9-NEXT: sub r4, r10, r5 46; CHECK-P9-NEXT: add r5, r9, r10 47; CHECK-P9-NEXT: mtctr r3 48; CHECK-P9-NEXT: add r4, r6, r4 49; CHECK-P9-NEXT: .p2align 4 50; CHECK-P9-NEXT: .LBB0_2: # %_loop_2_do_ 51; CHECK-P9-NEXT: # 52; CHECK-P9-NEXT: lxv vs1, -16(r5) 53; CHECK-P9-NEXT: lxv vs2, 0(r5) 54; CHECK-P9-NEXT: lxv vs3, -16(r4) 55; CHECK-P9-NEXT: lxv vs4, 0(r4) 56; CHECK-P9-NEXT: addi r4, r4, 128 57; CHECK-P9-NEXT: xvmaddadp vs1, vs3, vs1 58; CHECK-P9-NEXT: stxv vs1, -16(r5) 59; CHECK-P9-NEXT: xvmaddadp vs2, vs4, vs0 60; CHECK-P9-NEXT: stxv vs2, 0(r5) 61; CHECK-P9-NEXT: addi r5, r5, 128 62; CHECK-P9-NEXT: bdnz .LBB0_2 63; CHECK-P9-NEXT: # %bb.3: # %_return_bb 64; CHECK-P9-NEXT: blr 65; 66; CHECK-P10-LABEL: test: 67; CHECK-P10: # %bb.0: # %test_entry 68; CHECK-P10-NEXT: andi. r3, r6, 15 69; CHECK-P10-NEXT: li r3, 2 70; CHECK-P10-NEXT: li r10, 1 71; CHECK-P10-NEXT: lwz r4, 0(r4) 72; CHECK-P10-NEXT: lwz r5, 0(r5) 73; CHECK-P10-NEXT: iseleq r3, r10, r3 74; CHECK-P10-NEXT: subfic r10, r3, 1 75; CHECK-P10-NEXT: add r4, r10, r4 76; CHECK-P10-NEXT: srawi r4, r4, 4 77; CHECK-P10-NEXT: addze r4, r4 78; CHECK-P10-NEXT: srawi r5, r5, 1 79; CHECK-P10-NEXT: slwi r4, r4, 4 80; CHECK-P10-NEXT: addze r5, r5 81; CHECK-P10-NEXT: sub r4, r4, r10 82; CHECK-P10-NEXT: cmpw r3, r4 83; CHECK-P10-NEXT: bgtlr cr0 84; CHECK-P10-NEXT: # %bb.1: # %_loop_2_do_.lr.ph 85; CHECK-P10-NEXT: extswsli r5, r5, 3 86; CHECK-P10-NEXT: add r5, r8, r5 87; CHECK-P10-NEXT: addi r8, r5, -8 88; CHECK-P10-NEXT: lwz r5, 0(r7) 89; CHECK-P10-NEXT: extsw r7, r4 90; CHECK-P10-NEXT: rldic r4, r3, 3, 29 91; CHECK-P10-NEXT: addi r10, r4, 8 92; CHECK-P10-NEXT: sub r3, r7, r3 93; CHECK-P10-NEXT: lxvdsx vs0, 0, r8 94; CHECK-P10-NEXT: rldicl r3, r3, 60, 4 95; CHECK-P10-NEXT: extswsli r5, r5, 3 96; CHECK-P10-NEXT: addi r3, r3, 1 97; CHECK-P10-NEXT: sub r4, r10, r5 98; CHECK-P10-NEXT: add r5, r9, r10 99; CHECK-P10-NEXT: mtctr r3 100; CHECK-P10-NEXT: add r4, r6, r4 101; CHECK-P10-NEXT: .p2align 4 102; CHECK-P10-NEXT: .LBB0_2: # %_loop_2_do_ 103; CHECK-P10-NEXT: # 104; CHECK-P10-NEXT: lxv vs1, -16(r5) 105; CHECK-P10-NEXT: lxv vs2, 0(r5) 106; CHECK-P10-NEXT: lxv vs3, -16(r4) 107; CHECK-P10-NEXT: xvmaddadp vs1, vs3, vs1 108; CHECK-P10-NEXT: lxv vs4, 0(r4) 109; CHECK-P10-NEXT: xvmaddadp vs2, vs4, vs0 110; CHECK-P10-NEXT: addi r4, r4, 128 111; CHECK-P10-NEXT: stxv vs1, -16(r5) 112; CHECK-P10-NEXT: stxv vs2, 0(r5) 113; CHECK-P10-NEXT: addi r5, r5, 128 114; CHECK-P10-NEXT: bdnz .LBB0_2 115; CHECK-P10-NEXT: # %bb.3: # %_return_bb 116; CHECK-P10-NEXT: blr 117; FIXME: use pair load/store instructions lxvp/stxvp 118test_entry: 119 %_conv5 = ptrtoint ptr %.a to i64 120 %_andi_tmp = and i64 %_conv5, 15 121 %_equ_tmp = icmp eq i64 %_andi_tmp, 0 122 %. = select i1 %_equ_tmp, i32 1, i32 2 123 %_val_m_ = load i32, ptr %.m, align 4 124 %_sub_tmp9 = sub nsw i32 1, %. 125 %_add_tmp10 = add i32 %_sub_tmp9, %_val_m_ 126 %_mod_tmp = srem i32 %_add_tmp10, 16 127 %_sub_tmp11 = sub i32 %_val_m_, %_mod_tmp 128 %_val_n_ = load i32, ptr %.n, align 4 129 %x_rvo_based_addr_17 = getelementptr inbounds [0 x %_elem_type_of_x], ptr %.x, i64 0, i64 -1 130 %_div_tmp = sdiv i32 %_val_n_, 2 131 %_conv16 = sext i32 %_div_tmp to i64 132 %_ind_cast = getelementptr inbounds %_elem_type_of_x, ptr %x_rvo_based_addr_17, i64 %_conv16, i32 0 133 %_val_x_ = load double, ptr %_ind_cast, align 8 134 %.splatinsert = insertelement <2 x double> undef, double %_val_x_, i32 0 135 %.splat = shufflevector <2 x double> %.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 136 %_grt_tmp21 = icmp sgt i32 %., %_sub_tmp11 137 br i1 %_grt_tmp21, label %_return_bb, label %_loop_2_do_.lr.ph 138 139_loop_2_do_.lr.ph: ; preds = %test_entry 140 %_val_lda_ = load i32, ptr %.lda, align 4 141 %_conv = sext i32 %_val_lda_ to i64 142 %_mult_tmp = shl nsw i64 %_conv, 3 143 %_sub_tmp4 = sub nuw nsw i64 -8, %_mult_tmp 144 %y_rvo_based_addr_19 = getelementptr inbounds [0 x %_elem_type_of_y], ptr %.y, i64 0, i64 -1 145 %a_rvo_based_addr_ = getelementptr inbounds i8, ptr %.a, i64 %_sub_tmp4 146 %0 = zext i32 %. to i64 147 %1 = sext i32 %_sub_tmp11 to i64 148 br label %_loop_2_do_ 149 150_loop_2_do_: ; preds = %_loop_2_do_.lr.ph, %_loop_2_do_ 151 %indvars.iv = phi i64 [ %0, %_loop_2_do_.lr.ph ], [ %indvars.iv.next, %_loop_2_do_ ] 152 %_ix_x_len19 = shl nuw nsw i64 %indvars.iv, 3 153 %y_ix_dim_0_20 = getelementptr inbounds %_elem_type_of_y, ptr %y_rvo_based_addr_19, i64 %indvars.iv 154 %2 = load <2 x double>, ptr %y_ix_dim_0_20, align 1 155 %3 = getelementptr %_elem_type_of_y, ptr %y_ix_dim_0_20, i64 2 156 %4 = load <2 x double>, ptr %3, align 1 157 %a_ix_dim_1_ = getelementptr inbounds i8, ptr %a_rvo_based_addr_, i64 %_ix_x_len19 158 %5 = load <2 x double>, ptr %a_ix_dim_1_, align 1 159 %6 = getelementptr i8, ptr %a_ix_dim_1_, i64 16 160 %7 = load <2 x double>, ptr %6, align 1 161 %8 = tail call nsz contract <2 x double> @llvm.fma.v2f64(<2 x double> %5, <2 x double> %2, <2 x double> %2) 162 %9 = tail call nsz contract <2 x double> @llvm.fma.v2f64(<2 x double> %7, <2 x double> %.splat, <2 x double> %4) 163 store <2 x double> %8, ptr %y_ix_dim_0_20, align 1 164 store <2 x double> %9, ptr %3, align 1 165 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 16 166 %_grt_tmp = icmp sgt i64 %indvars.iv.next, %1 167 br i1 %_grt_tmp, label %_return_bb, label %_loop_2_do_ 168 169_return_bb: ; preds = %_loop_2_do_, %test_entry 170 ret void 171} 172 173declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) 174