xref: /llvm-project/llvm/test/CodeGen/PowerPC/pr49509.ll (revision d1924f0474b65fe3189ffd658a12f452e4696c28)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
3
4target datalayout = "E-m:e-p:32:32-i64:64-n32"
5
6define void @test() {
7; CHECK-LABEL: test:
8; CHECK:       # %bb.0: # %bb
9; CHECK-NEXT:    bc 12, 20, .LBB0_2
10; CHECK-NEXT:  # %bb.1: # %bb2
11; CHECK-NEXT:    li 3, 0
12; CHECK-NEXT:    stw 3, 0(3)
13; CHECK-NEXT:    lis 3, 256
14; CHECK-NEXT:    stw 3, 0(3)
15; CHECK-NEXT:    blr
16; CHECK-NEXT:  .LBB0_2: # %bb1
17; CHECK-NEXT:    bclr 4, 20, 0
18; CHECK-NEXT:  # %bb.3: # %bb66
19; CHECK-NEXT:    lwz 4, 12(0)
20; CHECK-NEXT:    lwz 5, 8(0)
21; CHECK-NEXT:    lwz 6, 0(0)
22; CHECK-NEXT:    lwz 7, 4(0)
23; CHECK-NEXT:    lbz 3, 0(3)
24; CHECK-NEXT:    and 5, 5, 6
25; CHECK-NEXT:    and 4, 4, 7
26; CHECK-NEXT:    and 5, 4, 5
27; CHECK-NEXT:    cmpwi 3, 0
28; CHECK-NEXT:    li 3, 0
29; CHECK-NEXT:    cmpwi 1, 5, -1
30; CHECK-NEXT:    li 4, 0
31; CHECK-NEXT:    bc 12, 2, .LBB0_5
32; CHECK-NEXT:  # %bb.4: # %bb66
33; CHECK-NEXT:    lis 4, 256
34; CHECK-NEXT:  .LBB0_5: # %bb66
35; CHECK-NEXT:    cmpwi 5, 5, -1
36; CHECK-NEXT:    lis 5, 512
37; CHECK-NEXT:    beq 5, .LBB0_7
38; CHECK-NEXT:  # %bb.6: # %bb66
39; CHECK-NEXT:    mr 5, 4
40; CHECK-NEXT:  .LBB0_7: # %bb66
41; CHECK-NEXT:    cror 20, 6, 2
42; CHECK-NEXT:    stw 5, 0(3)
43; CHECK-NEXT:    stw 3, 0(3)
44; CHECK-NEXT:    blr
45bb:
46  br i1 undef, label %bb2, label %bb1
47
48bb2:                                              ; preds = %bb
49  %i = select i1 undef, i64 0, i64 72057594037927936
50  store i64 %i, ptr undef, align 8
51  ret void
52
53bb1:                                              ; preds = %bb
54  %i50 = load i8, ptr undef, align 8
55  %i52 = load i128, ptr null, align 8
56  %i62 = icmp eq i8 %i50, 0
57  br i1 undef, label %bb66, label %bb64
58
59bb64:                                             ; preds = %bb63
60  ret void
61
62bb66:                                             ; preds = %bb63
63  %i67 = lshr i128 -1, 0
64  %i68 = xor i128 %i52, -1
65  %i69 = add i128 0, %i68
66  %i70 = and i128 %i67, %i69
67  %i71 = icmp eq i128 %i70, 0
68  %i74 = select i1 %i62, i64 0, i64 72057594037927936
69  %i75 = select i1 %i71, i64 144115188075855872, i64 %i74
70  store i64 %i75, ptr undef, align 8
71  ret void
72}
73