xref: /llvm-project/llvm/test/CodeGen/PowerPC/pr49092.ll (revision eb7d16ea25649909373e324e6ebf36774cabdbfa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
3; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
4; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
5; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \
6; RUN:   -check-prefix=CHECK-P9
7
8define dso_local half @test2(i64 %a, i64 %b) local_unnamed_addr #0 {
9; CHECK-LABEL: test2:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    mflr r0
12; CHECK-NEXT:    stdu r1, -32(r1)
13; CHECK-NEXT:    add r3, r4, r3
14; CHECK-NEXT:    std r0, 48(r1)
15; CHECK-NEXT:    addi r3, r3, 11
16; CHECK-NEXT:    clrlwi r3, r3, 16
17; CHECK-NEXT:    bl __gnu_h2f_ieee
18; CHECK-NEXT:    nop
19; CHECK-NEXT:    addi r1, r1, 32
20; CHECK-NEXT:    ld r0, 16(r1)
21; CHECK-NEXT:    mtlr r0
22; CHECK-NEXT:    blr
23;
24; CHECK-P9-LABEL: test2:
25; CHECK-P9:       # %bb.0: # %entry
26; CHECK-P9-NEXT:    add r3, r4, r3
27; CHECK-P9-NEXT:    addi r3, r3, 11
28; CHECK-P9-NEXT:    clrlwi r3, r3, 16
29; CHECK-P9-NEXT:    mtfprwz f0, r3
30; CHECK-P9-NEXT:    xscvhpdp f1, f0
31; CHECK-P9-NEXT:    blr
32entry:
33  %add = add i64 %b, %a
34  %0 = trunc i64 %add to i16
35  %conv = add i16 %0, 11
36  %call = bitcast i16 %conv to half
37  ret half %call
38}
39attributes #0 = { nounwind }
40