1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -simplify-mir -verify-machineinstrs < %s | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-n32:64" 5target triple = "powerpc64le-grtev4-linux-gnu" 6 7define void @foo(ptr %p1, i64 %v1, i8 %v2, i64 %v3) { 8; CHECK-LABEL: foo: 9; CHECK: # %bb.0: 10; CHECK-NEXT: li 7, 0 11; CHECK-NEXT: std 7, 0(3) 12; CHECK-NEXT: mr 7, 5 13; CHECK-NEXT: rldimi. 7, 4, 8, 0 14; CHECK-NEXT: crnot 20, 2 15; CHECK-NEXT: andi. 5, 5, 1 16; CHECK-NEXT: bc 4, 1, .LBB0_2 17; CHECK-NEXT: # %bb.1: # %bb1 18; CHECK-NEXT: std 4, 0(3) 19; CHECK-NEXT: .LBB0_2: # %bb2 20; CHECK-NEXT: bclr 12, 20, 0 21; CHECK-NEXT: # %bb.3: # %bb3 22; CHECK-NEXT: std 6, 0(3) 23; CHECK-NEXT: blr 24 store i64 0, ptr %p1, align 8 25 %ext = zext i8 %v2 to i64 26 %shift = shl nuw i64 %v1, 8 27 %merge = or i64 %shift, %ext 28 %not0 = icmp ne i64 %merge, 0 29 %bit0 = and i64 %ext, 1 ; and & icmp instructions can be combined 30 %cond1 = icmp eq i64 %bit0, 0 ; to and. and generates condition code to 31 br i1 %cond1, label %bb2, label %bb1 ; be used by this conditional branch 32 33bb1: 34 store i64 %v1, ptr %p1, align 8 35 br label %bb2 36 37bb2: 38 br i1 %not0, label %exit, label %bb3 39 40bb3: 41 store i64 %v3, ptr %p1, align 8 42 br label %exit 43 44exit: 45 ret void 46} 47