xref: /llvm-project/llvm/test/CodeGen/PowerPC/pr41088.ll (revision eb7d16ea25649909373e324e6ebf36774cabdbfa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names \
3; RUN:   -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs < %s | \
4; RUN:   FileCheck %s
5
6%0 = type { [0 x i64], %1, [0 x i64], { i64, ptr }, [0 x i64] }
7%1 = type { [0 x i64], %2, [0 x i64], ptr, [0 x i64] }
8%2 = type { [0 x i64], %3, [0 x i64], %4, [0 x i8], i8, [7 x i8] }
9%3 = type { [0 x i64], { ptr, ptr }, [0 x i64], ptr, [0 x i8], i8, [7 x i8] }
10%4 = type { [0 x i64], { ptr, ptr }, [0 x i64], %5, [0 x i64] }
11%5 = type { [0 x i64], { ptr, ptr }, [0 x i64], ptr, [0 x i64] }
12%6 = type { [0 x i64], i64, [2 x i64] }
13%7 = type { [0 x i64], { ptr, ptr }, [0 x i64], %8, [0 x i64] }
14%8 = type { [0 x i64], ptr, [0 x i32], { i32, i32 }, [0 x i8], i8, [7 x i8] }
15%9 = type { [0 x i64], i64, [0 x i64], [0 x %10], [0 x i8], %11 }
16%10 = type { [0 x i8], i8, [31 x i8] }
17%11 = type {}
18%12 = type { [0 x i64], %13, [0 x i32], i32, [0 x i32], i32, [0 x i32] }
19%13 = type { [0 x i8], i8, [23 x i8] }
20%14 = type { [0 x i64], i64, [0 x i64], %15, [0 x i32], i32, [0 x i8], i8, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [0 x i8], { i8, i8 }, [7 x i8] }
21%15 = type { [0 x i64], { ptr, i64 }, [0 x i64], i64, [0 x i64] }
22%16 = type { [0 x i64], %17, [0 x i64], %18, [0 x i64], %19, [0 x i64], i64, [0 x i8], { i8, i8 }, [6 x i8] }
23%17 = type { [0 x i32], i32, [27 x i32] }
24%18 = type { [0 x i64], i64, [6 x i64] }
25%19 = type { [0 x i8], i8, [103 x i8] }
26%20 = type { [0 x i64], ptr, [0 x i64], ptr, [0 x i64], ptr, [0 x i64] }
27%21 = type { [0 x i64], i64, [0 x i64], ptr, [0 x i64], [2 x i64], [0 x i64] }
28%22 = type { [0 x i8] }
29
30@var = external dso_local unnamed_addr constant <{ ptr, [8 x i8], ptr, [16 x i8] }>, align 8
31
32declare dso_local fastcc { ptr, ptr } @test2(ptr) unnamed_addr
33
34define void @test(ptr %arg, ptr %arg1, ptr %arg2) unnamed_addr personality ptr @personality {
35; CHECK-LABEL: test:
36; CHECK:       # %bb.0: # %bb
37; CHECK-NEXT:    mflr r0
38; CHECK-NEXT:    stdu r1, -32(r1)
39; CHECK-NEXT:    std r0, 48(r1)
40; CHECK-NEXT:    .cfi_def_cfa_offset 32
41; CHECK-NEXT:    .cfi_offset lr, 16
42; CHECK-NEXT:    li r4, 0
43; CHECK-NEXT:  # %bb.1: # %bb9
44; CHECK-NEXT:    bl test5
45; CHECK-NEXT:    nop
46; CHECK-NEXT:    rlwinm r4, r3, 8, 16, 23
47; CHECK-NEXT:  # %bb.2: # %bb12
48; CHECK-NEXT:    bl test3
49; CHECK-NEXT:    nop
50; CHECK-NEXT:    addi r1, r1, 32
51; CHECK-NEXT:    ld r0, 16(r1)
52; CHECK-NEXT:    mtlr r0
53; CHECK-NEXT:    blr
54bb:
55  switch i64 undef, label %bb21 [
56    i64 3, label %bb3
57  ]
58
59bb3:                                              ; preds = %bb
60  switch i3 undef, label %bb4 [
61    i3 0, label %bb9
62    i3 1, label %bb12
63  ]
64
65bb4:                                              ; preds = %bb3
66  unreachable
67
68bb5:                                              ; No predecessors!
69  br label %bb12
70
71bb6:                                              ; No predecessors!
72  br label %bb12
73
74bb7:                                              ; No predecessors!
75  br label %bb12
76
77bb8:                                              ; No predecessors!
78  br label %bb12
79
80bb9:                                              ; preds = %bb3
81  %tmp = call i8 @test5(ptr noalias nonnull readonly align 8 dereferenceable(64) undef), !range !0
82  %tmp10 = zext i8 %tmp to i24
83  %tmp11 = shl nuw nsw i24 %tmp10, 8
84  br label %bb12
85
86bb12:                                             ; preds = %bb9, %bb8, %bb7, %bb6, %bb5, %bb3
87  %tmp13 = phi i24 [ 1024, %bb8 ], [ 768, %bb7 ], [ 512, %bb6 ], [ 256, %bb5 ], [ %tmp11, %bb9 ], [ 0, %bb3 ]
88  %tmp14 = call fastcc align 8 dereferenceable(288) ptr @test3(ptr noalias nonnull readonly align 8 dereferenceable(24) undef, i24 %tmp13)
89  br label %bb22
90
91bb15:                                             ; No predecessors!
92  %tmp16 = invoke fastcc { ptr, ptr } @test2(ptr nonnull align 8 dereferenceable(8) undef)
93          to label %bb17 unwind label %bb18
94
95bb17:                                             ; preds = %bb15
96  invoke void @test4(ptr noalias readonly align 8 dereferenceable(40) @var)
97          to label %bb23 unwind label %bb25
98
99bb18:                                             ; preds = %bb15
100  %tmp19 = landingpad { ptr, i32 }
101          cleanup
102  resume { ptr, i32 } undef
103
104bb20:                                             ; No predecessors!
105  invoke void @test4(ptr noalias readonly align 8 dereferenceable(40) @var)
106          to label %bb24 unwind label %bb25
107
108bb21:                                             ; preds = %bb
109  unreachable
110
111bb22:                                             ; preds = %bb12
112  ret void
113
114bb23:                                             ; preds = %bb17
115  unreachable
116
117bb24:                                             ; preds = %bb20
118  unreachable
119
120bb25:                                             ; preds = %bb20, %bb17
121  %tmp26 = landingpad { ptr, i32 }
122          cleanup
123  resume { ptr, i32 } undef
124}
125
126declare dso_local fastcc ptr @test3(ptr, i24) unnamed_addr
127
128declare i32 @personality(i32, i32, i64, ptr, ptr) unnamed_addr
129
130declare void @test4(ptr) unnamed_addr
131
132declare i8 @test5(ptr) unnamed_addr
133
134!0 = !{i8 0, i8 5}
135