xref: /llvm-project/llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll (revision b922a3621116b404d868af8b74cab25ab78555be) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
5; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s -check-prefix=CHECK-PWR8    \
6; RUN:   -implicit-check-not "\<setb\>"
7
8; Test different patterns with type i64
9
10; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
11define i64 @setb1(i64 %a, i64 %b) {
12; CHECK-LABEL: setb1:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    cmpd r3, r4
15; CHECK-NEXT:    setb r3, cr0
16; CHECK-NEXT:    blr
17;
18; CHECK-PWR8-LABEL: setb1:
19; CHECK-PWR8:       # %bb.0:
20; CHECK-PWR8-NEXT:    xor r5, r3, r4
21; CHECK-PWR8-NEXT:    cmpd r3, r4
22; CHECK-PWR8-NEXT:    li r3, -1
23; CHECK-PWR8-NEXT:    addic r6, r5, -1
24; CHECK-PWR8-NEXT:    subfe r5, r6, r5
25; CHECK-PWR8-NEXT:    isellt r3, r3, r5
26; CHECK-PWR8-NEXT:    blr
27  %t1 = icmp slt i64 %a, %b
28  %t2 = icmp ne i64 %a, %b
29  %t3 = zext i1 %t2 to i64
30  %t4 = select i1 %t1, i64 -1, i64 %t3
31  ret i64 %t4
32}
33
34; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
35define i64 @setb2(i64 %a, i64 %b) {
36; CHECK-LABEL: setb2:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    cmpd r3, r4
39; CHECK-NEXT:    setb r3, cr0
40; CHECK-NEXT:    blr
41;
42; CHECK-PWR8-LABEL: setb2:
43; CHECK-PWR8:       # %bb.0:
44; CHECK-PWR8-NEXT:    xor r5, r3, r4
45; CHECK-PWR8-NEXT:    cmpd r4, r3
46; CHECK-PWR8-NEXT:    li r3, -1
47; CHECK-PWR8-NEXT:    addic r6, r5, -1
48; CHECK-PWR8-NEXT:    subfe r5, r6, r5
49; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
50; CHECK-PWR8-NEXT:    blr
51  %t1 = icmp sgt i64 %b, %a
52  %t2 = icmp ne i64 %a, %b
53  %t3 = zext i1 %t2 to i64
54  %t4 = select i1 %t1, i64 -1, i64 %t3
55  ret i64 %t4
56}
57
58; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
59define i64 @setb3(i64 %a, i64 %b) {
60; CHECK-LABEL: setb3:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    cmpd r3, r4
63; CHECK-NEXT:    setb r3, cr0
64; CHECK-NEXT:    blr
65;
66; CHECK-PWR8-LABEL: setb3:
67; CHECK-PWR8:       # %bb.0:
68; CHECK-PWR8-NEXT:    xor r5, r4, r3
69; CHECK-PWR8-NEXT:    cmpd r3, r4
70; CHECK-PWR8-NEXT:    li r3, -1
71; CHECK-PWR8-NEXT:    addic r6, r5, -1
72; CHECK-PWR8-NEXT:    subfe r5, r6, r5
73; CHECK-PWR8-NEXT:    isellt r3, r3, r5
74; CHECK-PWR8-NEXT:    blr
75  %t1 = icmp slt i64 %a, %b
76  %t2 = icmp ne i64 %b, %a
77  %t3 = zext i1 %t2 to i64
78  %t4 = select i1 %t1, i64 -1, i64 %t3
79  ret i64 %t4
80}
81
82; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
83define i64 @setb4(i64 %a, i64 %b) {
84; CHECK-LABEL: setb4:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    cmpd r3, r4
87; CHECK-NEXT:    setb r3, cr0
88; CHECK-NEXT:    blr
89;
90; CHECK-PWR8-LABEL: setb4:
91; CHECK-PWR8:       # %bb.0:
92; CHECK-PWR8-NEXT:    xor r5, r4, r3
93; CHECK-PWR8-NEXT:    cmpd r4, r3
94; CHECK-PWR8-NEXT:    li r3, -1
95; CHECK-PWR8-NEXT:    addic r6, r5, -1
96; CHECK-PWR8-NEXT:    subfe r5, r6, r5
97; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
98; CHECK-PWR8-NEXT:    blr
99  %t1 = icmp sgt i64 %b, %a
100  %t2 = icmp ne i64 %b, %a
101  %t3 = zext i1 %t2 to i64
102  %t4 = select i1 %t1, i64 -1, i64 %t3
103  ret i64 %t4
104}
105
106; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
107define i64 @setb5(i64 %a, i64 %b) {
108; CHECK-LABEL: setb5:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    cmpd r3, r4
111; CHECK-NEXT:    setb r3, cr0
112; CHECK-NEXT:    blr
113;
114; CHECK-PWR8-LABEL: setb5:
115; CHECK-PWR8:       # %bb.0:
116; CHECK-PWR8-NEXT:    sradi r5, r4, 63
117; CHECK-PWR8-NEXT:    rldicl r6, r3, 1, 63
118; CHECK-PWR8-NEXT:    subc r7, r4, r3
119; CHECK-PWR8-NEXT:    adde r5, r6, r5
120; CHECK-PWR8-NEXT:    cmpd r3, r4
121; CHECK-PWR8-NEXT:    li r3, -1
122; CHECK-PWR8-NEXT:    xori r5, r5, 1
123; CHECK-PWR8-NEXT:    isellt r3, r3, r5
124; CHECK-PWR8-NEXT:    blr
125  %t1 = icmp slt i64 %a, %b
126  %t2 = icmp sgt i64 %a, %b
127  %t3 = zext i1 %t2 to i64
128  %t4 = select i1 %t1, i64 -1, i64 %t3
129  ret i64 %t4
130}
131
132; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
133define i64 @setb6(i64 %a, i64 %b) {
134; CHECK-LABEL: setb6:
135; CHECK:       # %bb.0:
136; CHECK-NEXT:    cmpd r3, r4
137; CHECK-NEXT:    setb r3, cr0
138; CHECK-NEXT:    blr
139;
140; CHECK-PWR8-LABEL: setb6:
141; CHECK-PWR8:       # %bb.0:
142; CHECK-PWR8-NEXT:    sradi r5, r4, 63
143; CHECK-PWR8-NEXT:    rldicl r6, r3, 1, 63
144; CHECK-PWR8-NEXT:    subc r7, r4, r3
145; CHECK-PWR8-NEXT:    adde r5, r6, r5
146; CHECK-PWR8-NEXT:    cmpd r4, r3
147; CHECK-PWR8-NEXT:    li r3, -1
148; CHECK-PWR8-NEXT:    xori r5, r5, 1
149; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
150; CHECK-PWR8-NEXT:    blr
151  %t1 = icmp sgt i64 %b, %a
152  %t2 = icmp sgt i64 %a, %b
153  %t3 = zext i1 %t2 to i64
154  %t4 = select i1 %t1, i64 -1, i64 %t3
155  ret i64 %t4
156}
157
158; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
159define i64 @setb7(i64 %a, i64 %b) {
160; CHECK-LABEL: setb7:
161; CHECK:       # %bb.0:
162; CHECK-NEXT:    cmpd r3, r4
163; CHECK-NEXT:    setb r3, cr0
164; CHECK-NEXT:    blr
165;
166; CHECK-PWR8-LABEL: setb7:
167; CHECK-PWR8:       # %bb.0:
168; CHECK-PWR8-NEXT:    sradi r5, r4, 63
169; CHECK-PWR8-NEXT:    rldicl r6, r3, 1, 63
170; CHECK-PWR8-NEXT:    subc r7, r4, r3
171; CHECK-PWR8-NEXT:    adde r5, r6, r5
172; CHECK-PWR8-NEXT:    cmpd r3, r4
173; CHECK-PWR8-NEXT:    li r3, -1
174; CHECK-PWR8-NEXT:    xori r5, r5, 1
175; CHECK-PWR8-NEXT:    isellt r3, r3, r5
176; CHECK-PWR8-NEXT:    blr
177  %t1 = icmp slt i64 %a, %b
178  %t2 = icmp slt i64 %b, %a
179  %t3 = zext i1 %t2 to i64
180  %t4 = select i1 %t1, i64 -1, i64 %t3
181  ret i64 %t4
182}
183
184; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
185define i64 @setb8(i64 %a, i64 %b) {
186; CHECK-LABEL: setb8:
187; CHECK:       # %bb.0:
188; CHECK-NEXT:    cmpd r3, r4
189; CHECK-NEXT:    setb r3, cr0
190; CHECK-NEXT:    blr
191;
192; CHECK-PWR8-LABEL: setb8:
193; CHECK-PWR8:       # %bb.0:
194; CHECK-PWR8-NEXT:    sradi r5, r4, 63
195; CHECK-PWR8-NEXT:    rldicl r6, r3, 1, 63
196; CHECK-PWR8-NEXT:    subc r7, r4, r3
197; CHECK-PWR8-NEXT:    adde r5, r6, r5
198; CHECK-PWR8-NEXT:    cmpd r4, r3
199; CHECK-PWR8-NEXT:    li r3, -1
200; CHECK-PWR8-NEXT:    xori r5, r5, 1
201; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
202; CHECK-PWR8-NEXT:    blr
203  %t1 = icmp sgt i64 %b, %a
204  %t2 = icmp slt i64 %b, %a
205  %t3 = zext i1 %t2 to i64
206  %t4 = select i1 %t1, i64 -1, i64 %t3
207  ret i64 %t4
208}
209
210; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setgt
211define i64 @setb9(i64 %a, i64 %b) {
212; CHECK-LABEL: setb9:
213; CHECK:       # %bb.0:
214; CHECK-NEXT:    cmpd r3, r4
215; CHECK-NEXT:    setb r3, cr0
216; CHECK-NEXT:    blr
217;
218; CHECK-PWR8-LABEL: setb9:
219; CHECK-PWR8:       # %bb.0:
220; CHECK-PWR8-NEXT:    xor r5, r3, r4
221; CHECK-PWR8-NEXT:    cmpd r3, r4
222; CHECK-PWR8-NEXT:    li r3, 1
223; CHECK-PWR8-NEXT:    subfic r5, r5, 0
224; CHECK-PWR8-NEXT:    subfe r5, r5, r5
225; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
226; CHECK-PWR8-NEXT:    blr
227  %t1 = icmp sgt i64 %a, %b
228  %t2 = icmp ne i64 %a, %b
229  %t3 = sext i1 %t2 to i64
230  %t4 = select i1 %t1, i64 1, i64 %t3
231  ret i64 %t4
232}
233
234; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setlt
235define i64 @setb10(i64 %a, i64 %b) {
236; CHECK-LABEL: setb10:
237; CHECK:       # %bb.0:
238; CHECK-NEXT:    cmpd r3, r4
239; CHECK-NEXT:    setb r3, cr0
240; CHECK-NEXT:    blr
241;
242; CHECK-PWR8-LABEL: setb10:
243; CHECK-PWR8:       # %bb.0:
244; CHECK-PWR8-NEXT:    xor r5, r3, r4
245; CHECK-PWR8-NEXT:    cmpd r4, r3
246; CHECK-PWR8-NEXT:    li r3, 1
247; CHECK-PWR8-NEXT:    subfic r5, r5, 0
248; CHECK-PWR8-NEXT:    subfe r5, r5, r5
249; CHECK-PWR8-NEXT:    isellt r3, r3, r5
250; CHECK-PWR8-NEXT:    blr
251  %t1 = icmp slt i64 %b, %a
252  %t2 = icmp ne i64 %a, %b
253  %t3 = sext i1 %t2 to i64
254  %t4 = select i1 %t1, i64 1, i64 %t3
255  ret i64 %t4
256}
257
258; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setgt
259define i64 @setb11(i64 %a, i64 %b) {
260; CHECK-LABEL: setb11:
261; CHECK:       # %bb.0:
262; CHECK-NEXT:    cmpd r3, r4
263; CHECK-NEXT:    setb r3, cr0
264; CHECK-NEXT:    blr
265;
266; CHECK-PWR8-LABEL: setb11:
267; CHECK-PWR8:       # %bb.0:
268; CHECK-PWR8-NEXT:    xor r5, r4, r3
269; CHECK-PWR8-NEXT:    cmpd r3, r4
270; CHECK-PWR8-NEXT:    li r3, 1
271; CHECK-PWR8-NEXT:    subfic r5, r5, 0
272; CHECK-PWR8-NEXT:    subfe r5, r5, r5
273; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
274; CHECK-PWR8-NEXT:    blr
275  %t1 = icmp sgt i64 %a, %b
276  %t2 = icmp ne i64 %b, %a
277  %t3 = sext i1 %t2 to i64
278  %t4 = select i1 %t1, i64 1, i64 %t3
279  ret i64 %t4
280}
281
282; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setlt
283define i64 @setb12(i64 %a, i64 %b) {
284; CHECK-LABEL: setb12:
285; CHECK:       # %bb.0:
286; CHECK-NEXT:    cmpd r3, r4
287; CHECK-NEXT:    setb r3, cr0
288; CHECK-NEXT:    blr
289;
290; CHECK-PWR8-LABEL: setb12:
291; CHECK-PWR8:       # %bb.0:
292; CHECK-PWR8-NEXT:    xor r5, r4, r3
293; CHECK-PWR8-NEXT:    cmpd r4, r3
294; CHECK-PWR8-NEXT:    li r3, 1
295; CHECK-PWR8-NEXT:    subfic r5, r5, 0
296; CHECK-PWR8-NEXT:    subfe r5, r5, r5
297; CHECK-PWR8-NEXT:    isellt r3, r3, r5
298; CHECK-PWR8-NEXT:    blr
299  %t1 = icmp slt i64 %b, %a
300  %t2 = icmp ne i64 %b, %a
301  %t3 = sext i1 %t2 to i64
302  %t4 = select i1 %t1, i64 1, i64 %t3
303  ret i64 %t4
304}
305
306; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setlt)), setgt
307define i64 @setb13(i64 %a, i64 %b) {
308; CHECK-LABEL: setb13:
309; CHECK:       # %bb.0:
310; CHECK-NEXT:    cmpd r3, r4
311; CHECK-NEXT:    setb r3, cr0
312; CHECK-NEXT:    blr
313;
314; CHECK-PWR8-LABEL: setb13:
315; CHECK-PWR8:       # %bb.0:
316; CHECK-PWR8-NEXT:    sradi r5, r3, 63
317; CHECK-PWR8-NEXT:    rldicl r6, r4, 1, 63
318; CHECK-PWR8-NEXT:    subc r7, r3, r4
319; CHECK-PWR8-NEXT:    adde r5, r6, r5
320; CHECK-PWR8-NEXT:    cmpd r3, r4
321; CHECK-PWR8-NEXT:    li r3, 1
322; CHECK-PWR8-NEXT:    xori r5, r5, 1
323; CHECK-PWR8-NEXT:    neg r5, r5
324; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
325; CHECK-PWR8-NEXT:    blr
326  %t1 = icmp sgt i64 %a, %b
327  %t2 = icmp slt i64 %a, %b
328  %t3 = sext i1 %t2 to i64
329  %t4 = select i1 %t1, i64 1, i64 %t3
330  ret i64 %t4
331}
332
333; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setlt)), setlt
334define i64 @setb14(i64 %a, i64 %b) {
335; CHECK-LABEL: setb14:
336; CHECK:       # %bb.0:
337; CHECK-NEXT:    cmpd r3, r4
338; CHECK-NEXT:    setb r3, cr0
339; CHECK-NEXT:    blr
340;
341; CHECK-PWR8-LABEL: setb14:
342; CHECK-PWR8:       # %bb.0:
343; CHECK-PWR8-NEXT:    sradi r5, r3, 63
344; CHECK-PWR8-NEXT:    rldicl r6, r4, 1, 63
345; CHECK-PWR8-NEXT:    subc r7, r3, r4
346; CHECK-PWR8-NEXT:    adde r5, r6, r5
347; CHECK-PWR8-NEXT:    cmpd r4, r3
348; CHECK-PWR8-NEXT:    li r3, 1
349; CHECK-PWR8-NEXT:    xori r5, r5, 1
350; CHECK-PWR8-NEXT:    neg r5, r5
351; CHECK-PWR8-NEXT:    isellt r3, r3, r5
352; CHECK-PWR8-NEXT:    blr
353  %t1 = icmp slt i64 %b, %a
354  %t2 = icmp slt i64 %a, %b
355  %t3 = sext i1 %t2 to i64
356  %t4 = select i1 %t1, i64 1, i64 %t3
357  ret i64 %t4
358}
359
360; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setgt)), setgt
361define i64 @setb15(i64 %a, i64 %b) {
362; CHECK-LABEL: setb15:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    cmpd r3, r4
365; CHECK-NEXT:    setb r3, cr0
366; CHECK-NEXT:    blr
367;
368; CHECK-PWR8-LABEL: setb15:
369; CHECK-PWR8:       # %bb.0:
370; CHECK-PWR8-NEXT:    sradi r5, r3, 63
371; CHECK-PWR8-NEXT:    rldicl r6, r4, 1, 63
372; CHECK-PWR8-NEXT:    subc r7, r3, r4
373; CHECK-PWR8-NEXT:    adde r5, r6, r5
374; CHECK-PWR8-NEXT:    cmpd r3, r4
375; CHECK-PWR8-NEXT:    li r3, 1
376; CHECK-PWR8-NEXT:    xori r5, r5, 1
377; CHECK-PWR8-NEXT:    neg r5, r5
378; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
379; CHECK-PWR8-NEXT:    blr
380  %t1 = icmp sgt i64 %a, %b
381  %t2 = icmp sgt i64 %b, %a
382  %t3 = sext i1 %t2 to i64
383  %t4 = select i1 %t1, i64 1, i64 %t3
384  ret i64 %t4
385}
386
387; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
388define i64 @setb16(i64 %a, i64 %b) {
389; CHECK-LABEL: setb16:
390; CHECK:       # %bb.0:
391; CHECK-NEXT:    cmpd r3, r4
392; CHECK-NEXT:    setb r3, cr0
393; CHECK-NEXT:    blr
394;
395; CHECK-PWR8-LABEL: setb16:
396; CHECK-PWR8:       # %bb.0:
397; CHECK-PWR8-NEXT:    sradi r5, r3, 63
398; CHECK-PWR8-NEXT:    rldicl r6, r4, 1, 63
399; CHECK-PWR8-NEXT:    subc r7, r3, r4
400; CHECK-PWR8-NEXT:    adde r5, r6, r5
401; CHECK-PWR8-NEXT:    cmpd r4, r3
402; CHECK-PWR8-NEXT:    li r3, 1
403; CHECK-PWR8-NEXT:    xori r5, r5, 1
404; CHECK-PWR8-NEXT:    neg r5, r5
405; CHECK-PWR8-NEXT:    isellt r3, r3, r5
406; CHECK-PWR8-NEXT:    blr
407  %t1 = icmp slt i64 %b, %a
408  %t2 = icmp sgt i64 %b, %a
409  %t3 = sext i1 %t2 to i64
410  %t4 = select i1 %t1, i64 1, i64 %t3
411  ret i64 %t4
412}
413
414; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setgt), seteq
415define i64 @setb17(i64 %a, i64 %b) {
416; CHECK-LABEL: setb17:
417; CHECK:       # %bb.0:
418; CHECK-NEXT:    cmpd r3, r4
419; CHECK-NEXT:    setb r3, cr0
420; CHECK-NEXT:    blr
421;
422; CHECK-PWR8-LABEL: setb17:
423; CHECK-PWR8:       # %bb.0:
424; CHECK-PWR8-NEXT:    cmpd r3, r4
425; CHECK-PWR8-NEXT:    li r5, -1
426; CHECK-PWR8-NEXT:    li r6, 1
427; CHECK-PWR8-NEXT:    iselgt r5, r6, r5
428; CHECK-PWR8-NEXT:    cmpld r3, r4
429; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
430; CHECK-PWR8-NEXT:    blr
431  %t1 = icmp eq i64 %a, %b
432  %t2 = icmp sgt i64 %a, %b
433  %t3 = select i1 %t2, i64 1, i64 -1
434  %t4 = select i1 %t1, i64 0, i64 %t3
435  ret i64 %t4
436}
437
438; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setgt), seteq
439define i64 @setb18(i64 %a, i64 %b) {
440; CHECK-LABEL: setb18:
441; CHECK:       # %bb.0:
442; CHECK-NEXT:    cmpd r3, r4
443; CHECK-NEXT:    setb r3, cr0
444; CHECK-NEXT:    blr
445;
446; CHECK-PWR8-LABEL: setb18:
447; CHECK-PWR8:       # %bb.0:
448; CHECK-PWR8-NEXT:    cmpd r3, r4
449; CHECK-PWR8-NEXT:    li r5, -1
450; CHECK-PWR8-NEXT:    li r6, 1
451; CHECK-PWR8-NEXT:    iselgt r5, r6, r5
452; CHECK-PWR8-NEXT:    cmpld r4, r3
453; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
454; CHECK-PWR8-NEXT:    blr
455  %t1 = icmp eq i64 %b, %a
456  %t2 = icmp sgt i64 %a, %b
457  %t3 = select i1 %t2, i64 1, i64 -1
458  %t4 = select i1 %t1, i64 0, i64 %t3
459  ret i64 %t4
460}
461
462; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setlt), seteq
463define i64 @setb19(i64 %a, i64 %b) {
464; CHECK-LABEL: setb19:
465; CHECK:       # %bb.0:
466; CHECK-NEXT:    cmpd r3, r4
467; CHECK-NEXT:    setb r3, cr0
468; CHECK-NEXT:    blr
469;
470; CHECK-PWR8-LABEL: setb19:
471; CHECK-PWR8:       # %bb.0:
472; CHECK-PWR8-NEXT:    cmpd r4, r3
473; CHECK-PWR8-NEXT:    li r5, -1
474; CHECK-PWR8-NEXT:    li r6, 1
475; CHECK-PWR8-NEXT:    isellt r5, r6, r5
476; CHECK-PWR8-NEXT:    cmpld r3, r4
477; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
478; CHECK-PWR8-NEXT:    blr
479  %t1 = icmp eq i64 %a, %b
480  %t2 = icmp slt i64 %b, %a
481  %t3 = select i1 %t2, i64 1, i64 -1
482  %t4 = select i1 %t1, i64 0, i64 %t3
483  ret i64 %t4
484}
485
486; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setlt), seteq
487define i64 @setb20(i64 %a, i64 %b) {
488; CHECK-LABEL: setb20:
489; CHECK:       # %bb.0:
490; CHECK-NEXT:    cmpd r3, r4
491; CHECK-NEXT:    setb r3, cr0
492; CHECK-NEXT:    blr
493;
494; CHECK-PWR8-LABEL: setb20:
495; CHECK-PWR8:       # %bb.0:
496; CHECK-PWR8-NEXT:    cmpd r4, r3
497; CHECK-PWR8-NEXT:    li r5, -1
498; CHECK-PWR8-NEXT:    li r6, 1
499; CHECK-PWR8-NEXT:    isellt r5, r6, r5
500; CHECK-PWR8-NEXT:    cmpld r4, r3
501; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
502; CHECK-PWR8-NEXT:    blr
503  %t1 = icmp eq i64 %b, %a
504  %t2 = icmp slt i64 %b, %a
505  %t3 = select i1 %t2, i64 1, i64 -1
506  %t4 = select i1 %t1, i64 0, i64 %t3
507  ret i64 %t4
508}
509
510; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setlt), seteq
511define i64 @setb21(i64 %a, i64 %b) {
512; CHECK-LABEL: setb21:
513; CHECK:       # %bb.0:
514; CHECK-NEXT:    cmpd r3, r4
515; CHECK-NEXT:    setb r3, cr0
516; CHECK-NEXT:    blr
517;
518; CHECK-PWR8-LABEL: setb21:
519; CHECK-PWR8:       # %bb.0:
520; CHECK-PWR8-NEXT:    cmpd r3, r4
521; CHECK-PWR8-NEXT:    li r5, 1
522; CHECK-PWR8-NEXT:    li r6, -1
523; CHECK-PWR8-NEXT:    isellt r5, r6, r5
524; CHECK-PWR8-NEXT:    cmpld r3, r4
525; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
526; CHECK-PWR8-NEXT:    blr
527  %t1 = icmp eq i64 %a, %b
528  %t2 = icmp slt i64 %a, %b
529  %t3 = select i1 %t2, i64 -1, i64 1
530  %t4 = select i1 %t1, i64 0, i64 %t3
531  ret i64 %t4
532}
533
534; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setlt), seteq
535define i64 @setb22(i64 %a, i64 %b) {
536; CHECK-LABEL: setb22:
537; CHECK:       # %bb.0:
538; CHECK-NEXT:    cmpd r3, r4
539; CHECK-NEXT:    setb r3, cr0
540; CHECK-NEXT:    blr
541;
542; CHECK-PWR8-LABEL: setb22:
543; CHECK-PWR8:       # %bb.0:
544; CHECK-PWR8-NEXT:    cmpd r3, r4
545; CHECK-PWR8-NEXT:    li r5, 1
546; CHECK-PWR8-NEXT:    li r6, -1
547; CHECK-PWR8-NEXT:    isellt r5, r6, r5
548; CHECK-PWR8-NEXT:    cmpld r4, r3
549; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
550; CHECK-PWR8-NEXT:    blr
551  %t1 = icmp eq i64 %b, %a
552  %t2 = icmp slt i64 %a, %b
553  %t3 = select i1 %t2, i64 -1, i64 1
554  %t4 = select i1 %t1, i64 0, i64 %t3
555  ret i64 %t4
556}
557
558; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
559define i64 @setb23(i64 %a, i64 %b) {
560; CHECK-LABEL: setb23:
561; CHECK:       # %bb.0:
562; CHECK-NEXT:    cmpd r3, r4
563; CHECK-NEXT:    setb r3, cr0
564; CHECK-NEXT:    blr
565;
566; CHECK-PWR8-LABEL: setb23:
567; CHECK-PWR8:       # %bb.0:
568; CHECK-PWR8-NEXT:    cmpd r4, r3
569; CHECK-PWR8-NEXT:    li r5, 1
570; CHECK-PWR8-NEXT:    li r6, -1
571; CHECK-PWR8-NEXT:    iselgt r5, r6, r5
572; CHECK-PWR8-NEXT:    cmpld r3, r4
573; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
574; CHECK-PWR8-NEXT:    blr
575  %t1 = icmp eq i64 %a, %b
576  %t2 = icmp sgt i64 %b, %a
577  %t3 = select i1 %t2, i64 -1, i64 1
578  %t4 = select i1 %t1, i64 0, i64 %t3
579  ret i64 %t4
580}
581
582; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
583define i64 @setb24(i64 %a, i64 %b) {
584; CHECK-LABEL: setb24:
585; CHECK:       # %bb.0:
586; CHECK-NEXT:    cmpd r3, r4
587; CHECK-NEXT:    setb r3, cr0
588; CHECK-NEXT:    blr
589;
590; CHECK-PWR8-LABEL: setb24:
591; CHECK-PWR8:       # %bb.0:
592; CHECK-PWR8-NEXT:    cmpd r4, r3
593; CHECK-PWR8-NEXT:    li r5, 1
594; CHECK-PWR8-NEXT:    li r6, -1
595; CHECK-PWR8-NEXT:    iselgt r5, r6, r5
596; CHECK-PWR8-NEXT:    cmpld r4, r3
597; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
598; CHECK-PWR8-NEXT:    blr
599  %t1 = icmp eq i64 %b, %a
600  %t2 = icmp sgt i64 %b, %a
601  %t3 = select i1 %t2, i64 -1, i64 1
602  %t4 = select i1 %t1, i64 0, i64 %t3
603  ret i64 %t4
604}
605; end all patterns testing for i64
606
607; Test with swapping the input parameters
608
609; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
610define i64 @setb25(i64 %a, i64 %b) {
611; CHECK-LABEL: setb25:
612; CHECK:       # %bb.0:
613; CHECK-NEXT:    cmpd r4, r3
614; CHECK-NEXT:    setb r3, cr0
615; CHECK-NEXT:    blr
616;
617; CHECK-PWR8-LABEL: setb25:
618; CHECK-PWR8:       # %bb.0:
619; CHECK-PWR8-NEXT:    xor r5, r4, r3
620; CHECK-PWR8-NEXT:    cmpd r4, r3
621; CHECK-PWR8-NEXT:    li r3, -1
622; CHECK-PWR8-NEXT:    addic r6, r5, -1
623; CHECK-PWR8-NEXT:    subfe r5, r6, r5
624; CHECK-PWR8-NEXT:    isellt r3, r3, r5
625; CHECK-PWR8-NEXT:    blr
626  %t1 = icmp slt i64 %b, %a
627  %t2 = icmp ne i64 %b, %a
628  %t3 = zext i1 %t2 to i64
629  %t4 = select i1 %t1, i64 -1, i64 %t3
630  ret i64 %t4
631}
632
633; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
634define i64 @setb26(i64 %a, i64 %b) {
635; CHECK-LABEL: setb26:
636; CHECK:       # %bb.0:
637; CHECK-NEXT:    cmpd r4, r3
638; CHECK-NEXT:    setb r3, cr0
639; CHECK-NEXT:    blr
640;
641; CHECK-PWR8-LABEL: setb26:
642; CHECK-PWR8:       # %bb.0:
643; CHECK-PWR8-NEXT:    xor r5, r4, r3
644; CHECK-PWR8-NEXT:    cmpd r3, r4
645; CHECK-PWR8-NEXT:    li r3, -1
646; CHECK-PWR8-NEXT:    addic r6, r5, -1
647; CHECK-PWR8-NEXT:    subfe r5, r6, r5
648; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
649; CHECK-PWR8-NEXT:    blr
650  %t1 = icmp sgt i64 %a, %b
651  %t2 = icmp ne i64 %b, %a
652  %t3 = zext i1 %t2 to i64
653  %t4 = select i1 %t1, i64 -1, i64 %t3
654  ret i64 %t4
655}
656
657; Test with different scalar integer type for selected value
658; i32/i16/i8 rather than i64 above
659
660; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
661define i64 @setb27(i64 %a, i64 %b) {
662; CHECK-LABEL: setb27:
663; CHECK:       # %bb.0:
664; CHECK-NEXT:    cmpd r3, r4
665; CHECK-NEXT:    setb r3, cr0
666; CHECK-NEXT:    blr
667;
668; CHECK-PWR8-LABEL: setb27:
669; CHECK-PWR8:       # %bb.0:
670; CHECK-PWR8-NEXT:    xor r5, r4, r3
671; CHECK-PWR8-NEXT:    cmpd r3, r4
672; CHECK-PWR8-NEXT:    li r3, -1
673; CHECK-PWR8-NEXT:    addic r6, r5, -1
674; CHECK-PWR8-NEXT:    subfe r5, r6, r5
675; CHECK-PWR8-NEXT:    isellt r3, r3, r5
676; CHECK-PWR8-NEXT:    extsw r3, r3
677; CHECK-PWR8-NEXT:    blr
678  %t1 = icmp slt i64 %a, %b
679  %t2 = icmp ne i64 %b, %a
680  %t3 = zext i1 %t2 to i32
681  %t4 = select i1 %t1, i32 -1, i32 %t3
682  %t5 = sext i32 %t4 to i64
683  ret i64 %t5
684}
685
686; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
687define i64 @setb28(i64 %a, i64 %b) {
688; CHECK-LABEL: setb28:
689; CHECK:       # %bb.0:
690; CHECK-NEXT:    cmpd r3, r4
691; CHECK-NEXT:    setb r3, cr0
692; CHECK-NEXT:    blr
693;
694; CHECK-PWR8-LABEL: setb28:
695; CHECK-PWR8:       # %bb.0:
696; CHECK-PWR8-NEXT:    xor r5, r4, r3
697; CHECK-PWR8-NEXT:    cmpd r4, r3
698; CHECK-PWR8-NEXT:    li r3, -1
699; CHECK-PWR8-NEXT:    addic r6, r5, -1
700; CHECK-PWR8-NEXT:    subfe r5, r6, r5
701; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
702; CHECK-PWR8-NEXT:    extsw r3, r3
703; CHECK-PWR8-NEXT:    blr
704  %t1 = icmp sgt i64 %b, %a
705  %t2 = icmp ne i64 %b, %a
706  %t3 = zext i1 %t2 to i16
707  %t4 = select i1 %t1, i16 -1, i16 %t3
708  %t5 = sext i16 %t4 to i64
709  ret i64 %t5
710}
711
712; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
713define i64 @setb29(i64 %a, i64 %b) {
714; CHECK-LABEL: setb29:
715; CHECK:       # %bb.0:
716; CHECK-NEXT:    cmpd r3, r4
717; CHECK-NEXT:    setb r3, cr0
718; CHECK-NEXT:    clrldi r3, r3, 56
719; CHECK-NEXT:    blr
720;
721; CHECK-PWR8-LABEL: setb29:
722; CHECK-PWR8:       # %bb.0:
723; CHECK-PWR8-NEXT:    sradi r5, r4, 63
724; CHECK-PWR8-NEXT:    rldicl r6, r3, 1, 63
725; CHECK-PWR8-NEXT:    subc r7, r4, r3
726; CHECK-PWR8-NEXT:    adde r5, r6, r5
727; CHECK-PWR8-NEXT:    cmpd r3, r4
728; CHECK-PWR8-NEXT:    li r3, -1
729; CHECK-PWR8-NEXT:    xori r5, r5, 1
730; CHECK-PWR8-NEXT:    isellt r3, r3, r5
731; CHECK-PWR8-NEXT:    clrldi r3, r3, 56
732; CHECK-PWR8-NEXT:    blr
733  %t1 = icmp slt i64 %a, %b
734  %t2 = icmp sgt i64 %a, %b
735  %t3 = zext i1 %t2 to i8
736  %t4 = select i1 %t1, i8 -1, i8 %t3
737  %t5 = zext i8 %t4 to i64
738  ret i64 %t5
739}
740
741; Testings to cover different comparison opcodes
742; Test with integer type i32/i16/i8 for input parameter
743
744; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
745define i64 @setbsw1(i32 %a, i32 %b) {
746; CHECK-LABEL: setbsw1:
747; CHECK:       # %bb.0:
748; CHECK-NEXT:    cmpw r3, r4
749; CHECK-NEXT:    setb r3, cr0
750; CHECK-NEXT:    blr
751;
752; CHECK-PWR8-LABEL: setbsw1:
753; CHECK-PWR8:       # %bb.0:
754; CHECK-PWR8-NEXT:    xor r5, r3, r4
755; CHECK-PWR8-NEXT:    cmpw r3, r4
756; CHECK-PWR8-NEXT:    li r3, -1
757; CHECK-PWR8-NEXT:    cntlzw r5, r5
758; CHECK-PWR8-NEXT:    srwi r5, r5, 5
759; CHECK-PWR8-NEXT:    xori r5, r5, 1
760; CHECK-PWR8-NEXT:    isellt r3, r3, r5
761; CHECK-PWR8-NEXT:    blr
762  %t1 = icmp slt i32 %a, %b
763  %t2 = icmp ne i32 %a, %b
764  %t3 = zext i1 %t2 to i64
765  %t4 = select i1 %t1, i64 -1, i64 %t3
766  ret i64 %t4
767}
768
769; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
770define i64 @setbsw2(i32 %a, i32 %b) {
771; CHECK-LABEL: setbsw2:
772; CHECK:       # %bb.0:
773; CHECK-NEXT:    cmpw r3, r4
774; CHECK-NEXT:    setb r3, cr0
775; CHECK-NEXT:    blr
776;
777; CHECK-PWR8-LABEL: setbsw2:
778; CHECK-PWR8:       # %bb.0:
779; CHECK-PWR8-NEXT:    xor r5, r3, r4
780; CHECK-PWR8-NEXT:    cmpw r4, r3
781; CHECK-PWR8-NEXT:    li r3, -1
782; CHECK-PWR8-NEXT:    cntlzw r5, r5
783; CHECK-PWR8-NEXT:    srwi r5, r5, 5
784; CHECK-PWR8-NEXT:    xori r5, r5, 1
785; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
786; CHECK-PWR8-NEXT:    blr
787  %t1 = icmp sgt i32 %b, %a
788  %t2 = icmp ne i32 %a, %b
789  %t3 = zext i1 %t2 to i64
790  %t4 = select i1 %t1, i64 -1, i64 %t3
791  ret i64 %t4
792}
793
794; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
795define i64 @setbsw3(i32 %a, i32 %b) {
796; CHECK-LABEL: setbsw3:
797; CHECK:       # %bb.0:
798; CHECK-NEXT:    cmpw r3, r4
799; CHECK-NEXT:    setb r3, cr0
800; CHECK-NEXT:    blr
801;
802; CHECK-PWR8-LABEL: setbsw3:
803; CHECK-PWR8:       # %bb.0:
804; CHECK-PWR8-NEXT:    cmpw r4, r3
805; CHECK-PWR8-NEXT:    li r5, 1
806; CHECK-PWR8-NEXT:    li r6, -1
807; CHECK-PWR8-NEXT:    iselgt r5, r6, r5
808; CHECK-PWR8-NEXT:    cmplw r3, r4
809; CHECK-PWR8-NEXT:    iseleq r3, 0, r5
810; CHECK-PWR8-NEXT:    blr
811  %t1 = icmp eq i32 %a, %b
812  %t2 = icmp sgt i32 %b, %a
813  %t3 = select i1 %t2, i64 -1, i64 1
814  %t4 = select i1 %t1, i64 0, i64 %t3
815  ret i64 %t4
816}
817
818; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
819define i64 @setbsh1(i16 signext %a, i16 signext %b) {
820; CHECK-LABEL: setbsh1:
821; CHECK:       # %bb.0:
822; CHECK-NEXT:    cmpw r3, r4
823; CHECK-NEXT:    setb r3, cr0
824; CHECK-NEXT:    blr
825;
826; CHECK-PWR8-LABEL: setbsh1:
827; CHECK-PWR8:       # %bb.0:
828; CHECK-PWR8-NEXT:    xor r5, r4, r3
829; CHECK-PWR8-NEXT:    cmpw r3, r4
830; CHECK-PWR8-NEXT:    li r3, -1
831; CHECK-PWR8-NEXT:    cntlzw r5, r5
832; CHECK-PWR8-NEXT:    srwi r5, r5, 5
833; CHECK-PWR8-NEXT:    xori r5, r5, 1
834; CHECK-PWR8-NEXT:    isellt r3, r3, r5
835; CHECK-PWR8-NEXT:    blr
836  %t1 = icmp slt i16 %a, %b
837  %t2 = icmp ne i16 %b, %a
838  %t3 = zext i1 %t2 to i64
839  %t4 = select i1 %t1, i64 -1, i64 %t3
840  ret i64 %t4
841}
842
843; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
844define i64 @setbsh2(i16 signext %a, i16 signext %b) {
845; CHECK-LABEL: setbsh2:
846; CHECK:       # %bb.0:
847; CHECK-NEXT:    cmpw r3, r4
848; CHECK-NEXT:    setb r3, cr0
849; CHECK-NEXT:    blr
850;
851; CHECK-PWR8-LABEL: setbsh2:
852; CHECK-PWR8:       # %bb.0:
853; CHECK-PWR8-NEXT:    xor r5, r4, r3
854; CHECK-PWR8-NEXT:    cmpw r4, r3
855; CHECK-PWR8-NEXT:    li r3, -1
856; CHECK-PWR8-NEXT:    cntlzw r5, r5
857; CHECK-PWR8-NEXT:    srwi r5, r5, 5
858; CHECK-PWR8-NEXT:    xori r5, r5, 1
859; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
860; CHECK-PWR8-NEXT:    blr
861  %t1 = icmp sgt i16 %b, %a
862  %t2 = icmp ne i16 %b, %a
863  %t3 = zext i1 %t2 to i64
864  %t4 = select i1 %t1, i64 -1, i64 %t3
865  ret i64 %t4
866}
867
868; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
869define i64 @setbsc1(i8 %a, i8 %b) {
870; CHECK-LABEL: setbsc1:
871; CHECK:       # %bb.0:
872; CHECK-NEXT:    extsb r4, r4
873; CHECK-NEXT:    extsb r3, r3
874; CHECK-NEXT:    cmpw r3, r4
875; CHECK-NEXT:    setb r3, cr0
876; CHECK-NEXT:    blr
877;
878; CHECK-PWR8-LABEL: setbsc1:
879; CHECK-PWR8:       # %bb.0:
880; CHECK-PWR8-NEXT:    extsb r4, r4
881; CHECK-PWR8-NEXT:    extsb r3, r3
882; CHECK-PWR8-NEXT:    sub r5, r4, r3
883; CHECK-PWR8-NEXT:    cmpw r3, r4
884; CHECK-PWR8-NEXT:    li r3, -1
885; CHECK-PWR8-NEXT:    rldicl r5, r5, 1, 63
886; CHECK-PWR8-NEXT:    isellt r3, r3, r5
887; CHECK-PWR8-NEXT:    blr
888  %t1 = icmp slt i8 %a, %b
889  %t2 = icmp sgt i8 %a, %b
890  %t3 = zext i1 %t2 to i64
891  %t4 = select i1 %t1, i64 -1, i64 %t3
892  ret i64 %t4
893}
894
895; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
896define i64 @setbsc2(i8 %a, i8 %b) {
897; CHECK-LABEL: setbsc2:
898; CHECK:       # %bb.0:
899; CHECK-NEXT:    extsb r4, r4
900; CHECK-NEXT:    extsb r3, r3
901; CHECK-NEXT:    cmpw r3, r4
902; CHECK-NEXT:    setb r3, cr0
903; CHECK-NEXT:    blr
904;
905; CHECK-PWR8-LABEL: setbsc2:
906; CHECK-PWR8:       # %bb.0:
907; CHECK-PWR8-NEXT:    extsb r4, r4
908; CHECK-PWR8-NEXT:    extsb r3, r3
909; CHECK-PWR8-NEXT:    sub r5, r4, r3
910; CHECK-PWR8-NEXT:    cmpw r4, r3
911; CHECK-PWR8-NEXT:    li r3, -1
912; CHECK-PWR8-NEXT:    rldicl r5, r5, 1, 63
913; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
914; CHECK-PWR8-NEXT:    blr
915  %t1 = icmp sgt i8 %b, %a
916  %t2 = icmp sgt i8 %a, %b
917  %t3 = zext i1 %t2 to i64
918  %t4 = select i1 %t1, i64 -1, i64 %t3
919  ret i64 %t4
920}
921
922; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
923define i64 @setbsc3(i4 %a, i4 %b) {
924; CHECK-LABEL: setbsc3:
925; CHECK:       # %bb.0:
926; CHECK-NEXT:    slwi r4, r4, 28
927; CHECK-NEXT:    slwi r3, r3, 28
928; CHECK-NEXT:    srawi r4, r4, 28
929; CHECK-NEXT:    srawi r3, r3, 28
930; CHECK-NEXT:    cmpw r3, r4
931; CHECK-NEXT:    setb r3, cr0
932; CHECK-NEXT:    blr
933;
934; CHECK-PWR8-LABEL: setbsc3:
935; CHECK-PWR8:       # %bb.0:
936; CHECK-PWR8-NEXT:    slwi r4, r4, 28
937; CHECK-PWR8-NEXT:    slwi r3, r3, 28
938; CHECK-PWR8-NEXT:    srawi r4, r4, 28
939; CHECK-PWR8-NEXT:    srawi r3, r3, 28
940; CHECK-PWR8-NEXT:    cmpw r3, r4
941; CHECK-PWR8-NEXT:    sub r5, r4, r3
942; CHECK-PWR8-NEXT:    li r3, -1
943; CHECK-PWR8-NEXT:    rldicl r5, r5, 1, 63
944; CHECK-PWR8-NEXT:    isellt r3, r3, r5
945; CHECK-PWR8-NEXT:    blr
946  %t1 = icmp slt i4 %a, %b
947  %t2 = icmp slt i4 %b, %a
948  %t3 = zext i1 %t2 to i64
949  %t4 = select i1 %t1, i64 -1, i64 %t3
950  ret i64 %t4
951}
952
953; Test with unsigned integer type i64/i32/i16/i8 for input parameter
954
955; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setult)), setugt
956define i64 @setbud1(i64 %a, i64 %b) {
957; CHECK-LABEL: setbud1:
958; CHECK:       # %bb.0:
959; CHECK-NEXT:    cmpld r3, r4
960; CHECK-NEXT:    setb r3, cr0
961; CHECK-NEXT:    blr
962;
963; CHECK-PWR8-LABEL: setbud1:
964; CHECK-PWR8:       # %bb.0:
965; CHECK-PWR8-NEXT:    subc r5, r4, r3
966; CHECK-PWR8-NEXT:    cmpld r4, r3
967; CHECK-PWR8-NEXT:    li r3, -1
968; CHECK-PWR8-NEXT:    subfe r5, r4, r4
969; CHECK-PWR8-NEXT:    neg r5, r5
970; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
971; CHECK-PWR8-NEXT:    blr
972  %t1 = icmp ugt i64 %b, %a
973  %t2 = icmp ult i64 %b, %a
974  %t3 = zext i1 %t2 to i64
975  %t4 = select i1 %t1, i64 -1, i64 %t3
976  ret i64 %t4
977}
978
979; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setugt
980define i64 @setbud2(i64 %a, i64 %b) {
981; CHECK-LABEL: setbud2:
982; CHECK:       # %bb.0:
983; CHECK-NEXT:    cmpld r3, r4
984; CHECK-NEXT:    setb r3, cr0
985; CHECK-NEXT:    blr
986;
987; CHECK-PWR8-LABEL: setbud2:
988; CHECK-PWR8:       # %bb.0:
989; CHECK-PWR8-NEXT:    xor r5, r3, r4
990; CHECK-PWR8-NEXT:    cmpld r3, r4
991; CHECK-PWR8-NEXT:    li r3, 1
992; CHECK-PWR8-NEXT:    subfic r5, r5, 0
993; CHECK-PWR8-NEXT:    subfe r5, r5, r5
994; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
995; CHECK-PWR8-NEXT:    blr
996  %t1 = icmp ugt i64 %a, %b
997  %t2 = icmp ne i64 %a, %b
998  %t3 = sext i1 %t2 to i64
999  %t4 = select i1 %t1, i64 1, i64 %t3
1000  ret i64 %t4
1001}
1002
1003; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setugt), seteq
1004define i64 @setbud3(i64 %a, i64 %b) {
1005; CHECK-LABEL: setbud3:
1006; CHECK:       # %bb.0:
1007; CHECK-NEXT:    cmpld r3, r4
1008; CHECK-NEXT:    setb r3, cr0
1009; CHECK-NEXT:    blr
1010;
1011; CHECK-PWR8-LABEL: setbud3:
1012; CHECK-PWR8:       # %bb.0:
1013; CHECK-PWR8-NEXT:    cmpld r4, r3
1014; CHECK-PWR8-NEXT:    li r3, 1
1015; CHECK-PWR8-NEXT:    li r4, -1
1016; CHECK-PWR8-NEXT:    iselgt r3, r4, r3
1017; CHECK-PWR8-NEXT:    iseleq r3, 0, r3
1018; CHECK-PWR8-NEXT:    blr
1019  %t1 = icmp eq i64 %b, %a
1020  %t2 = icmp ugt i64 %b, %a
1021  %t3 = select i1 %t2, i64 -1, i64 1
1022  %t4 = select i1 %t1, i64 0, i64 %t3
1023  ret i64 %t4
1024}
1025
1026; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setult
1027define i64 @setbuw1(i32 %a, i32 %b) {
1028; CHECK-LABEL: setbuw1:
1029; CHECK:       # %bb.0:
1030; CHECK-NEXT:    cmplw r3, r4
1031; CHECK-NEXT:    setb r3, cr0
1032; CHECK-NEXT:    blr
1033;
1034; CHECK-PWR8-LABEL: setbuw1:
1035; CHECK-PWR8:       # %bb.0:
1036; CHECK-PWR8-NEXT:    xor r5, r3, r4
1037; CHECK-PWR8-NEXT:    cmplw r4, r3
1038; CHECK-PWR8-NEXT:    li r3, 1
1039; CHECK-PWR8-NEXT:    cntlzw r5, r5
1040; CHECK-PWR8-NEXT:    srwi r5, r5, 5
1041; CHECK-PWR8-NEXT:    xori r5, r5, 1
1042; CHECK-PWR8-NEXT:    neg r5, r5
1043; CHECK-PWR8-NEXT:    isellt r3, r3, r5
1044; CHECK-PWR8-NEXT:    blr
1045  %t1 = icmp ult i32 %b, %a
1046  %t2 = icmp ne i32 %a, %b
1047  %t3 = sext i1 %t2 to i64
1048  %t4 = select i1 %t1, i64 1, i64 %t3
1049  ret i64 %t4
1050}
1051
1052; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setugt
1053define i64 @setbuw2(i32 %a, i32 %b) {
1054; CHECK-LABEL: setbuw2:
1055; CHECK:       # %bb.0:
1056; CHECK-NEXT:    cmplw r3, r4
1057; CHECK-NEXT:    setb r3, cr0
1058; CHECK-NEXT:    blr
1059;
1060; CHECK-PWR8-LABEL: setbuw2:
1061; CHECK-PWR8:       # %bb.0:
1062; CHECK-PWR8-NEXT:    xor r5, r4, r3
1063; CHECK-PWR8-NEXT:    cmplw r3, r4
1064; CHECK-PWR8-NEXT:    li r3, 1
1065; CHECK-PWR8-NEXT:    cntlzw r5, r5
1066; CHECK-PWR8-NEXT:    srwi r5, r5, 5
1067; CHECK-PWR8-NEXT:    xori r5, r5, 1
1068; CHECK-PWR8-NEXT:    neg r5, r5
1069; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
1070; CHECK-PWR8-NEXT:    blr
1071  %t1 = icmp ugt i32 %a, %b
1072  %t2 = icmp ne i32 %b, %a
1073  %t3 = sext i1 %t2 to i64
1074  %t4 = select i1 %t1, i64 1, i64 %t3
1075  ret i64 %t4
1076}
1077
1078; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setult
1079define i64 @setbuh(i16 %a, i16 %b) {
1080; CHECK-LABEL: setbuh:
1081; CHECK:       # %bb.0:
1082; CHECK-NEXT:    clrlwi r4, r4, 16
1083; CHECK-NEXT:    clrlwi r3, r3, 16
1084; CHECK-NEXT:    cmplw r3, r4
1085; CHECK-NEXT:    setb r3, cr0
1086; CHECK-NEXT:    blr
1087;
1088; CHECK-PWR8-LABEL: setbuh:
1089; CHECK-PWR8:       # %bb.0:
1090; CHECK-PWR8-NEXT:    clrlwi r3, r3, 16
1091; CHECK-PWR8-NEXT:    clrlwi r4, r4, 16
1092; CHECK-PWR8-NEXT:    xor r5, r4, r3
1093; CHECK-PWR8-NEXT:    cmplw r4, r3
1094; CHECK-PWR8-NEXT:    li r3, 1
1095; CHECK-PWR8-NEXT:    cntlzw r5, r5
1096; CHECK-PWR8-NEXT:    srwi r5, r5, 5
1097; CHECK-PWR8-NEXT:    xori r5, r5, 1
1098; CHECK-PWR8-NEXT:    neg r5, r5
1099; CHECK-PWR8-NEXT:    isellt r3, r3, r5
1100; CHECK-PWR8-NEXT:    blr
1101  %t1 = icmp ult i16 %b, %a
1102  %t2 = icmp ne i16 %b, %a
1103  %t3 = sext i1 %t2 to i64
1104  %t4 = select i1 %t1, i64 1, i64 %t3
1105  ret i64 %t4
1106}
1107
1108; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setult)), setugt
1109define i64 @setbuc(i8 %a, i8 %b) {
1110; CHECK-LABEL: setbuc:
1111; CHECK:       # %bb.0:
1112; CHECK-NEXT:    clrlwi r4, r4, 24
1113; CHECK-NEXT:    clrlwi r3, r3, 24
1114; CHECK-NEXT:    cmplw r3, r4
1115; CHECK-NEXT:    setb r3, cr0
1116; CHECK-NEXT:    blr
1117;
1118; CHECK-PWR8-LABEL: setbuc:
1119; CHECK-PWR8:       # %bb.0:
1120; CHECK-PWR8-NEXT:    clrlwi r3, r3, 24
1121; CHECK-PWR8-NEXT:    clrlwi r4, r4, 24
1122; CHECK-PWR8-NEXT:    clrldi r5, r3, 32
1123; CHECK-PWR8-NEXT:    clrldi r6, r4, 32
1124; CHECK-PWR8-NEXT:    cmplw r3, r4
1125; CHECK-PWR8-NEXT:    li r3, 1
1126; CHECK-PWR8-NEXT:    sub r5, r5, r6
1127; CHECK-PWR8-NEXT:    sradi r5, r5, 63
1128; CHECK-PWR8-NEXT:    iselgt r3, r3, r5
1129; CHECK-PWR8-NEXT:    blr
1130  %t1 = icmp ugt i8 %a, %b
1131  %t2 = icmp ult i8 %a, %b
1132  %t3 = sext i1 %t2 to i64
1133  %t4 = select i1 %t1, i64 1, i64 %t3
1134  ret i64 %t4
1135}
1136
1137; Test with float/double/float128 for input parameter
1138
1139; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
1140define i64 @setbf1(float %a, float %b) {
1141; CHECK-LABEL: setbf1:
1142; CHECK:       # %bb.0:
1143; CHECK-NEXT:    fcmpu cr0, f1, f2
1144; CHECK-NEXT:    setb r3, cr0
1145; CHECK-NEXT:    blr
1146;
1147; CHECK-PWR8-LABEL: setbf1:
1148; CHECK-PWR8:       # %bb.0:
1149; CHECK-PWR8-NEXT:    fcmpu cr0, f2, f1
1150; CHECK-PWR8-NEXT:    li r3, 0
1151; CHECK-PWR8-NEXT:    li r4, 1
1152; CHECK-PWR8-NEXT:    isellt r3, r4, r3
1153; CHECK-PWR8-NEXT:    fcmpu cr0, f1, f2
1154; CHECK-PWR8-NEXT:    li r4, -1
1155; CHECK-PWR8-NEXT:    isellt r3, r4, r3
1156; CHECK-PWR8-NEXT:    blr
1157  %t1 = fcmp nnan olt float %a, %b
1158  %t2 = fcmp nnan olt float %b, %a
1159  %t3 = zext i1 %t2 to i64
1160  %t4 = select i1 %t1, i64 -1, i64 %t3
1161  ret i64 %t4
1162}
1163
1164; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
1165define i64 @setbf2(float %a, float %b) {
1166; CHECK-LABEL: setbf2:
1167; CHECK:       # %bb.0:
1168; CHECK-NEXT:    fcmpu cr0, f1, f2
1169; CHECK-NEXT:    setb r3, cr0
1170; CHECK-NEXT:    blr
1171;
1172; CHECK-PWR8-LABEL: setbf2:
1173; CHECK-PWR8:       # %bb.0:
1174; CHECK-PWR8-NEXT:    fcmpu cr0, f2, f1
1175; CHECK-PWR8-NEXT:    li r3, 0
1176; CHECK-PWR8-NEXT:    li r4, 1
1177; CHECK-PWR8-NEXT:    isellt r3, r4, r3
1178; CHECK-PWR8-NEXT:    li r4, -1
1179; CHECK-PWR8-NEXT:    iselgt r3, r4, r3
1180; CHECK-PWR8-NEXT:    blr
1181  %t1 = fcmp nnan ogt float %b, %a
1182  %t2 = fcmp nnan olt float %b, %a
1183  %t3 = zext i1 %t2 to i64
1184  %t4 = select i1 %t1, i64 -1, i64 %t3
1185  ret i64 %t4
1186}
1187
1188; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
1189define i64 @setbdf1(double %a, double %b) {
1190; CHECK-LABEL: setbdf1:
1191; CHECK:       # %bb.0:
1192; CHECK-NEXT:    xscmpudp cr0, f1, f2
1193; CHECK-NEXT:    setb r3, cr0
1194; CHECK-NEXT:    blr
1195;
1196; CHECK-PWR8-LABEL: setbdf1:
1197; CHECK-PWR8:       # %bb.0:
1198; CHECK-PWR8-NEXT:    xscmpudp cr0, f2, f1
1199; CHECK-PWR8-NEXT:    li r3, 1
1200; CHECK-PWR8-NEXT:    li r4, -1
1201; CHECK-PWR8-NEXT:    iselgt r3, r4, r3
1202; CHECK-PWR8-NEXT:    iseleq r3, 0, r3
1203; CHECK-PWR8-NEXT:    blr
1204  %t1 = fcmp nnan oeq double %b, %a
1205  %t2 = fcmp nnan ogt double %b, %a
1206  %t3 = select i1 %t2, i64 -1, i64 1
1207  %t4 = select i1 %t1, i64 0, i64 %t3
1208  ret i64 %t4
1209}
1210
1211; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
1212define i64 @setbdf2(double %a, double %b) {
1213; CHECK-LABEL: setbdf2:
1214; CHECK:       # %bb.0:
1215; CHECK-NEXT:    xscmpudp cr0, f1, f2
1216; CHECK-NEXT:    setb r3, cr0
1217; CHECK-NEXT:    blr
1218;
1219; CHECK-PWR8-LABEL: setbdf2:
1220; CHECK-PWR8:       # %bb.0:
1221; CHECK-PWR8-NEXT:    fcmpu cr0, f2, f1
1222; CHECK-PWR8-NEXT:    li r3, 0
1223; CHECK-PWR8-NEXT:    li r4, -1
1224; CHECK-PWR8-NEXT:    iselgt r3, r4, r3
1225; CHECK-PWR8-NEXT:    xscmpudp cr0, f2, f1
1226; CHECK-PWR8-NEXT:    li r4, 1
1227; CHECK-PWR8-NEXT:    isellt r3, r4, r3
1228; CHECK-PWR8-NEXT:    blr
1229  %t1 = fcmp nnan olt double %b, %a
1230  %t2 = fcmp nnan ogt double %b, %a
1231  %t3 = sext i1 %t2 to i64
1232  %t4 = select i1 %t1, i64 1, i64 %t3
1233  ret i64 %t4
1234}
1235
1236define i64 @setbf128(fp128 %a, fp128 %b) {
1237; CHECK-LABEL: setbf128:
1238; CHECK:       # %bb.0:
1239; CHECK-NEXT:    xscmpuqp cr0, v2, v3
1240; CHECK-NEXT:    setb r3, cr0
1241; CHECK-NEXT:    blr
1242;
1243; CHECK-PWR8-LABEL: setbf128:
1244; CHECK-PWR8:       # %bb.0:
1245; CHECK-PWR8-NEXT:    mflr r0
1246; CHECK-PWR8-NEXT:    stdu r1, -96(r1)
1247; CHECK-PWR8-NEXT:    std r0, 112(r1)
1248; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 96
1249; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
1250; CHECK-PWR8-NEXT:    .cfi_offset r30, -16
1251; CHECK-PWR8-NEXT:    .cfi_offset v30, -48
1252; CHECK-PWR8-NEXT:    .cfi_offset v31, -32
1253; CHECK-PWR8-NEXT:    li r3, 48
1254; CHECK-PWR8-NEXT:    std r30, 80(r1) # 8-byte Folded Spill
1255; CHECK-PWR8-NEXT:    stvx v30, r1, r3 # 16-byte Folded Spill
1256; CHECK-PWR8-NEXT:    li r3, 64
1257; CHECK-PWR8-NEXT:    vmr v30, v2
1258; CHECK-PWR8-NEXT:    stvx v31, r1, r3 # 16-byte Folded Spill
1259; CHECK-PWR8-NEXT:    vmr v31, v3
1260; CHECK-PWR8-NEXT:    bl __ltkf2
1261; CHECK-PWR8-NEXT:    nop
1262; CHECK-PWR8-NEXT:    vmr v2, v30
1263; CHECK-PWR8-NEXT:    vmr v3, v31
1264; CHECK-PWR8-NEXT:    srawi r30, r3, 31
1265; CHECK-PWR8-NEXT:    bl __gtkf2
1266; CHECK-PWR8-NEXT:    nop
1267; CHECK-PWR8-NEXT:    li r4, 64
1268; CHECK-PWR8-NEXT:    cmpwi r3, 0
1269; CHECK-PWR8-NEXT:    li r3, 1
1270; CHECK-PWR8-NEXT:    lvx v31, r1, r4 # 16-byte Folded Reload
1271; CHECK-PWR8-NEXT:    li r4, 48
1272; CHECK-PWR8-NEXT:    lvx v30, r1, r4 # 16-byte Folded Reload
1273; CHECK-PWR8-NEXT:    iselgt r3, r3, r30
1274; CHECK-PWR8-NEXT:    ld r30, 80(r1) # 8-byte Folded Reload
1275; CHECK-PWR8-NEXT:    addi r1, r1, 96
1276; CHECK-PWR8-NEXT:    ld r0, 16(r1)
1277; CHECK-PWR8-NEXT:    mtlr r0
1278; CHECK-PWR8-NEXT:    blr
1279  %t1 = fcmp nnan ogt fp128 %a, %b
1280  %t2 = fcmp nnan olt fp128 %a, %b
1281  %t3 = sext i1 %t2 to i64
1282  %t4 = select i1 %t1, i64 1, i64 %t3
1283  ret i64 %t4
1284}
1285
1286; Some cases we can't leverage setb
1287
1288define i64 @setbn1(i64 %a, i64 %b) {
1289; CHECK-LABEL: setbn1:
1290; CHECK:       # %bb.0:
1291; CHECK-NEXT:    xor r5, r3, r4
1292; CHECK-NEXT:    cmpd r3, r4
1293; CHECK-NEXT:    li r3, -1
1294; CHECK-NEXT:    cntlzd r5, r5
1295; CHECK-NEXT:    rldicl r5, r5, 58, 63
1296; CHECK-NEXT:    isellt r3, r3, r5
1297; CHECK-NEXT:    blr
1298;
1299; CHECK-PWR8-LABEL: setbn1:
1300; CHECK-PWR8:       # %bb.0:
1301; CHECK-PWR8-NEXT:    xor r5, r3, r4
1302; CHECK-PWR8-NEXT:    cmpd r3, r4
1303; CHECK-PWR8-NEXT:    li r3, -1
1304; CHECK-PWR8-NEXT:    cntlzd r5, r5
1305; CHECK-PWR8-NEXT:    rldicl r5, r5, 58, 63
1306; CHECK-PWR8-NEXT:    isellt r3, r3, r5
1307; CHECK-PWR8-NEXT:    blr
1308  %t1 = icmp slt i64 %a, %b
1309  %t2 = icmp eq i64 %a, %b
1310  %t3 = zext i1 %t2 to i64
1311  %t4 = select i1 %t1, i64 -1, i64 %t3
1312  ret i64 %t4
1313}
1314
1315define i64 @setbn2(double %a, double %b) {
1316; CHECK-LABEL: setbn2:
1317; CHECK:       # %bb.0:
1318; CHECK-NEXT:    fcmpu cr0, f1, f2
1319; CHECK-NEXT:    li r3, 1
1320; CHECK-NEXT:    li r4, -1
1321; CHECK-NEXT:    cror 4*cr5+lt, un, eq
1322; CHECK-NEXT:    xscmpudp cr0, f1, f2
1323; CHECK-NEXT:    isel r3, 0, r3, 4*cr5+lt
1324; CHECK-NEXT:    isellt r3, r4, r3
1325; CHECK-NEXT:    blr
1326;
1327; CHECK-PWR8-LABEL: setbn2:
1328; CHECK-PWR8:       # %bb.0:
1329; CHECK-PWR8-NEXT:    fcmpu cr0, f1, f2
1330; CHECK-PWR8-NEXT:    li r3, 1
1331; CHECK-PWR8-NEXT:    li r4, -1
1332; CHECK-PWR8-NEXT:    cror 4*cr5+lt, un, eq
1333; CHECK-PWR8-NEXT:    xscmpudp cr0, f1, f2
1334; CHECK-PWR8-NEXT:    isel r3, 0, r3, 4*cr5+lt
1335; CHECK-PWR8-NEXT:    isellt r3, r4, r3
1336; CHECK-PWR8-NEXT:    blr
1337  %t1 = fcmp olt double %a, %b
1338  %t2 = fcmp one double %a, %b
1339  %t3 = zext i1 %t2 to i64
1340  %t4 = select i1 %t1, i64 -1, i64 %t3
1341  ret i64 %t4
1342}
1343
1344define i64 @setbn3(float %a, float %b) {
1345; CHECK-LABEL: setbn3:
1346; CHECK:       # %bb.0:
1347; CHECK-NEXT:    fcmpu cr0, f1, f2
1348; CHECK-NEXT:    li r3, 1
1349; CHECK-NEXT:    li r4, -1
1350; CHECK-NEXT:    iseleq r3, 0, r3
1351; CHECK-NEXT:    cror 4*cr5+lt, lt, un
1352; CHECK-NEXT:    isel r3, r4, r3, 4*cr5+lt
1353; CHECK-NEXT:    blr
1354;
1355; CHECK-PWR8-LABEL: setbn3:
1356; CHECK-PWR8:       # %bb.0:
1357; CHECK-PWR8-NEXT:    fcmpu cr0, f1, f2
1358; CHECK-PWR8-NEXT:    li r3, 1
1359; CHECK-PWR8-NEXT:    li r4, -1
1360; CHECK-PWR8-NEXT:    iseleq r3, 0, r3
1361; CHECK-PWR8-NEXT:    cror 4*cr5+lt, lt, un
1362; CHECK-PWR8-NEXT:    isel r3, r4, r3, 4*cr5+lt
1363; CHECK-PWR8-NEXT:    blr
1364  %t1 = fcmp ult float %a, %b
1365  %t2 = fcmp une float %a, %b
1366  %t3 = zext i1 %t2 to i64
1367  %t4 = select i1 %t1, i64 -1, i64 %t3
1368  ret i64 %t4
1369}
1370
1371; Verify this case doesn't crash
1372define void @setbn4(i128 %0, ptr %sel.out) {
1373; CHECK-LABEL: setbn4:
1374; CHECK:       # %bb.0: # %entry
1375; CHECK-NEXT:    li r6, 1
1376; CHECK-NEXT:    cmpdi cr1, r3, 0
1377; CHECK-NEXT:    li r3, 1
1378; CHECK-NEXT:    rldic r6, r6, 48, 15
1379; CHECK-NEXT:    cmpld r4, r6
1380; CHECK-NEXT:    crandc 4*cr5+lt, gt, eq
1381; CHECK-NEXT:    crandc 4*cr5+gt, eq, 4*cr1+eq
1382; CHECK-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
1383; CHECK-NEXT:    rldicl. r4, r4, 16, 48
1384; CHECK-NEXT:    li r4, -1
1385; CHECK-NEXT:    isel r3, 0, r3, 4*cr5+lt
1386; CHECK-NEXT:    iseleq r3, r4, r3
1387; CHECK-NEXT:    stw r3, 0(r5)
1388; CHECK-NEXT:    blr
1389;
1390; CHECK-PWR8-LABEL: setbn4:
1391; CHECK-PWR8:       # %bb.0: # %entry
1392; CHECK-PWR8-NEXT:    li r6, 1
1393; CHECK-PWR8-NEXT:    cmpdi cr1, r3, 0
1394; CHECK-PWR8-NEXT:    li r3, 1
1395; CHECK-PWR8-NEXT:    rldic r6, r6, 48, 15
1396; CHECK-PWR8-NEXT:    cmpld r4, r6
1397; CHECK-PWR8-NEXT:    crandc 4*cr5+lt, gt, eq
1398; CHECK-PWR8-NEXT:    crandc 4*cr5+gt, eq, 4*cr1+eq
1399; CHECK-PWR8-NEXT:    rldicl. r4, r4, 16, 48
1400; CHECK-PWR8-NEXT:    li r4, -1
1401; CHECK-PWR8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
1402; CHECK-PWR8-NEXT:    isel r3, 0, r3, 4*cr5+lt
1403; CHECK-PWR8-NEXT:    iseleq r3, r4, r3
1404; CHECK-PWR8-NEXT:    stw r3, 0(r5)
1405; CHECK-PWR8-NEXT:    blr
1406entry:
1407  %c1 = icmp ult i128 %0, 5192296858534827628530496329220096
1408  %c2 = icmp ugt i128 %0, 5192296858534827628530496329220096
1409  %ext = zext i1 %c2 to i32
1410  %sel = select i1 %c1, i32 -1, i32 %ext
1411  store i32 %sel, ptr %sel.out, align 4
1412  ret void
1413}
1414