1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=powerpc64le -simplify-mir -verify-machineinstrs \ 3# RUN: -run-pass=peephole-opt %s -o - | FileCheck %s 4 5# This tests to make sure that we do not generate subreg def 6# as it is illegal to generate subreg defs in machine SSA phase. 7 8--- 9name: test_peephole_subreg_def 10alignment: 16 11tracksRegLiveness: true 12frameInfo: 13 maxAlignment: 1 14machineFunctionInfo: {} 15body: | 16 bb.0.entry: 17 liveins: $x3 18 19 ; CHECK-LABEL: name: test_peephole_subreg_def 20 ; CHECK: liveins: $x3 21 ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3 22 ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 [[COPY]], 1 23 ; CHECK: [[EXTSW:%[0-9]+]]:g8rc_and_g8rc_nox0 = EXTSW [[ADDI8_]] 24 ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 0 25 ; CHECK: STB8 [[LI8_]], 0, [[EXTSW]] 26 ; CHECK: [[COPY1:%[0-9]+]]:gprc_and_gprc_nor0 = COPY [[EXTSW]].sub_32 27 ; CHECK: [[COPY2:%[0-9]+]]:gprc_and_gprc_nor0 = COPY [[COPY1]] 28 ; CHECK: [[ADDI:%[0-9]+]]:gprc = ADDI killed [[COPY2]], 1 29 ; CHECK: [[EXTSW_32_64_:%[0-9]+]]:g8rc_and_g8rc_nox0 = EXTSW_32_64 killed [[ADDI]] 30 ; CHECK: STB8 [[LI8_]], 0, killed [[EXTSW_32_64_]] 31 %0:g8rc_and_g8rc_nox0 = COPY $x3 32 %1:g8rc = ADDI8 %0, 1 33 %2:g8rc_and_g8rc_nox0 = EXTSW %1 34 %3:g8rc = LI8 0 35 STB8 %3, 0, killed %2 36 %4:gprc_and_gprc_nor0 = COPY %1.sub_32 37 %5:gprc = ADDI killed %4, 1 38 %6:g8rc_and_g8rc_nox0 = EXTSW_32_64 killed %5 39 STB8 %3, 0, killed %6 40 41... 42