1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 2# REQUIRES: asserts 3# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 4# RUN: -run-pass ppc-mi-peepholes %s -o - | FileCheck %s --check-prefix=ALL 5# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 6# RUN: -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=0-5 \ 7# RUN: | FileCheck %s --check-prefix=ALL 8# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 9# RUN: -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=0-5 \ 10# RUN: | FileCheck %s --check-prefix=ALL 11# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 12# RUN: -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=3 \ 13# RUN: | FileCheck %s --check-prefix=ONE-FIRST-RLWINM 14# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 15# RUN: -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=4 \ 16# RUN: | FileCheck %s --check-prefix=ONE-SECOND-RLWINM 17# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \ 18# RUN: -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=3-4 \ 19# RUN: | FileCheck %s --check-prefix=TWO 20 21--- 22name: testFoldRLWINM 23#CHECK: name: testFoldRLWINM 24tracksRegLiveness: true 25body: | 26 bb.0.entry: 27 liveins: $x3 28 ; ALL-LABEL: name: testFoldRLWINM 29 ; ALL: liveins: $x3 30 ; ALL-NEXT: {{ $}} 31 ; ALL-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 32 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32 33 ; ALL-NEXT: dead [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 12 34 ; ALL-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 11 35 ; ALL-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 10 36 ; ALL-NEXT: BLR8 implicit $lr8, implicit $rm 37 ; 38 ; ONE-FIRST-RLWINM-LABEL: name: testFoldRLWINM 39 ; ONE-FIRST-RLWINM: liveins: $x3 40 ; ONE-FIRST-RLWINM-NEXT: {{ $}} 41 ; ONE-FIRST-RLWINM-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 42 ; ONE-FIRST-RLWINM-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32 43 ; ONE-FIRST-RLWINM-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31 44 ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 12 45 ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM [[RLWINM]], 19, 0, 11 46 ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10 47 ; ONE-FIRST-RLWINM-NEXT: BLR8 implicit $lr8, implicit $rm 48 ; 49 ; ONE-SECOND-RLWINM-LABEL: name: testFoldRLWINM 50 ; ONE-SECOND-RLWINM: liveins: $x3 51 ; ONE-SECOND-RLWINM-NEXT: {{ $}} 52 ; ONE-SECOND-RLWINM-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 53 ; ONE-SECOND-RLWINM-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32 54 ; ONE-SECOND-RLWINM-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31 55 ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[RLWINM]], 19, 0, 12 56 ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 11 57 ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10 58 ; ONE-SECOND-RLWINM-NEXT: BLR8 implicit $lr8, implicit $rm 59 ; 60 ; TWO-LABEL: name: testFoldRLWINM 61 ; TWO: liveins: $x3 62 ; TWO-NEXT: {{ $}} 63 ; TWO-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3 64 ; TWO-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32 65 ; TWO-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31 66 ; TWO-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 12 67 ; TWO-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 11 68 ; TWO-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10 69 ; TWO-NEXT: BLR8 implicit $lr8, implicit $rm 70 %0:g8rc = COPY $x3 71 %1:gprc = COPY %0.sub_32:g8rc 72 %2:gprc = RLWINM %1:gprc, 27, 5, 31 73 %3:gprc = RLWINM %2:gprc, 19, 0, 12 74 %4:gprc = RLWINM %2:gprc, 19, 0, 11 75 %5:gprc = RLWINM %2:gprc, 19, 0, 10 76 BLR8 implicit $lr8, implicit $rm 77... 78