1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O1 \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s -check-prefixes=CHECK-LE 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O1 \ 6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s -check-prefixes=CHECK-BE 8 9@GlobLd1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1 10@GlobSt1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1 11 12define i1 @i64_ExtLoad_i1() { 13; CHECK-LE-LABEL: i64_ExtLoad_i1: 14; CHECK-LE: # %bb.0: # %entry 15; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1 16; CHECK-LE-NEXT: blr 17; 18; CHECK-BE-LABEL: i64_ExtLoad_i1: 19; CHECK-BE: # %bb.0: # %entry 20; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha 21; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3) 22; CHECK-BE-NEXT: blr 23entry: 24 %0 = load i1, ptr @GlobLd1, align 1 25 ret i1 %0 26} 27 28define zeroext i1 @i64_ZextLoad_i1() { 29; CHECK-LE-LABEL: i64_ZextLoad_i1: 30; CHECK-LE: # %bb.0: # %entry 31; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1 32; CHECK-LE-NEXT: blr 33; 34; CHECK-BE-LABEL: i64_ZextLoad_i1: 35; CHECK-BE: # %bb.0: # %entry 36; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha 37; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3) 38; CHECK-BE-NEXT: blr 39entry: 40 %0 = load i1, ptr @GlobLd1, align 1 41 ret i1 %0 42} 43 44define void @i32_ZextLoad_i1() { 45; CHECK-LE-LABEL: i32_ZextLoad_i1: 46; CHECK-LE: # %bb.0: # %entry 47; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1 48; CHECK-LE-NEXT: clrldi r3, r3, 63 49; CHECK-LE-NEXT: pstb r3, GlobSt1@PCREL(0), 1 50; CHECK-LE-NEXT: blr 51; 52; CHECK-BE-LABEL: i32_ZextLoad_i1: 53; CHECK-BE: # %bb.0: # %entry 54; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha 55; CHECK-BE-NEXT: addis r4, r2, GlobSt1@toc@ha 56; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3) 57; CHECK-BE-NEXT: clrldi r3, r3, 63 58; CHECK-BE-NEXT: stb r3, GlobSt1@toc@l(r4) 59; CHECK-BE-NEXT: blr 60entry: 61 %0 = load i1, ptr @GlobLd1, align 1 62 store i1 %0, ptr @GlobSt1, align 1 63 ret void 64} 65 66%1 = type { i64 } 67@Glob1 = external dso_local global %1, align 8 68@Glob2 = external dso_local unnamed_addr constant [11 x i8], align 1 69declare i32 @Decl(ptr, ptr) local_unnamed_addr #0 70 71define dso_local i1 @i32_ExtLoad_i1() local_unnamed_addr #0 { 72; CHECK-LE-LABEL: i32_ExtLoad_i1: 73; CHECK-LE: # %bb.0: # %bb 74; CHECK-LE-NEXT: mflr r0 75; CHECK-LE-NEXT: std r0, 16(r1) 76; CHECK-LE-NEXT: stdu r1, -32(r1) 77; CHECK-LE-NEXT: .cfi_def_cfa_offset 32 78; CHECK-LE-NEXT: .cfi_offset lr, 16 79; CHECK-LE-NEXT: paddi r3, 0, Glob1@PCREL, 1 80; CHECK-LE-NEXT: paddi r4, 0, Glob2@PCREL, 1 81; CHECK-LE-NEXT: bl Decl@notoc 82; CHECK-LE-NEXT: cmpwi cr1, r3, 0 83; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1 84; CHECK-LE-NEXT: andi. r3, r3, 1 85; CHECK-LE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq 86; CHECK-LE-NEXT: setbc r3, 4*cr5+lt 87; CHECK-LE-NEXT: addi r1, r1, 32 88; CHECK-LE-NEXT: ld r0, 16(r1) 89; CHECK-LE-NEXT: mtlr r0 90; CHECK-LE-NEXT: blr 91; 92; CHECK-BE-LABEL: i32_ExtLoad_i1: 93; CHECK-BE: # %bb.0: # %bb 94; CHECK-BE-NEXT: mflr r0 95; CHECK-BE-NEXT: std r0, 16(r1) 96; CHECK-BE-NEXT: stdu r1, -112(r1) 97; CHECK-BE-NEXT: .cfi_def_cfa_offset 112 98; CHECK-BE-NEXT: .cfi_offset lr, 16 99; CHECK-BE-NEXT: addis r3, r2, Glob1@toc@ha 100; CHECK-BE-NEXT: addis r4, r2, Glob2@toc@ha 101; CHECK-BE-NEXT: addi r3, r3, Glob1@toc@l 102; CHECK-BE-NEXT: addi r4, r4, Glob2@toc@l 103; CHECK-BE-NEXT: bl Decl 104; CHECK-BE-NEXT: nop 105; CHECK-BE-NEXT: cmpwi cr1, r3, 0 106; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha 107; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3) 108; CHECK-BE-NEXT: andi. r3, r3, 1 109; CHECK-BE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq 110; CHECK-BE-NEXT: setbc r3, 4*cr5+lt 111; CHECK-BE-NEXT: addi r1, r1, 112 112; CHECK-BE-NEXT: ld r0, 16(r1) 113; CHECK-BE-NEXT: mtlr r0 114; CHECK-BE-NEXT: blr 115bb: 116 %i = call signext i32 @Decl(ptr nonnull dereferenceable(32) @Glob1, ptr @Glob2) #1 117 %i1 = icmp eq i32 %i, 0 118 %i2 = load i1, ptr @GlobLd1, align 1 119 %i3 = select i1 %i1, i1 false, i1 %i2 120 ret i1 %i3 121} 122